arch/arm/include/asm/arch-sc8800g/sc8800g_sleep_cfg.h

   1 /******************************************************************************
   2  ** File Name:      sc8800g_sleep_cfg.h                                             *
   3  ** Author:         jiexia.yu                                                 *
   4  ** DATE:           07/09/2007                                                *
   5  ** Copyright:      2007 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic function for ldo management.  *
   7  ******************************************************************************/
   8
   9 /******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 07/09/2007     jiexia.yu        Create.                                   *
  14  ******************************************************************************/
  15 #ifndef _SC8800G_SLEEP_CFG_H_
  16 #define _SC8800G_SLEEP_CFG_H_
  17
  18 /**---------------------------------------------------------------------------*
  19  **                         Dependencies                                      *
  20  **---------------------------------------------------------------------------*/
  21 #include "chip.h"
  22
  23 /**---------------------------------------------------------------------------*
  24  **                         Compiler Flag                                     *
  25  **---------------------------------------------------------------------------*/
  26 #ifdef __cplusplus
  27 extern   "C"
  28 {
  29 #endif
  30
  31 /**---------------------------------------------------------------------------*
  32  **                         Defines                                           *
  33  **---------------------------------------------------------------------------*/
  34  #define SLEEP_MODULE_CONFIG_SLEEP_PIN_FEATURE 0
  35
  36 #define SLEEP_SUPPORT_BTCLK 0
  37 #define SLEEP_SUPPORT_IVSP 1
  38 #define SLEEP_SUPPORT_ISP 1
  39 #define SLEEP_SUPPORT_DCAM 1
  40 #define SLEEP_SUPPORT_LCDC 1
  41 #define SLEEP_SUPPORT_SDIO 1
  42 #define SLEEP_SUPPORT_BKLIGHT 1
  43 #define SLEEP_SUPPORT_MMI 1
  44 #define SLEEP_SUPPORT_USBD 0
  45 #ifdef CHIP_VER_8800G2
  46 #define SLEEP_SUPPORT_RETENTION 1
  47 #else
  48 #define SLEEP_SUPPORT_RETENTION 0
  49 #endif
  50
  51 typedef void (*SLP_ENTER_FUNC) (uint8 slp_type);
  52
  53 typedef enum
  54 {
  55     SLP_CFG_NULL  = 0,  //id for NULL
  56     SLP_CFG_COM,
  57     SLP_CFG_DIF,
  58     SLP_CFG_MAX
  59 } SLP_CFG_TYPE_E;
  60
  61 typedef enum
  62 {
  63     SLP_AHB_NULL = 0,   //id for NULL
  64     SLP_AHB_DCAM,       //id for AHB device dcam
  65     SLP_AHB_USBD,       //id for AHB device usbd
  66     SLP_AHB_EMC,        //id for AHB device emc
  67     SLP_AHB_DMA,        //id for AHB device dma
  68     SLP_AHB_BUS,        //id for AHB device bus
  69     SLP_AHB_DEV_MAX
  70 } SLP_AHB_DEV_E;
  71
  72 typedef enum
  73 {
  74     SLP_APB_NULL = 0,   //id for NULL
  75     SLP_APB_WDG,        //id for APB device watchdog
  76     SLP_APB_ADC,        //id for APB device adc
  77     SLP_APB_TMR,        //id for APB device timer
  78     SLP_APB_SIM,        //id for APB device sim
  79     SLP_APB_I2C,        //id for APB device i2c
  80     SLP_APB_TPC,        //id for APB device tpc
  81     SLP_APB_PWM,        //id for APB device pwm
  82     SLP_APB_KPD,        //id for APB device keypad
  83     SLP_APB_GPIO,       //id for APB device gpio
  84     SLP_APB_GEA,        //id for APB device gea
  85     SLP_APB_SYSTMR,     //id for APB device sys timer
  86     SLP_APB_UART0,      //id for APB device uart0
  87     SLP_APB_UART1,      //id for APB device uart1
  88     SLP_APB_SPI0,       //id for APB device spi0
  89     SLP_APB_IIS,        //id for APB device iis
  90     SLP_APB_SPI1,       //id for APB device spi1
  91     SLP_APB_PIN,        //id for APB device pin
  92     SLP_APB_DEV_MAX
  93 } SLP_APB_DEV_E;
  94
  95
  96 typedef enum
  97 {
  98     SLP_CTL_NULL = 0,               //id for NULL
  99     SLP_CTRL_MCU_FORCE_STOP,    //id for arm and ahb ctrl
 100     SLP_CTRL_MCU_DMA_WAKEUP_EN,  //id for dma wake up ctrl
 101     SLP_CTRL_MCU_SYS_SLEEP_EN,  //id for sys  sleep ctrl
 102     SLP_CTRL_MCU_DEEP_SLEEP_EN, //id for deep sleep ctrl
 103     SLP_CTRL_APB_STOP,          //id for APB  sleep ctrl
 104     SLP_CTRL_APB_FORCE_ON,      //id for APB  sleep ctrl
 105     SLP_CTRL_APB_FORCE_SLEEP,   //id for APB  sleep ctrl
 106     SLP_CTRL_XTLEN,             //id for xtlen sleep ctrl
 107     SLP_CTRL_DMA_SLEEP_MOD,     //id for dma sleep mode ctrl
 108     SLP_CTRL_MCU_PLL_EN,    //id for mcu pll enable
 109     SLP_CTRL_XTL_ON_SLP,
 110     SLP_CTRL_MAX
 111 } SLP_BIT_CTL_E;
 112
 113 typedef enum
 114 {
 115     AHB_CAN_SLP_APB_CAN_SLP,
 116     AHB_CAN_SLP_APB_NO_SLP,
 117     AHB_NO_SLP_APB_CAN_SLP,
 118     AHB_NO_SLP_APB_NO_SLP,
 119     SLP_TYPE_MAX
 120 } SLP_AHB_APB_TYPE_E;
 121
 122 typedef enum
 123 {
 124     AHB_COULD_SLEEP,
 125     AHB_NO_SLEEP
 126 } SLP_AHB_TYPE_E;
 127
 128 typedef enum
 129 {
 130     APB_COULD_SLEEP,
 131     APB_NO_SLEEP
 132 } SLP_APB_TYPE_E;
 133
 134 typedef enum
 135 {
 136     SLP_BIT_CLR = 0,
 137     SLP_BIT_SET
 138 } SLP_BIT_DEF_E;
 139
 140 typedef struct
 141 {
 142     SLP_AHB_DEV_E  id;
 143     uint32         ahb_dev_reg;
 144     uint32         mask;
 145     SLP_BIT_DEF_E  value;
 146     BOOLEAN        valid;
 147     uint32         reserved;
 148 } SLP_AHB_CTL_T, * SLP_AHB_CTL_PTR;
 149
 150 typedef struct
 151 {
 152     SLP_APB_DEV_E  id;
 153     uint32         apb_dev_reg;
 154     uint32         mask;
 155     SLP_BIT_DEF_E  value;
 156     BOOLEAN        valid;
 157     uint32         reserved;
 158 } SLP_APB_CTL_T, * SLP_APB_CTL_PTR;
 159
 160 typedef struct
 161 {
 162     SLP_BIT_CTL_E  id;
 163     uint32         slp_bit_reg;
 164     uint32         mask;
 165     SLP_BIT_DEF_E  value;
 166     BOOLEAN        valid;
 167     uint32         reserved;
 168 } SLP_BIT_CTL_T, * SLP_BIT_CTL_PTR;
 169
 170 typedef struct
 171 {
 172     SLP_AHB_CTL_T  ahb_ctrl[SLP_AHB_DEV_MAX];
 173     SLP_APB_CTL_T  apb_ctrl[SLP_APB_DEV_MAX];
 174     SLP_BIT_CTL_T  slp_bit_ctrl[SLP_CTRL_MAX];
 175     SLP_ENTER_FUNC slp_handler;
 176 } SLP_COM_CTL_T, *SLPCOMCTL_PTR;
 177
 178 typedef struct
 179 {
 180     SLP_COM_CTL_T  slp_com_cfg;
 181 } SLP_CTL_T, * SLPCTL_PTR;
 182
 183 typedef struct
 184 {
 185     CHIP_TYPE_E    chip_type;
 186     SLPCTL_PTR     sleep_ctl;
 187 } SLP_CFG_T, * SLP_CFG_PTR;
 188
 189 /*****************************************************************************/
 190 //  Function name:  Slp_Get_Cfg
 191 //  Description  :  this function get sleep table entry according to chip type
 192 //  Global resource dependence:
 193 //  Author:
 194 //  Note:
 195 /*****************************************************************************/
 196 PUBLIC SLPCTL_PTR Slp_Get_Cfg (void);
 197 /*****************************************************************************/
 198 //  Function name:  Slp_Get_Apb_Status
 199 //  Description  :  this function get chip sleep status according ahb and apb
 200 //  bus status
 201 //  Global resource dependence:
 202 //  Author:
 203 //  Note:
 204 /*****************************************************************************/
 205
 206 PUBLIC int     tx_enter_deep_sleep (uint32 level);
 207
 208 /**---------------------------------------------------------------------------*
 209  **                         Compiler Flag                                     *
 210  **---------------------------------------------------------------------------*/
 211 #ifdef __cplusplus
 212 }
 213 #endif
 214
 215 #endif // _LDO_MANAGER_H_