1 /******************************************************************************
2 ** File Name: lcdc_v3_reg.h *
5 ** Copyright: 2009 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 01/21/2006 Shan.He Create. *
13 ******************************************************************************/
14 #ifndef _LCDC_V3_REG_H_
15 #define _LCDC_V3_REG_H_
16 /*----------------------------------------------------------------------------*
18 **---------------------------------------------------------------------------*/
19 #include "lcm_reg_v3.h"
20 /**---------------------------------------------------------------------------*
22 **---------------------------------------------------------------------------*/
27 /**---------------------------------------------------------------------------*
29 **----------------------------------------------------------------------------*/
34 #define REG_LCDC_CTRL (REG_LCDC_REG_BASE + 0x0000)
35 #define REG_LCDC_DISP_SIZE (REG_LCDC_REG_BASE + 0x0004)
36 #define REG_LCDC_LCM_START (REG_LCDC_REG_BASE + 0x0008)
37 #define REG_LCDC_LCM_SIZE (REG_LCDC_REG_BASE + 0x000c)
38 #define REG_LCDC_BG_COLOR (REG_LCDC_REG_BASE + 0x0010)
39 #define REG_LCDC_FIFO_STATUS (REG_LCDC_REG_BASE + 0x0014)
41 #define REG_IMG_CTRL (REG_LCDC_REG_BASE + 0x0020)
42 #define REG_IMG_Y_BASE_ADDR (REG_LCDC_REG_BASE + 0x0024)
43 #define REG_IMG_UV_BASE_ADDR (REG_LCDC_REG_BASE + 0x0028)
44 #define REG_IMG_SIZE_XY (REG_LCDC_REG_BASE + 0x002c)
45 #define REG_IMG_PITCH (REG_LCDC_REG_BASE + 0x0030)
46 #define REG_IMG_DISP_XY (REG_LCDC_REG_BASE + 0x0034)
48 #define REG_OSD1_CTRL (REG_LCDC_REG_BASE + 0x0040)
49 #define REG_OSD1_BASE_ADDR (REG_LCDC_REG_BASE + 0x0044)
50 #define REG_OSD1_ALPHA_BASE_ADDR (REG_LCDC_REG_BASE + 0x0048)
51 #define REG_OSD1_SIZE_XY (REG_LCDC_REG_BASE + 0x004c)
52 #define REG_OSD1_PITCH (REG_LCDC_REG_BASE + 0x0050)
53 #define REG_OSD1_DISP_XY (REG_LCDC_REG_BASE + 0x0054)
54 #define REG_OSD1_ALPHA (REG_LCDC_REG_BASE + 0x0058)
55 #define REG_OSD1_GREY_RGB (REG_LCDC_REG_BASE + 0x005c)
56 #define REG_OSD1_CK (REG_LCDC_REG_BASE + 0x0060)
58 #define REG_OSD2_CTRL (REG_LCDC_REG_BASE + 0x0070)
59 #define REG_OSD2_BASE_ADDR (REG_LCDC_REG_BASE + 0x0074)
60 #define REG_OSD2_SIZE_XY (REG_LCDC_REG_BASE + 0x0078)
61 #define REG_OSD2_PITCH (REG_LCDC_REG_BASE + 0x007c)
62 #define REG_OSD2_DISP_XY (REG_LCDC_REG_BASE + 0x0080)
63 #define REG_OSD2_ALPHA (REG_LCDC_REG_BASE + 0x0084)
64 #define REG_OSD2_GREY_RGB (REG_LCDC_REG_BASE + 0x0088)
65 #define REG_OSD2_CK (REG_LCDC_REG_BASE + 0x008c)
67 #define REG_OSD3_CTRL (REG_LCDC_REG_BASE + 0x0090)
68 #define REG_OSD3_BASE_ADDR (REG_LCDC_REG_BASE + 0x0094)
69 #define REG_OSD3_SIZE_XY (REG_LCDC_REG_BASE + 0x0098)
70 #define REG_OSD3_PITCH (REG_LCDC_REG_BASE + 0x009c)
71 #define REG_OSD3_DISP_XY (REG_LCDC_REG_BASE + 0x00a0)
72 #define REG_OSD3_ALPHA (REG_LCDC_REG_BASE + 0x00a4)
73 #define REG_OSD3_GREY_RGB (REG_LCDC_REG_BASE + 0x00a8)
74 #define REG_OSD3_CK (REG_LCDC_REG_BASE + 0x00ac)
76 #define REG_OSD4_CTRL (REG_LCDC_REG_BASE + 0x00b0)
77 #define REG_OSD4_BASE_ADDR (REG_LCDC_REG_BASE + 0x00b4)
78 #define REG_OSD4_SIZE_XY (REG_LCDC_REG_BASE + 0x00b8)
79 #define REG_OSD4_PITCH (REG_LCDC_REG_BASE + 0x00bc)
80 #define REG_OSD4_DISP_XY (REG_LCDC_REG_BASE + 0x00c0)
81 #define REG_OSD4_ALPHA (REG_LCDC_REG_BASE + 0x00c4)
82 #define REG_OSD4_GREY_RGB (REG_LCDC_REG_BASE + 0x00c8)
83 #define REG_OSD4_CK (REG_LCDC_REG_BASE + 0x00cc)
85 #define REG_OSD5_CTRL (REG_LCDC_REG_BASE + 0x00d0)
86 #define REG_OSD5_BASE_ADDR (REG_LCDC_REG_BASE + 0x00d4)
87 #define REG_OSD5_SIZE_XY (REG_LCDC_REG_BASE + 0x00d8)
88 #define REG_OSD5_PITCH (REG_LCDC_REG_BASE + 0x00dc)
89 #define REG_OSD5_DISP_XY (REG_LCDC_REG_BASE + 0x00e0)
90 #define REG_OSD5_ALPHA (REG_LCDC_REG_BASE + 0x00e4)
91 #define REG_OSD5_GREY_RGB (REG_LCDC_REG_BASE + 0x00e8)
92 #define REG_OSD5_CK (REG_LCDC_REG_BASE + 0x00ec)
94 #define REG_CAP_CTRL (REG_LCDC_REG_BASE + 0x00f0)
95 #define REG_CAP_BASE_ADDR (REG_LCDC_REG_BASE + 0x00f4)
96 #define REG_CAP_START_XY (REG_LCDC_REG_BASE + 0x00f8)
97 #define REG_CAP_SIZE_XY (REG_LCDC_REG_BASE + 0x00fc)
98 #define REG_CAP_PITCH (REG_LCDC_REG_BASE + 0x0100)
100 #define REG_Y2R_CTRL (REG_LCDC_REG_BASE + 0x0110)
101 #define REG_Y2R_CONTRAST (REG_LCDC_REG_BASE + 0x0114)
102 #define REG_Y2R_SATURATION (REG_LCDC_REG_BASE + 0x0118)
103 #define REG_Y2R_BRIGHTNESS (REG_LCDC_REG_BASE + 0x011c)
105 #define REG_LCDC_IRQ_EN (REG_LCDC_REG_BASE + 0x0120)
106 #define REG_LCDC_IRQ_CLR (REG_LCDC_REG_BASE + 0x0124)
107 #define REG_LCDC_IRQ_STATUS (REG_LCDC_REG_BASE + 0x0128)
108 #define REG_LCDC_IRQ_RAW (REG_LCDC_REG_BASE + 0x012c)
111 /**---------------------------------------------------------------------------*
113 **----------------------------------------------------------------------------*/
114 #ifdef CHIP_ENDIAN_LITTLE
115 typedef union _lcdc_ctrl_tag
117 struct _lcdc_ctrl_map
119 volatile unsigned int lcd_enable :1; //[0] 0:LCDC Disable;1:LCDC Enable
120 volatile unsigned int fmark_mode :1; //[1] 0: fmark device; 1: non-fmark device
121 volatile unsigned int fmark_pol :1; //[2] 0: fmark valid at 1; 1: fmark valid at 0
122 volatile unsigned int lcdc_run :1; //[3] 0: stop; 1:run
123 volatile unsigned int dither_en :1; //[4] 0:disable; 1:enable
124 volatile unsigned int reserved_2 :3; //[7:5] Reserved ;
125 volatile unsigned int req_gap :8; //[15:8] The interval between 2 AHB master requests for each client.
126 volatile unsigned int reserved_1 :16; //[31:16] Reserved ;
128 volatile unsigned int dwValue ;
132 typedef union _lcdc_disp_size_tag
134 struct _lcdc_disp_size_map
136 volatile unsigned int disp_size_x :10; //[9:0] display window horizontal size, should be >0 and <1024
137 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
138 volatile unsigned int disp_size_y :10; //[25:16] display window vertical size, should be >0 and <1024
139 volatile unsigned int reserved_1 :6; //[31:26] Reserved
141 volatile unsigned int dwValue;
144 typedef union _lcdc_lcm_start_tag
146 struct _lcdc_lcm_start_map
148 volatile unsigned int lcm_start_x :10; //[9:0] LCM refresh window start X, should be >0 and <1024, guarantee the window in display region.
149 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
150 volatile unsigned int lcm_start_y :10; //[25:16] LCM refresh window start Y, should be >0 and <1024, guarantee the window in display region.
151 volatile unsigned int reserved_1 :6; //[31:26] Reserved
153 volatile unsigned int dValue;
156 typedef union _lcdc_lcm_size_tag
158 struct _lcdc_lcm_size_map
160 volatile unsigned int lcm_size_x :10; //[9:0] LCM refresh window horizontal size, should be >0 and <1024, guarantee the window in display region.
161 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
162 volatile unsigned int lcm_size_y :10; //[25:16] LCM refresh window vertical size, should be >0 and <1024, guarantee the window in display region.
163 volatile unsigned int reserved_1 :6; //[31:26] Reserved
165 volatile unsigned int dValue;
168 typedef union _lcdc_bg_color_tag
170 struct _lcdc_bg_color_map
172 volatile unsigned int bg_b :8; //[7:0] Background blue
173 volatile unsigned int bg_g :8; //[15:8] Background green
174 volatile unsigned int bg_r :8; //[23:16] Background red
175 volatile unsigned int reserved :8; //[31:24] Reserved
177 volatile unsigned int dwValue;
180 typedef union _lcdc_fifo_status_tag
182 struct _lcdc_fifo_status_map
184 volatile unsigned int img_y_fifo_status :2; //[1:0] Image layer FIFO info. When image is YUV format, it is for Y data; when image is RGB format, it is for RGB data.
185 //status, '1' for full; [0] - FIFO empty status, '1' for empty.
186 volatile unsigned int img_uv_fifo_status :2; //[3:2] Image layer FIFO info. It is active when image is YUV422 and YUV420 format. It is for UV data.
187 //[3] - FIFO full status, '1' for full; [2] - FIFO empty status, '1' for empty.
188 volatile unsigned int osd1_alpha_fifo_status :2; //[5:4] Osd1 layer FIFO info. It is active when osd1 is RGB565 format with pixel alpha.
189 //[5] - FIFO full status, '1' for full; [4] - FIFO empty status, '1' for empty.
190 volatile unsigned int osd1_fifo_status :2; //[7:6] Osd1 layer FIFO info. It is for osd1 layer data.
191 //[7] - FIFO full status, '1' for full; [6] - FIFO empty status, '1' for empty.
192 volatile unsigned int osd2_fifo_status :2; //[9:8] Osd2 layer FIFO info.It is for osd2 layer data.
193 //[9] - FIFO full status, '1' for full; [8] - FIFO empty status, '1' for empty.
194 volatile unsigned int osd3_fifo_status :2; //[11:10]
195 volatile unsigned int osd4_fifo_status :2; //[13:12]
196 volatile unsigned int osd5_fifo_status :2; //[15:14]
197 volatile unsigned int y2r_fifo_status :2; //[17:16] YUV to RGB work FIFO
198 //[11] - FIFO full status, '1' for full; [10] - FIFO empty status, '1' for empty.
199 volatile unsigned int dither_fifo_status :2; //[19:18] Dithering output FIFO, it is shared by capture and display.
200 //[13] - FIFO full status, '1' for full; [12]-FIFO empty status, '1' for empty.
201 volatile unsigned int output_fifo_status :2; //[21:20] Cross domain FIFO;
202 //[15] - FIFO full status, '1' for full; [14] - FIFO empty status, '1' for empty.
203 volatile unsigned int reserved :10; //[31:16] reserved
205 volatile unsigned int dwValue;
206 } LCDC_FIFO_STATUS_U;
208 typedef union _img_ctrl_tag
212 volatile unsigned int img_en :1; //[0] Image layer enable; 0: disable; 1: enable
213 volatile unsigned int img_format :4; //[1:4] Image layer data format, it supports following ones:
221 volatile unsigned int img_y_endian :2; //[5:6] Image layer data endian; 0: big endian(0123); 1: little endian(3210)
222 volatile unsigned int img_uv_endian :2; //[7:8]
223 volatile unsigned int reserved :23; //[31:9]
225 volatile unsigned int dwValue;
228 typedef union _img_y_base_addr_tag
230 struct _img_y_base_addr_map
232 volatile unsigned int img_y_base_addr :30; //[29:0] //When image is YUV format, it is Y data base address;
233 volatile unsigned int reserved :2; //[31:30]
235 volatile unsigned int dwValue;
238 typedef union _img_uv_base_addr_tag
240 struct _img_uv_base_addr_map
242 volatile unsigned int img_uv_base_addr :30; //[29:0] //When image is YUV format, it is UV base address;
243 volatile unsigned int reserved :2; //[31:30]
245 volatile unsigned int dwValue;
246 } IMG_UV_BASE_ADDR_U;
248 typedef union _img_size_xy_tag
250 struct _img_size_xy_map
252 volatile unsigned int img_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
253 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
254 volatile unsigned int img_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
255 volatile unsigned int reserved_1 :6; //[31:26] Reserved
257 volatile unsigned int dwValue;
260 typedef union _img_pitch_tag
262 struct _img_pitch_map
264 volatile unsigned int img_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
265 volatile unsigned int reserved_1 :22; //[31:10] Reserved
267 volatile unsigned int dwValue;
270 typedef union _img_disp_xy_tag
272 struct _img_disp_xy_map
274 volatile unsigned int img_disp_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
275 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
276 volatile unsigned int img_disp_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
277 volatile unsigned int reserved_1 :6; //[31:26] Reserved
279 volatile unsigned int dwValue;
282 typedef union _osd1_ctrl_tag
284 struct _osd1_ctrl_map
286 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
287 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
288 volatile unsigned int blk_alpha_sel :1; //[1] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
289 volatile unsigned int blk_format :4; //[6:3] osd data format
290 volatile unsigned int blk_endian :2; //[7] block data endian, 0: big endian (0123); 1: little endian (3210)
291 volatile unsigned int alpha_endian :2;
292 volatile unsigned int reserved :21; //[31:8] Reserved
294 volatile unsigned int dwValue;
297 typedef union _osd2_ctrl_tag
299 struct _osd2_ctrl_map
301 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
302 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
303 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
304 volatile unsigned int blk_format :4; //[6:3] osd data format
305 volatile unsigned int blk_endian :2; //[8:7] block data endian, 0: big endian (0123); 1: little endian (3210)
306 volatile unsigned int reserved :23; //[31:10] Reserved
308 volatile unsigned int dwValue;
311 typedef union _osd3_ctrl_tag
313 struct _osd3_ctrl_map
315 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
316 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
317 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
318 volatile unsigned int blk_format :4; //[6:3] osd data format
319 volatile unsigned int blk_endian :2; //[8:7] block data endian, 0: big endian (0123); 1: little endian (3210)
320 volatile unsigned int reserved :23; //[31:10] Reserved
322 volatile unsigned int dwValue;
325 typedef union _osd4_ctrl_tag
327 struct _osd4_ctrl_map
329 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
330 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
331 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
332 volatile unsigned int blk_format :4; //[6:3] osd data format
333 volatile unsigned int blk_endian :2; //[8:7] block data endian, 0: big endian (0123); 1: little endian (3210)
334 volatile unsigned int reserved :23; //[31:10] Reserved
336 volatile unsigned int dwValue;
339 typedef union _osd5_ctrl_tag
341 struct _osd5_ctrl_map
343 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
344 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
345 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
346 volatile unsigned int blk_format :4; //[6:3] osd data format
347 volatile unsigned int blk_endian :2; //[8:7] block data endian, 0: big endian (0123); 1: little endian (3210)
348 volatile unsigned int reserved :24; //[31:9] Reserved
350 volatile unsigned int dwValue;
353 typedef union _osd_ctrl_tag
357 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
358 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
359 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
360 volatile unsigned int blk_format :4; //[6:3] osd data format
361 volatile unsigned int blk_endian :2; //[8:7] block data endian, 0: big endian (0123); 1: little endian (3210)
362 volatile unsigned int reserved :23; //[31:9] Reserved
364 volatile unsigned int dwValue;
367 typedef union _osd_colorkey_rgb_tag
369 struct _osd_colorkey_map
371 volatile unsigned int osd_ck :24; //[23:0] Color-key value in OSD layer
372 volatile unsigned int reserved :8; //[31:24] Reserved
374 volatile unsigned int dwValue;
378 typedef union _osd_base_addr_ctrl_tag
380 struct _osd_base_addr_map
382 volatile unsigned int blk_base_addr :30; //[29:0] block base address
383 volatile unsigned int reserved :2; //[31:30] Reserved
385 volatile unsigned int dwValue;
388 typedef union _osd_alpha_base_addr_ctrl_tag
390 struct _osd_alpha_base_addr_map
392 volatile unsigned int blk_alpha_base_addr :30; //[29:0] block base address
393 volatile unsigned int reserved :2; //[31:30] Reserved
395 volatile unsigned int dwValue;
396 } OSD_ALPHA_BASE_ADDR_U;
398 typedef union _osd_size_xy_tag
400 struct _osd_size_xy_map
402 volatile unsigned int blk_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
403 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
404 volatile unsigned int blk_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
405 volatile unsigned int reserved_1 :6; //[31:26] Reserved
407 volatile unsigned int dwValue;
410 typedef union _osd_pitch_tag
412 struct _osd_pitch_map
414 volatile unsigned int blk_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
415 volatile unsigned int reserved_1 :22; //[31:10] Reserved
417 volatile unsigned int dwValue;
420 typedef union _osd_disp_xy_tag
422 struct _osd_disp_xy_map
424 volatile unsigned int blk_disp_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
425 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
426 volatile unsigned int blk_disp_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
427 volatile unsigned int reserved_1 :6; //[31:26] Reserved
429 volatile unsigned int dwValue;
432 typedef union _osd_alpha_tag
434 struct _osd_alpha_map
436 volatile unsigned int blk_alpha :8; //[7:0] Block alpha for block1 in OSD layer1, it is in 0~255
437 volatile unsigned int reserved_1 :24; //[31:8] Reserved
439 volatile unsigned int dwValue;
442 typedef union _osd_grey_rgb_tag
444 struct _osd_grey_rgb_map
446 volatile unsigned int blk_grey_rgb :24; //[23:0] Constant RGB for GREY data format.
447 volatile unsigned int reserved_1 :8; //[31:24] Reserved
449 volatile unsigned int dwValue;
452 typedef union _lcdc_cap_ctrl_tag
454 struct _lcdc_cap_ctrl_map
456 volatile unsigned int cap_en :1; //[1] Capture blended data control, 0: disable, 1: enable
457 volatile unsigned int cap_format :2; //[2:1] data save format, 00: RGB888, 01: rgb666, 10: RGB565, 11: reserved
458 volatile unsigned int cap_endian :2; //[3] Capture endian, 0: big endian, 1: little endian
459 volatile unsigned int reserved :27; //[31:4] Reserved
461 volatile unsigned int dwValue;
464 typedef union _cap_base_addr_tag
466 struct _cap_base_addr_map
468 volatile unsigned int base_addr :30; //[29:0] Capture base address
469 volatile unsigned int reserved :2; //[31:30] Reserved
471 volatile unsigned int dwValue;
474 typedef union _cap_size_xy_tag
476 struct _cap_size_xy_map
478 volatile unsigned int cap_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
479 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
480 volatile unsigned int cap_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
481 volatile unsigned int reserved_1 :6; //[31:26] Reserved
483 volatile unsigned int dwValue;
486 typedef union _cap_pitch_tag
488 struct _cap_pitch_map
490 volatile unsigned int cap_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
491 volatile unsigned int reserved :22; //[31:10] Reserved
493 volatile unsigned int dwValue;
496 typedef union _cap_start_xy_tag
498 struct _cap_start_xy_map
500 volatile unsigned int cap_start_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
501 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
502 volatile unsigned int cap_start_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
503 volatile unsigned int reserved_1 :6; //[31:26] Reserved
505 volatile unsigned int dwValue;
508 typedef union _y2r_ctrl_tag
512 volatile unsigned int upsample_mode :1; //[0] UV horizontal up-sampling mode, 0: duplicate, 1: average
513 volatile unsigned int reserved :31; //[31:1] Reserved
515 volatile unsigned int dwValue;
518 typedef union _y2r_contrast_tag
520 struct _y2r_contrast_map
522 volatile unsigned int contrast :8; //[7:0] Contrast config, 0~255
523 volatile unsigned int reserved :24; //[31:8] Reserved
525 volatile unsigned int dwValue;
528 typedef union _y2r_saturation_tag
530 struct _y2r_saturation_map
532 volatile unsigned int saturation :8; //[7:0] Saturation config, 0~255
533 volatile unsigned int reserved :24; //[31:8] Reserved
535 volatile unsigned int dwValue;
538 typedef union _y2r_brightness_tag
540 struct _y2r_brightness_map
542 volatile unsigned int brightness :9; //[8:0] Brightness config (S1.8), -256~255
543 volatile unsigned int reserved :23; //[31:9] Reserved
545 volatile unsigned int dwValue;
549 typedef union _lcdc_irq_en_tag
551 struct _lcdc_irq_en_map
553 volatile unsigned int irq_lcdc_done_en :1; //[0] Enable LCDC_DONE interrupt
554 volatile unsigned int irq_lcm_eof_en :1; //[1] Enable FRAME_END Interrupt
555 volatile unsigned int irq_lcm_sof_en :1; //[2] Enable CAP_DONE interrupt
556 volatile unsigned int irq_fmark_en :1; //[3] Enable FMARK interrupt, the interrupt is for LCDC detect a FMARK input.
557 volatile unsigned int reserved :28; //[31:3] Reserved
559 volatile unsigned int dwValue;
562 typedef union _lcdc_irq_clr_tag
564 struct _lcdc_irq_clr_map
566 volatile unsigned int irq_lcdc_done_clr :1; //[0] Write '1' to clear the DISP_DONE interrupt bit, and itself is cleared by HW.
567 volatile unsigned int irq_lcm_eof_clr :1; //[1] Write '1' to clear the FRAME_END interrupt bit, and itself is cleared by HW.
568 volatile unsigned int irq_lcm_sof_clr :1; //[2] Write '1' to clear the CAP_DONE interrupt bit, and itself is cleared by HW.
569 volatile unsigned int irq_fmark_clr :1; //[3] Write '1' to clear the FMARK interrupt bit, and itself is cleared by HW.
570 volatile unsigned int reserved :28; //[31:3] Reserved
572 volatile unsigned int dwValue;
576 typedef union _lcdc_irq_status_tag
578 struct _lcdc_irq_status_map
580 volatile unsigned int irq_lcdc_done_status :1; //[0] DISP_DONE interrupt status
581 volatile unsigned int irq_lcm_eof_status :1; //[1] FRAME_END interrupt status
582 volatile unsigned int irq_lcm_sof_status :1; //[2] CAP DONE interrupt status
583 volatile unsigned int irq_fmark_status :1; //[3] FMARK interrupt status
584 volatile unsigned int reserved :28; //[31:3] Reserved
586 volatile unsigned int dwValue;
589 typedef union _lcdc_irq_raw_tag
591 struct _lcdc_irq_raw_map
593 volatile unsigned int irq_lcdc_done_raw :1; //[0] DISP_DONE raw interrupt
594 volatile unsigned int irq_lcm_eof_raw :1; //[1] FRAME_END raw interrupt
595 volatile unsigned int irq_lcm_sof_raw :1; //[2] CAP DONE raw interrupt
596 volatile unsigned int irq_fmark_raw :1; //[3] FMARK raw interrupt
597 volatile unsigned int reserved :28; //[31:3] Reserved
599 volatile unsigned int dwValue;
602 typedef union _lcdc_ctrl_tag
604 struct _lcdc_ctrl_map
606 volatile unsigned int reserved_1 :16; //[31:16] Reserved ;
607 volatile unsigned int req_gap :8; //[15:8] The interval between 2 AHB master requests for each client.
608 volatile unsigned int reserved_2 :3; //[7:5] Reserved ;
609 volatile unsigned int dither_en :1; //[4] 0:disable; 1:enable
610 volatile unsigned int lcdc_run :1; //[3] 0: stop; 1:run
611 volatile unsigned int fmark_pol :1; //[2] 0: fmark valid at 1; 1: fmark valid at 0
612 volatile unsigned int fmark_mode :1; //[1] 0: fmark device; 1: non-fmark device
613 volatile unsigned int lcd_enable :1; //[0] 0:LCDC Disable;1:LCDC Enable
615 volatile unsigned int dwValue ;
619 typedef union _lcdc_disp_size_tag
621 struct _lcdc_disp_size_map
623 volatile unsigned int reserved_1 :6; //[31:26] Reserved
624 volatile unsigned int disp_size_y :10; //[25:16] display window vertical size, should be >0 and <1024
625 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
626 volatile unsigned int disp_size_x :10; //[9:0] display window horizontal size, should be >0 and <1024
628 volatile unsigned int dwValue;
631 typedef union _lcdc_lcm_start_tag
633 struct _lcdc_lcm_start_map
635 volatile unsigned int reserved_1 :6; //[31:26] Reserved
636 volatile unsigned int lcm_start_y :10; //[25:16] LCM refresh window start Y, should be >0 and <1024, guarantee the window in display region.
637 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
638 volatile unsigned int lcm_start_x :10; //[9:0] LCM refresh window start X, should be >0 and <1024, guarantee the window in display region.
640 volatile unsigned int dValue;
643 typedef union _lcdc_lcm_size_tag
645 struct _lcdc_lcm_size_map
647 volatile unsigned int reserved_1 :6; //[31:26] Reserved
648 volatile unsigned int lcm_size_y :10; //[25:16] LCM refresh window vertical size, should be >0 and <1024, guarantee the window in display region.
649 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
650 volatile unsigned int lcm_size_x :10; //[9:0] LCM refresh window horizontal size, should be >0 and <1024, guarantee the window in display region.
652 volatile unsigned int dValue;
655 typedef union _lcdc_bg_color_tag
657 struct _lcdc_bg_color_map
659 volatile unsigned int reserved :8; //[31:24] Reserved
660 volatile unsigned int bg_r :8; //[23:16] Background red
661 volatile unsigned int bg_g :8; //[15:8] Background green
662 volatile unsigned int bg_b :8; //[7:0] Background blue
664 volatile unsigned int dwValue;
667 typedef union _lcdc_fifo_status_tag
669 struct _lcdc_fifo_status_map
671 volatile unsigned int reserved :10; //[31:16] reserved
672 volatile unsigned int output_fifo_status :2; //[21:20] Cross domain FIFO;
673 //[15] - FIFO full status, '1' for full; [14] - FIFO empty status, '1' for empty.
674 volatile unsigned int dither_fifo_status :2; //[19:18] Dithering output FIFO, it is shared by capture and display.
675 //[13] - FIFO full status, '1' for full; [12]-FIFO empty status, '1' for empty.
676 volatile unsigned int y2r_fifo_status :2; //[17:16] YUV to RGB work FIFO
677 //[11] - FIFO full status, '1' for full; [10] - FIFO empty status, '1' for empty.
678 volatile unsigned int osd5_fifo_status :2; //[15:14]
679 volatile unsigned int osd4_fifo_status :2; //[13:12]
680 volatile unsigned int osd3_fifo_status :2; //[11:10]
681 volatile unsigned int osd2_fifo_status :2; //[9:8] Osd2 layer FIFO info.It is for osd2 layer data.
682 //[9] - FIFO full status, '1' for full; [8] - FIFO empty status, '1' for empty.
683 volatile unsigned int osd1_fifo_status :2; //[7:6] Osd1 layer FIFO info. It is for osd1 layer data.
684 //[7] - FIFO full status, '1' for full; [6] - FIFO empty status, '1' for empty.
685 volatile unsigned int osd1_alpha_fifo_status :2; //[5:4] Osd1 layer FIFO info. It is active when osd1 is RGB565 format with pixel alpha.
686 //[5] - FIFO full status, '1' for full; [4] - FIFO empty status, '1' for empty.
687 volatile unsigned int img_uv_fifo_status :2; //[3:2] Image layer FIFO info. It is active when image is YUV422 and YUV420 format. It is for UV data.
688 //[3] - FIFO full status, '1' for full; [2] - FIFO empty status, '1' for empty.
689 volatile unsigned int img_y_fifo_status :2; //[1:0] Image layer FIFO info. When image is YUV format, it is for Y data; when image is RGB format, it is for RGB data.
690 //status, '1' for full; [0] - FIFO empty status, '1' for empty.
692 volatile unsigned int dwValue;
693 } LCDC_FIFO_STATUS_U;
695 typedef union _img_ctrl_tag
699 #ifdef CHIP_VER_8800G1
700 volatile unsigned int reserved :26; //[31:6]
701 volatile unsigned int img_endian :1; //[5] Image layer data endian; 0: big endian(0123); 1: little endian(3210)
703 #ifdef CHIP_VER_8800G2
704 volatile unsigned int reserved :23; //[31:6]
705 volatile unsigned int img_y_endian :2;
706 volatile unsigned int img_uv_endian :2;
708 volatile unsigned int img_format :4; //[1:4] Image layer data format, it supports following ones:
717 volatile unsigned int img_en :1; //[0] Image layer enable; 0: disable; 1: enable
720 volatile unsigned int dwValue;
723 typedef union _img_y_base_addr_tag
725 struct _img_y_base_addr_map
727 volatile unsigned int reserved :2; //[31:30]
728 volatile unsigned int img_y_base_addr :30; //[29:0] //When image is YUV format, it is Y data base address;
730 volatile unsigned int dwValue;
733 typedef union _img_uv_base_addr_tag
735 struct _img_uv_base_addr_map
737 volatile unsigned int reserved :2; //[31:30]
738 volatile unsigned int img_uv_base_addr :30; //[29:0] //When image is YUV format, it is UV base address;
740 volatile unsigned int dwValue;
741 } IMG_UV_BASE_ADDR_U;
743 typedef union _img_size_xy_tag
745 struct _img_size_xy_map
747 volatile unsigned int reserved_1 :6; //[31:26] Reserved
748 volatile unsigned int img_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
749 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
750 volatile unsigned int img_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
752 volatile unsigned int dwValue;
755 typedef union _img_pitch_tag
757 struct _img_pitch_map
759 volatile unsigned int reserved_1 :22; //[31:10] Reserved
760 volatile unsigned int img_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
762 volatile unsigned int dwValue;
765 typedef union _img_disp_xy_tag
767 struct _img_disp_xy_map
769 volatile unsigned int reserved_1 :6; //[31:26] Reserved
770 volatile unsigned int img_disp_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
771 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
772 volatile unsigned int img_disp_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
774 volatile unsigned int dwValue;
777 typedef union _osd1_ctrl_tag
779 struct _osd1_ctrl_map
781 #ifdef CHIP_VER_8800G1
782 volatile unsigned int reserved :24; //[31:8] Reserved
783 volatile unsigned int blk_endian :1; //[7] block data endian, 0: big endian (0123); 1: little endian (3210)
785 #ifdef CHIP_VER_8800G2
786 volatile unsigned int reserved :21; //[31:8] Reserved
787 volatile unsigned int blk_endian :2; //[7] block data endian, 0: big endian (0123); 1: little endian (3210)
788 volatile unsigned int alpha_endian :2;
790 volatile unsigned int blk_format :4; //[6:3] osd data format
791 volatile unsigned int blk_alpha_sel :1; //[1] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
792 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
793 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
795 volatile unsigned int dwValue;
798 typedef union _osd2_ctrl_tag
800 struct _osd2_ctrl_map
802 #ifdef CHIP_VER_8800G1
803 volatile unsigned int reserved :24; //[31:10] Reserved
804 volatile unsigned int blk_endian :1; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
806 #ifdef CHIP_VER_8800G2
807 volatile unsigned int reserved :23; //[31:10] Reserved
808 volatile unsigned int blk_endian :2; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
810 volatile unsigned int blk_format :4; //[6:3] osd data format
811 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
812 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
813 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
815 volatile unsigned int dwValue;
818 typedef union _osd3_ctrl_tag
820 struct _osd3_ctrl_map
822 #ifdef CHIP_VER_8800G1
823 volatile unsigned int reserved :24; //[31:10] Reserved
824 volatile unsigned int blk_endian :1; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
826 #ifdef CHIP_VER_8800G2
827 volatile unsigned int reserved :23; //[31:10] Reserved
828 volatile unsigned int blk_endian :2;
830 volatile unsigned int blk_format :4; //[6:3] osd data format
831 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
832 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
833 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
835 volatile unsigned int dwValue;
838 typedef union _osd4_ctrl_tag
840 struct _osd4_ctrl_map
842 #ifdef CHIP_VER_8800G1
843 volatile unsigned int reserved :24; //[31:10] Reserved
844 volatile unsigned int blk_endian :1; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
846 #ifdef CHIP_VER_8800G2
847 volatile unsigned int reserved :23; //[31:10] Reserved
848 volatile unsigned int blk_endian :2;
850 volatile unsigned int blk_format :4; //[6:3] osd data format
851 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
852 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
853 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
855 volatile unsigned int dwValue;
858 typedef union _osd5_ctrl_tag
860 struct _osd5_ctrl_map
862 #ifdef CHIP_VER_8800G1
863 volatile unsigned int reserved :24; //[31:10] Reserved
864 volatile unsigned int blk_endian :1; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
866 #ifdef CHIP_VER_8800G2
867 volatile unsigned int reserved :23; //[31:10] Reserved
868 volatile unsigned int blk_endian :2;
870 volatile unsigned int blk_format :4; //[6:3] osd data format
871 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
872 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
873 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
875 volatile unsigned int dwValue;
878 typedef union _osd_ctrl_tag
882 #ifdef CHIP_VER_8800G1
883 volatile unsigned int reserved :24; //[31:10] Reserved
884 volatile unsigned int blk_endian :1; //[9] block data endian, 0: big endian (0123); 1: little endian (3210)
886 #ifdef CHIP_VER_8800G2
887 volatile unsigned int reserved :23; //[31:10] Reserved
888 volatile unsigned int blk_endian :2;
890 volatile unsigned int blk_format :4; //[6:3] osd data format
891 volatile unsigned int blk_alpha_sel :1; //[2] OSD layer1 block1 alpha selection, 0: pixel alpha; 1: block alpha
892 volatile unsigned int blk_ck_en :1; //[1] block color key enable, 0: disable; 1: enable
893 volatile unsigned int blk_en :1; //[0] block enable, 0: disable; 1: enable
895 volatile unsigned int dwValue;
898 typedef union _osd_colorkey_rgb_tag
900 struct _osd_colorkey_map
902 volatile unsigned int reserved :8; //[31:24] Reserved
903 volatile unsigned int osd_ck :24; //[23:0] Color-key value in OSD layer
905 volatile unsigned int dwValue;
909 typedef union _osd_base_addr_ctrl_tag
911 struct _osd_base_addr_map
913 volatile unsigned int reserved :2; //[31:30] Reserved
914 volatile unsigned int blk_base_addr :30; //[29:0] block base address
916 volatile unsigned int dwValue;
919 typedef union _osd_alpha_base_addr_ctrl_tag
921 struct _osd_alpha_base_addr_map
923 volatile unsigned int reserved :2; //[31:30] Reserved
924 volatile unsigned int blk_alpha_base_addr :30; //[29:0] block base address
926 volatile unsigned int dwValue;
927 } OSD_ALPHA_BASE_ADDR_U;
929 typedef union _osd_size_xy_tag
931 struct _osd_size_xy_map
933 volatile unsigned int reserved_1 :6; //[31:26] Reserved
934 volatile unsigned int blk_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
935 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
936 volatile unsigned int blk_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
938 volatile unsigned int dwValue;
941 typedef union _osd_pitch_tag
943 struct _osd_pitch_map
945 volatile unsigned int reserved_1 :22; //[31:10] Reserved
946 volatile unsigned int blk_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
948 volatile unsigned int dwValue;
951 typedef union _osd_disp_xy_tag
953 struct _osd_disp_xy_map
955 volatile unsigned int reserved_1 :6; //[31:26] Reserved
956 volatile unsigned int blk_disp_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
957 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
958 volatile unsigned int blk_disp_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
960 volatile unsigned int dwValue;
963 typedef union _osd_alpha_tag
965 struct _osd_alpha_map
967 volatile unsigned int reserved_1 :24; //[31:8] Reserved
968 volatile unsigned int blk_alpha :8; //[7:0] Block alpha for block1 in OSD layer1, it is in 0~255
970 volatile unsigned int dwValue;
973 typedef union _osd_grey_rgb_tag
975 struct _osd_grey_rgb_map
977 volatile unsigned int reserved_1 :8; //[31:24] Reserved
978 volatile unsigned int blk_grey_rgb :24; //[23:0] Constant RGB for GREY data format.
980 volatile unsigned int dwValue;
983 typedef union _lcdc_cap_ctrl_tag
985 struct _lcdc_cap_ctrl_map
987 #ifdef CHIP_VER_8800G1
988 volatile unsigned int reserved :28; //[31:4] Reserved
989 volatile unsigned int cap_endian :1; //[3] Capture endian, 0: big endian, 1: little endian
991 #ifdef CHIP_VER_8800G2
992 volatile unsigned int reserved :27; //[31:4] Reserved
993 volatile unsigned int cap_endian :2;
995 volatile unsigned int cap_format :2; //[2:1] data save format, 00: RGB888, 01: rgb666, 10: RGB565, 11: reserved
996 volatile unsigned int cap_en :1; //[1] Capture blended data control, 0: disable, 1: enable
998 volatile unsigned int dwValue;
1001 typedef union _cap_base_addr_tag
1003 struct _cap_base_addr_map
1005 volatile unsigned int reserved :2; //[31:30] Reserved
1006 volatile unsigned int base_addr :30; //[29:0] Capture base address
1008 volatile unsigned int dwValue;
1011 typedef union _cap_size_xy_tag
1013 struct _cap_size_xy_map
1015 volatile unsigned int reserved_1 :6; //[31:26] Reserved
1016 volatile unsigned int cap_size_y :10; //[25:16] Image layer window size in Y, should be >0 and <1024
1017 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
1018 volatile unsigned int cap_size_x :10; //[9:0] Image layer window size in X, should be >0 and <1024
1020 volatile unsigned int dwValue;
1023 typedef union _cap_pitch_tag
1025 struct _cap_pitch_map
1027 volatile unsigned int reserved :22; //[31:10] Reserved
1028 volatile unsigned int cap_pitch :10; //[9:0] Image layer data storage pitch, should be >0 and <1024.
1030 volatile unsigned int dwValue;
1033 typedef union _cap_start_xy_tag
1035 struct _cap_start_xy_map
1037 volatile unsigned int reserved_1 :6; //[31:26] Reserved
1038 volatile unsigned int cap_start_y :10; //[25:16] Image layer window start Y position in display plane, should be >0 and <1024
1039 volatile unsigned int reserved_2 :6; //[15: 10] Reserved
1040 volatile unsigned int cap_start_x :10; //[9:0] Image layer window start X position in display plane, should be >0 and <1024
1042 volatile unsigned int dwValue;
1045 typedef union _y2r_ctrl_tag
1047 struct _y2r_ctrl_map
1049 volatile unsigned int reserved :31; //[31:1] Reserved
1050 volatile unsigned int upsample_mode :1; //[0] UV horizontal up-sampling mode, 0: duplicate, 1: average
1052 volatile unsigned int dwValue;
1055 typedef union _y2r_contrast_tag
1057 struct _y2r_contrast_map
1059 volatile unsigned int reserved :24; //[31:8] Reserved
1060 volatile unsigned int contrast :8; //[7:0] Contrast config, 0~255
1062 volatile unsigned int dwValue;
1065 typedef union _y2r_saturation_tag
1067 struct _y2r_saturation_map
1069 volatile unsigned int reserved :24; //[31:8] Reserved
1070 volatile unsigned int saturation :8; //[7:0] Saturation config, 0~255
1072 volatile unsigned int dwValue;
1075 typedef union _y2r_brightness_tag
1077 struct _y2r_brightness_map
1079 volatile unsigned int reserved :23; //[31:9] Reserved
1080 volatile unsigned int brightness :9; //[8:0] Brightness config (S1.8), -256~255
1082 volatile unsigned int dwValue;
1086 typedef union _lcdc_irq_en_tag
1088 struct _lcdc_irq_en_map
1090 volatile unsigned int reserved :28; //[31:3] Reserved
1091 volatile unsigned int irq_fmark_en :1; //[3] Enable FMARK interrupt, the interrupt is for LCDC detect a FMARK input.
1092 volatile unsigned int irq_lcm_sof_en :1; //[2] Enable CAP_DONE interrupt
1093 volatile unsigned int irq_lcm_eof_en :1; //[1] Enable FRAME_END Interrupt
1094 volatile unsigned int irq_lcdc_done_en :1; //[0] Enable LCDC_DONE interrupt
1096 volatile unsigned int dwValue;
1099 typedef union _lcdc_irq_clr_tag
1101 struct _lcdc_irq_clr_map
1103 volatile unsigned int reserved :28; //[31:3] Reserved
1104 volatile unsigned int irq_fmark_clr :1; //[3] Write '1' to clear the FMARK interrupt bit, and itself is cleared by HW.
1105 volatile unsigned int irq_lcm_sof_clr :1; //[2] Write '1' to clear the CAP_DONE interrupt bit, and itself is cleared by HW.
1106 volatile unsigned int irq_lcm_eof_clr :1; //[1] Write '1' to clear the FRAME_END interrupt bit, and itself is cleared by HW.
1107 volatile unsigned int irq_lcdc_done_clr :1; //[0] Write '1' to clear the DISP_DONE interrupt bit, and itself is cleared by HW.
1109 volatile unsigned int dwValue;
1113 typedef union _lcdc_irq_status_tag
1115 struct _lcdc_irq_status_map
1117 volatile unsigned int reserved :28; //[31:3] Reserved
1118 volatile unsigned int irq_fmark_status :1; //[3] FMARK interrupt status
1119 volatile unsigned int irq_lcm_sof_status :1; //[2] CAP DONE interrupt status
1120 volatile unsigned int irq_lcm_eof_status :1; //[1] FRAME_END interrupt status
1121 volatile unsigned int irq_lcdc_done_status :1; //[0] DISP_DONE interrupt status
1123 volatile unsigned int dwValue;
1124 } LCDC_IRQ_STATUS_U;
1126 typedef union _lcdc_irq_raw_tag
1128 struct _lcdc_irq_raw_map
1130 volatile unsigned int reserved :28; //[31:3] Reserved
1131 volatile unsigned int irq_fmark_raw :1; //[3] FMARK raw interrupt
1132 volatile unsigned int irq_lcm_sof_raw :1; //[2] CAP DONE raw interrupt
1133 volatile unsigned int irq_lcm_eof_raw :1; //[1] FRAME_END raw interrupt
1134 volatile unsigned int irq_lcdc_done_raw :1; //[0] DISP_DONE raw interrupt
1136 volatile unsigned int dwValue;
1139 /**----------------------------------------------------------------------------*
1141 **----------------------------------------------------------------------------*/
1145 /**---------------------------------------------------------------------------*/