1 /******************************************************************************
2 ** File Name: adc_reg_v3.h *
5 ** Copyright: 2009 Spreatrum, Incoporated. All Rights Reserved. *
7 ******************************************************************************/
8 /******************************************************************************
10 **---------------------------------------------------------------------------*
11 ** DATE NAME DESCRIPTION *
12 ** 09/16/2009 Yi.Qiu Reconstruct ADC driver *
13 ** 05/07/2010 Mingwei.zhang Modify it for SC8800G. *
14 ******************************************************************************/
15 #ifndef _ADC_REG_V3_H_
16 #define _ADC_REG_V3_H_
17 /*----------------------------------------------------------------------------*
19 **------------------------------------------------------------------------- */
21 /**---------------------------------------------------------------------------*
23 **--------------------------------------------------------------------------*/
28 #include <asm/arch/sc8800g_reg_base.h>
29 /**---------------------------------------------------------------------------*
31 **---------------------------------------------------------------------------*/
32 /* ADC Ctronl Registers */
33 #define ADC_REG_BASE ADC_BASE
35 #define ADC_CTRL (ADC_REG_BASE + 0x0000)
36 #define ADC_CS (ADC_REG_BASE + 0x0004)
37 #define ADC_TPC_CH_CTRL (ADC_REG_BASE + 0x0008)
38 #define ADC_DAT (ADC_REG_BASE + 0x00C)
39 #define ADC_INT_EN (ADC_REG_BASE + 0x0010)
40 #define ADC_INT_CLR (ADC_REG_BASE + 0x0014)
41 #define ADC_INT_STAT (ADC_REG_BASE + 0x0018)
42 #define ADC_INT_SRC (ADC_REG_BASE + 0x001C)
45 #define ADC_STATUS_BIT BIT_4
46 #define ADC_TPC_CH_ON_BIT BIT_2
47 #define SW_CH_ON_BIT BIT_1
48 #define ADC_EN_BIT BIT_0
51 #define ADC_SCALE_BIT BIT_4
52 #define ADC_CS_BIT_MSK 0x0F
54 ////ADC_TPC_CH_CTRL bit map
55 #define ADC_TPC_X_CH_MSK 0x0F
56 #define ADC_TPC_Y_CH_OFFSET 4
57 #define ADC_TPC_Y_CH_MSK (0x0F << ADC_TPC_Y_CH_OFFSET)
60 #define ADC_IRQ_EN_BIT BIT_0
61 ///ADC_INT_CLR bit map
62 #define ADC_IRQ_CLR_BIT BIT_0
64 #define ADC_IRQ_RAW_BIT BIT_0
67 #define ADC_DATA_MSK 0x3FF
69 #define TPC_CHANNEL_X 2
70 #define TPC_CHANNEL_Y 3
72 #define ADC_CH_MAX_NUM 8
74 /**----------------------------------------------------------------------------*
76 **----------------------------------------------------------------------------*/
80 /**---------------------------------------------------------------------------*/
81 #endif //_ADC_REG_V3_H_