arch/arm/cpu/armv7/sc9630/ldo.c

   1 /******************************************************************************
   2  ** File Name:      ldo_drv.c                                             *
   3  ** Author:         Yi.Qiu                                                 *
   4  ** DATE:           01/09/2009                                                *
   5  ** Copyright:      2007 Spreatrum, Incoporated. All Rights Reserved.         *
   6  ** Description:    This file defines the basic function for ldo management.  *
   7  ******************************************************************************/
   8
   9 /******************************************************************************
  10  **                        Edit History                                       *
  11  ** ------------------------------------------------------------------------- *
  12  ** DATE           NAME             DESCRIPTION                               *
  13  ** 01/09/2009     Yi.Qiu        Create.                                   *
  14  ******************************************************************************/
  15
  16 /**---------------------------------------------------------------------------*
  17  **                         Dependencies                                      *
  18  **---------------------------------------------------------------------------*/
  19 #include <common.h>
  20 #include <asm/io.h>
  21
  22 #include <asm/arch/ldo.h>
  23 #include <asm/arch/chip_drv_common_io.h>
  24 #include <asm/arch/sprd_reg.h>
  25
  26 #define LDO_INVALID_REG 0xFFFFFFFF
  27 #define LDO_INVALID_BIT 0xFFFFFFFF
  28
  29
  30 #define CURRENT_STATUS_INIT     0x00000001
  31 #define CURRENT_STATUS_ON       0x00000002
  32 #define CURRENT_STATUS_OFF      0x00000004
  33
  34 #define LDO_INVALID_REG_ADDR    0x1
  35
  36 #define SCI_PASSERT(condition, format...)  \
  37         do {            \
  38                 if(!(condition)) { \
  39                         printf("function :%s\r\n", __FUNCTION__);\
  40                 } \
  41         }while(0)
  42
  43 #if defined(CONFIG_SPX15) || defined(CONFIG_ADIE_SC2723) || defined(CONFIG_ADIE_SC2723S)
  44 struct {
  45         LDO_ID_E id;
  46         const char *name;
  47 }__ldo_names[] = {
  48         {
  49                 .id = LDO_LDO_USB, .name = "vddusb",
  50         },
  51         {
  52                 .id = LDO_LDO_EMMCCORE, .name = "vddemmccore",
  53         },
  54 #if defined(CONFIG_ADIE_SC2723) || defined(CONFIG_ADIE_SC2723S)
  55         {
  56                 .id = LDO_LDO_SDIO0, .name = "vddsdcore",
  57         },
  58         {
  59                 .id = LDO_LDO_SDIO1, .name = "vddsdio",
  60         },
  61         {
  62                 .id = LDO_LDO_EMMCIO, .name = "vddgen1",
  63         },
  64 #else
  65         {
  66                 .id = LDO_LDO_EMMCIO, .name = "vddemmcio",
  67         },
  68         {
  69                 .id = LDO_LDO_SDIO0, .name = "vddsd",
  70         },
  71 #endif
  72         {
  73                 .id = LDO_LDO_SIM0, .name = "vddsim0",
  74         },
  75         {
  76                 .id = LDO_LDO_SIM1, .name = "vddsim1",
  77         },
  78         {
  79                 .id = LDO_LDO_SIM2, .name = "vddsim2",
  80         },
  81 };
  82
  83 const char* __LDO_NAME(LDO_ID_E ldo_id)
  84 {
  85         int i = 0;
  86         for(i = 0; i < ARRAY_SIZE(__ldo_names); i++) {
  87                 if (ldo_id == __ldo_names[i].id)
  88                         return __ldo_names[i].name;
  89         }
  90         return NULL;
  91 }
  92
  93 int LDO_Init(void)
  94 {
  95         return regulator_init();
  96 }
  97
  98 void LDO_TurnOffAllLDO(void)
  99 {
 100         unsigned int reg_val;
 101
 102         ANA_REG_SET(ANA_REG_GLB_PWR_WR_PROT_VALUE,BITS_PWR_WR_PROT_VALUE(0x6e7f));
 103
 104         do{
 105                 reg_val = (ANA_REG_GET(ANA_REG_GLB_PWR_WR_PROT_VALUE) & BIT_PWR_WR_PROT);
 106         }while(reg_val == 0);
 107
 108         ANA_REG_SET(ANA_REG_GLB_LDO_PD_CTRL,0x0FFF);
 109         ANA_REG_SET(ANA_REG_GLB_LDO_DCDC_PD,0x7FFF);
 110
 111         ANA_REG_SET(ANA_REG_GLB_PWR_WR_PROT_VALUE,BITS_PWR_WR_PROT_VALUE(0x0000));
 112         //never return here and wait power down action
 113         while(1);
 114 }
 115
 116 LDO_ERR_E LDO_TurnOffLDO(LDO_ID_E ldo_id)
 117 {
 118         return regulator_disable(__LDO_NAME(ldo_id));
 119 }
 120
 121 LDO_ERR_E LDO_TurnOnLDO(LDO_ID_E ldo_id)
 122 {
 123         return regulator_enable(__LDO_NAME(ldo_id));
 124 }
 125
 126 #else
 127
 128 struct ldo_ctl_info {
 129         /**
 130           need config area
 131          */
 132         LDO_ID_E id;
 133         unsigned int bp_reg;
 134         unsigned int bp_bits;
 135         unsigned int bp_rst_reg;
 136         unsigned int bp_rst;//bits
 137
 138         unsigned int level_reg_b0;
 139         unsigned int b0;
 140         unsigned int b0_rst;
 141
 142         unsigned int level_reg_b1;
 143         unsigned int b1;
 144         unsigned int b1_rst;
 145
 146         unsigned int init_level;
 147         /**
 148           not need config area
 149          */
 150         int ref;
 151         int current_status;
 152         int current_volt_level;
 153 };
 154
 155 static struct ldo_ctl_info ldo_ctl_data[] =
 156 {
 157         {
 158                 .id           = LDO_LDO_EMMCCORE,
 159                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 160                 .bp_bits      = BIT_8,
 161                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 162                 .bp_rst       = BIT_8,
 163                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 164                 .b0           = BIT_14,
 165                 .b0_rst       = BIT_14,
 166                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 167                 .b1           = BIT_15,
 168                 .b1_rst       = BIT_15,
 169                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 170         },
 171         {
 172                 .id           = LDO_LDO_EMMCIO,
 173                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 174                 .bp_bits      = BIT_7,
 175                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 176                 .bp_rst       = BIT_7,
 177                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 178                 .b0           = BIT_12,
 179                 .b0_rst       = BIT_12,
 180                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 181                 .b1           = BIT_13,
 182                 .b1_rst       = BIT_13,
 183                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 184         },
 185         {
 186                 .id           = LDO_LDO_RF2,
 187                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 188                 .bp_bits      = BIT_6,
 189                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 190                 .bp_rst       = BIT_6,
 191                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 192                 .b0           = BIT_10,
 193                 .b0_rst       = BIT_10,
 194                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 195                 .b1           = BIT_11,
 196                 .b1_rst       = BIT_11,
 197                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 198         },
 199         {
 200                 .id           = LDO_LDO_RF1,
 201                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 202                 .bp_bits      = BIT_5,
 203                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 204                 .bp_rst       = BIT_5,
 205                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 206                 .b0           = BIT_8,
 207                 .b0_rst       = BIT_8,
 208                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 209                 .b1           = BIT_9,
 210                 .b1_rst       = BIT_9,
 211                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 212         },
 213         {
 214                 .id           = LDO_LDO_RF0,
 215                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 216                 .bp_bits      = BIT_4,
 217                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 218                 .bp_rst       = BIT_4,
 219                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 220                 .b0           = BIT_6,
 221                 .b0_rst       = BIT_6,
 222                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 223                 .b1           = BIT_7,
 224                 .b1_rst       = BIT_7,
 225                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 226         },
 227         {
 228                 .id           = LDO_LDO_VDD25,
 229                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 230                 .bp_bits      = BIT_3,
 231                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 232                 .bp_rst       = BIT_3,
 233                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 234                 .b0           = BIT_4,
 235                 .b0_rst       = BIT_4,
 236                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 237                 .b1           = BIT_5,
 238                 .b1_rst       = BIT_5,
 239                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 240         },
 241         {
 242                 .id           = LDO_LDO_VDD28,
 243                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 244                 .bp_bits      = BIT_2,
 245                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 246                 .bp_rst       = BIT_2,
 247                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 248                 .b0           = BIT_2,
 249                 .b0_rst       = BIT_2,
 250                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 251                 .b1           = BIT_3,
 252                 .b1_rst       = BIT_3,
 253                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 254         },
 255         {
 256                 .id           = LDO_LDO_VDD18,
 257                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 258                 .bp_bits      = BIT_1,
 259                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 260                 .bp_rst       = BIT_1,
 261                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL0,
 262                 .b0           = BIT_0,
 263                 .b0_rst       = BIT_0,
 264                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL0,
 265                 .b1           = BIT_1,
 266                 .b1_rst       = BIT_1,
 267                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 268         },
 269         {
 270                 .id           = LDO_LDO_SIM2,
 271                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 272                 .bp_bits      = BIT_4,
 273                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 274                 .bp_rst       = BIT_4,
 275                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL1,
 276                 .b0           = BIT_8,
 277                 .b0_rst       = BIT_8,
 278                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL1,
 279                 .b1           = BIT_9,
 280                 .b1_rst       = BIT_9,
 281                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 282         },
 283         {
 284                 .id           = LDO_LDO_SIM1,
 285                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 286                 .bp_bits      = BIT_3,
 287                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 288                 .bp_rst       = BIT_3,
 289                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL1,
 290                 .b0           = BIT_6,
 291                 .b0_rst       = BIT_6,
 292                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL1,
 293                 .b1           = BIT_7,
 294                 .b1_rst       = BIT_7,
 295                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 296         },
 297         {
 298                 .id           = LDO_LDO_SIM0,
 299                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 300                 .bp_bits      = BIT_2,
 301                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 302                 .bp_rst       = BIT_2,
 303                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL1,
 304                 .b0           = BIT_4,
 305                 .b0_rst       = BIT_4,
 306                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL1,
 307                 .b1           = BIT_5,
 308                 .b1_rst       = BIT_5,
 309                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 310         },
 311         {
 312                 .id           = LDO_LDO_SDIO0,
 313                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 314                 .bp_bits      = BIT_1,
 315                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 316                 .bp_rst       = BIT_1,
 317                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL1,
 318                 .b0           = BIT_2,
 319                 .b0_rst       = BIT_2,
 320                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL1,
 321                 .b1           = BIT_3,
 322                 .b1_rst       = BIT_3,
 323                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 324         },
 325         {
 326                 .id           = LDO_LDO_AVDD18,
 327                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 328                 .bp_bits      = BIT_0,
 329                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 330                 .bp_rst       = BIT_0,
 331                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL1,
 332                 .b0           = BIT_0,
 333                 .b0_rst       = BIT_0,
 334                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL1,
 335                 .b1           = BIT_1,
 336                 .b1_rst       = BIT_1,
 337                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 338         },
 339         {
 340                 .id           = LDO_LDO_VBAT_RES,               //new
 341                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 342                 .bp_bits      = BIT_0,
 343                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 344                 .bp_rst       = BIT_0,
 345                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 346                 .b0           = BIT_14,
 347                 .b0_rst       = BIT_14,
 348                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 349                 .b1           = BIT_15,
 350                 .b1_rst       = BIT_15,
 351                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 352         },
 353         {
 354                 .id           = LDO_LDO_VBAT_V,                 //new
 355                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 356                 .bp_bits      = BIT_0,
 357                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 358                 .bp_rst       = BIT_0,
 359                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 360                 .b0           = BIT_12,
 361                 .b0_rst       = BIT_12,
 362                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 363                 .b1           = BIT_13,
 364                 .b1_rst       = BIT_13,
 365                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 366         },
 367         {
 368                 .id           = LDO_LDO_CLSG,
 369                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 370                 .bp_bits      = BIT_10,
 371                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 372                 .bp_rst       = BIT_10,
 373                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 374                 .b0           = BIT_10,
 375                 .b0_rst       = BIT_10,
 376                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 377                 .b1           = BIT_11,
 378                 .b1_rst       = BIT_11,
 379                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 380         },
 381         {
 382                 .id           = LDO_LDO_USB,
 383                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 384                 .bp_bits      = BIT_9,
 385                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 386                 .bp_rst       = BIT_9,
 387                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 388                 .b0           = BIT_8,
 389                 .b0_rst       = BIT_8,
 390                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 391                 .b1           = BIT_9,
 392                 .b1_rst       = BIT_9,
 393                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 394         },
 395         {
 396                 .id           = LDO_LDO_CAMM,  //LDO_LDO_CAMMOT
 397                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 398                 .bp_bits      = BIT_8,
 399                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 400                 .bp_rst       = BIT_8,
 401                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 402                 .b0           = BIT_6,
 403                 .b0_rst       = BIT_6,
 404                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 405                 .b1           = BIT_7,
 406                 .b1_rst       = BIT_7,
 407                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 408         },
 409         {
 410                 .id           = LDO_LDO_CAMD1,  //LDO_LDO_CAMIO
 411                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 412                 .bp_bits      = BIT_7,
 413                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 414                 .bp_rst       = BIT_7,
 415                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 416                 .b0           = BIT_4,
 417                 .b0_rst       = BIT_4,
 418                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 419                 .b1           = BIT_5,
 420                 .b1_rst       = BIT_5,
 421                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 422         },
 423         {
 424                 .id           = LDO_LDO_CAMD0,  //LDO_LDO_CAMCORE
 425                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 426                 .bp_bits      = BIT_6,
 427                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 428                 .bp_rst       = BIT_6,
 429                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 430                 .b0           = BIT_2,
 431                 .b0_rst       = BIT_2,
 432                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 433                 .b1           = BIT_3,
 434                 .b1_rst       = BIT_3,
 435                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 436         },
 437         {
 438                 .id           = LDO_LDO_CAMA,  //LDO_LDO_CAMA
 439                 .bp_reg       = ANA_REG_GLB_LDO_PD_CTRL,
 440                 .bp_bits      = BIT_5,
 441                 .bp_rst_reg   = ANA_REG_GLB_LDO_PD_CTRL,
 442                 .bp_rst       = BIT_5,
 443                 .level_reg_b0 = ANA_REG_GLB_LDO_V_CTRL2,
 444                 .b0           = BIT_0,
 445                 .b0_rst       = BIT_0,
 446                 .level_reg_b1 = ANA_REG_GLB_LDO_V_CTRL2,
 447                 .b1           = BIT_1,
 448                 .b1_rst       = BIT_1,
 449                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 450         },
 451 /**                config it later               **/
 452         {
 453                 .id           = LDO_DCDCARM,
 454                 .bp_reg       = LDO_INVALID_REG_ADDR,
 455                 .bp_bits      = 0,
 456                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 457                 .bp_rst       = 0,
 458                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 459                 .b0           = BIT_14,
 460                 .b0_rst       = BIT_14,
 461                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 462                 .b1           = BIT_15,
 463                 .b1_rst       = BIT_15,
 464                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 465         },
 466         {
 467                 .id           = LDO_LDO_ABB,
 468                 .bp_reg       = LDO_INVALID_REG_ADDR,
 469                 .bp_bits      = 0,
 470                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 471                 .bp_rst       = 0,
 472                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 473                 .b0           = BIT_14,
 474                 .b0_rst       = BIT_14,
 475                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 476                 .b1           = BIT_15,
 477                 .b1_rst       = BIT_15,
 478                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 479         },
 480         {
 481                 .id           = LDO_LDO_MEM,
 482                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 483                 .bp_bits      = BIT_11,
 484                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 485                 .bp_rst       = BIT_11,
 486                 .level_reg_b0 = ANA_REG_GLB_DCDC_MEM_ADI,
 487                 .b0           = BIT_5,
 488                 .b0_rst       = BIT_5,
 489                 .level_reg_b1 = ANA_REG_GLB_DCDC_MEM_ADI,
 490                 .b1           = BIT_6,
 491                 .b1_rst       = BIT_6,
 492                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 493         },
 494         {
 495                 .id           = LDO_DCDC,
 496                 .bp_reg       = LDO_INVALID_REG_ADDR,
 497                 .bp_bits      = 0,
 498                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 499                 .bp_rst       = 0,
 500                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 501                 .b0           = BIT_14,
 502                 .b0_rst       = BIT_14,
 503                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 504                 .b1           = BIT_15,
 505                 .b1_rst       = BIT_15,
 506                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 507         },
 508         {
 509                 .id           = LDO_LDO_BG,
 510                 .bp_reg       = LDO_INVALID_REG_ADDR,
 511                 .bp_bits      = 0,
 512                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 513                 .bp_rst       = 0,
 514                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 515                 .b0           = BIT_14,
 516                 .b0_rst       = BIT_14,
 517                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 518                 .b1           = BIT_15,
 519                 .b1_rst       = BIT_15,
 520                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 521         },
 522         {
 523                 .id           = LDO_LDO_AVB,
 524                 .bp_reg       = LDO_INVALID_REG_ADDR,
 525                 .bp_bits      = 0,
 526                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 527                 .bp_rst       = 0,
 528                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 529                 .b0           = BIT_14,
 530                 .b0_rst       = BIT_14,
 531                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 532                 .b1           = BIT_15,
 533                 .b1_rst       = BIT_15,
 534                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 535         },
 536         {
 537                 .id           = LDO_LDO_WIF1,
 538                 .bp_reg       = LDO_INVALID_REG_ADDR,
 539                 .bp_bits      = 0,
 540                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 541                 .bp_rst       = 0,
 542                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 543                 .b0           = BIT_14,
 544                 .b0_rst       = BIT_14,
 545                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 546                 .b1           = BIT_15,
 547                 .b1_rst       = BIT_15,
 548                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 549         },
 550         {
 551                 .id           = LDO_LDO_WIF0,
 552                 .bp_reg       = LDO_INVALID_REG_ADDR,
 553                 .bp_bits      = 0,
 554                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 555                 .bp_rst       = 0,
 556                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 557                 .b0           = BIT_14,
 558                 .b0_rst       = BIT_14,
 559                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 560                 .b1           = BIT_15,
 561                 .b1_rst       = BIT_15,
 562                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 563         },
 564         {
 565                 .id           = LDO_LDO_SDIO1,
 566                 .bp_reg       = LDO_INVALID_REG_ADDR,
 567                 .bp_bits      = 0,
 568                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 569                 .bp_rst       = 0,
 570                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 571                 .b0           = BIT_14,
 572                 .b0_rst       = BIT_14,
 573                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 574                 .b1           = BIT_15,
 575                 .b1_rst       = BIT_15,
 576                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 577         },
 578         {
 579                 .id           = LDO_LDO_RTC,
 580                 .bp_reg       = ANA_REG_GLB_LDO_DCDC_PD_RTCSET,
 581                 .bp_bits      = BIT_9,
 582                 .bp_rst_reg   = ANA_REG_GLB_LDO_DCDC_PD_RTCCLR,
 583                 .bp_rst       = BIT_9,
 584                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 585                 .b0           = BIT_14,
 586                 .b0_rst       = BIT_14,
 587                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 588                 .b1           = BIT_15,
 589                 .b1_rst       = BIT_15,
 590                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 591         },
 592         {
 593                 .id           = LDO_LDO_USBD,
 594                 .bp_reg       = LDO_INVALID_REG_ADDR,
 595                 .bp_bits      = 0,
 596                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 597                 .bp_rst       = 0,
 598                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 599                 .b0           = BIT_14,
 600                 .b0_rst       = BIT_14,
 601                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 602                 .b1           = BIT_15,
 603                 .b1_rst       = BIT_15,
 604                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 605         },
 606         {
 607                 .id           = LDO_LDO_VDD30,
 608                 .bp_reg       = LDO_INVALID_REG_ADDR,
 609                 .bp_bits      = 0,
 610                 .bp_rst_reg   = LDO_INVALID_REG_ADDR,
 611                 .bp_rst       = 0,
 612                 .level_reg_b0 = LDO_INVALID_REG_ADDR,
 613                 .b0           = BIT_14,
 614                 .b0_rst       = BIT_14,
 615                 .level_reg_b1 = LDO_INVALID_REG_ADDR,
 616                 .b1           = BIT_15,
 617                 .b1_rst       = BIT_15,
 618                 .init_level   = LDO_VOLT_LEVEL_FAULT_MAX,
 619         },
 620 };
 621
 622 /**---------------------------------------------------------------------------*
 623  **                         Function Declaration                              *
 624  **---------------------------------------------------------------------------*/
 625 static struct ldo_ctl_info* LDO_GetLdoCtl(LDO_ID_E ldo_id)
 626 {
 627         int i = 0;
 628         struct ldo_ctl_info* ctl = NULL;
 629
 630         for ( i = 0; i < ARRAY_SIZE(ldo_ctl_data); ++i)
 631         {
 632                 if (ldo_ctl_data[i].id == ldo_id)
 633                 {
 634                         ctl = &ldo_ctl_data[i];
 635                         break;
 636                 }
 637         }
 638
 639         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 640         return ctl;
 641 }
 642
 643 LDO_ERR_E LDO_TurnOnLDO(LDO_ID_E ldo_id)
 644 {
 645         struct ldo_ctl_info* ctl = NULL;
 646
 647         if (ldo_id == LDO_LDO_SDIO3)
 648         {
 649                 if (LDO_TurnOnLDO(LDO_LDO_EMMCCORE) != LDO_ERR_OK)
 650                         return LDO_ERR_ERR;
 651                 if (LDO_TurnOnLDO(LDO_LDO_EMMCIO)   != LDO_ERR_OK)
 652                         return LDO_ERR_ERR;
 653                 return LDO_ERR_OK;
 654         }
 655
 656         ctl = LDO_GetLdoCtl(ldo_id);
 657         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 658
 659         //if ((ctl->ref++) == 0)
 660         {
 661                 if(ctl->bp_reg == LDO_INVALID_REG_ADDR)
 662                 {
 663                         //if (LDO_LDO_USBD == ldo_id)
 664                         //      CHIP_REG_AND((~LDO_USB_PD), GR_CLK_GEN5);
 665                         return LDO_ERR_ERR;
 666                 }
 667                 else
 668                 {
 669                         ANA_REG_OR (ctl->bp_rst_reg, ctl->bp_rst);
 670                         ANA_REG_AND(ctl->bp_reg,     ~(ctl->bp_bits));
 671                 }
 672                 ctl->current_status = CURRENT_STATUS_ON;
 673         }
 674         return LDO_ERR_OK;
 675 }
 676
 677 LDO_ERR_E LDO_TurnOffLDO(LDO_ID_E ldo_id)
 678 {
 679         struct ldo_ctl_info* ctl = NULL;
 680
 681         if (ldo_id == LDO_LDO_SDIO3)
 682         {
 683                 if (LDO_TurnOffLDO(LDO_LDO_EMMCCORE) != LDO_ERR_OK)
 684                         return LDO_ERR_ERR;
 685                 if (LDO_TurnOffLDO(LDO_LDO_EMMCIO)   != LDO_ERR_OK)
 686                         return LDO_ERR_ERR;
 687                 return LDO_ERR_OK;
 688         }
 689
 690         ctl = LDO_GetLdoCtl(ldo_id);
 691         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 692
 693         //local_irq_save(flags);
 694
 695         //if ((--ctl->ref) == 0)
 696         {
 697                 if(ctl->bp_reg == LDO_INVALID_REG_ADDR)
 698                 {
 699                         //if (LDO_LDO_USBD == ldo_id)
 700                         //      CHIP_REG_OR((LDO_USB_PD), GR_CLK_GEN5);
 701                 }
 702                 else
 703                 {
 704                         ANA_REG_AND(ctl->bp_rst_reg, (~(ctl->bp_rst)));
 705                         ANA_REG_OR (ctl->bp_reg,     ctl->bp_bits);
 706                 }
 707                 ctl->current_status = CURRENT_STATUS_OFF;
 708         }
 709
 710         //local_irq_restore(flags);
 711
 712         return LDO_ERR_OK;
 713 }
 714
 715 int LDO_IsLDOOn(LDO_ID_E ldo_id)
 716 {
 717         unsigned int  masked_val = 0;
 718         struct ldo_ctl_info* ctl = NULL;
 719
 720         ctl = LDO_GetLdoCtl(ldo_id);
 721         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 722
 723         if (ctl->current_status == CURRENT_STATUS_INIT)
 724         {
 725                 masked_val = (LDO_REG_GET(ctl->bp_reg) & ctl->bp_bits);
 726         }
 727         else
 728         {
 729                 return (ctl->current_status == CURRENT_STATUS_OFF ? 0 : 1);
 730         }
 731
 732         return (masked_val ? 0 : 1);
 733 }
 734
 735 LDO_ERR_E LDO_SetVoltLevel(LDO_ID_E ldo_id, LDO_VOLT_LEVEL_E volt_level)
 736 {
 737         unsigned short reg_data;
 738         struct ldo_ctl_info* ctl = NULL;
 739
 740         ctl = LDO_GetLdoCtl(ldo_id);
 741         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 742
 743         if (ctl->level_reg_b0 == LDO_INVALID_REG_ADDR)
 744         {
 745                 goto Err_Exit;
 746         }
 747
 748         if (ctl->level_reg_b0 != ctl->level_reg_b1)
 749         {
 750                 printf("ldo_id:%d, level_reg_b0:%08x, level_reg_b1:%08x\r\n", ldo_id, ctl->level_reg_b0, ctl->level_reg_b1);
 751                 goto Err_Exit;
 752         }
 753
 754         switch (volt_level)
 755         {
 756                 case LDO_VOLT_LEVEL0:
 757                         ANA_REG_AND(ctl->level_reg_b0, (~(ctl->b0|ctl->b1)));
 758                         break;
 759
 760                 case LDO_VOLT_LEVEL1:
 761                         reg_data = ANA_REG_GET(ctl->level_reg_b0);
 762                         reg_data &=~ctl->b1;
 763                         reg_data |= ctl->b0;
 764                         ANA_REG_SET(ctl->level_reg_b0, reg_data);
 765                         break;
 766
 767                 case LDO_VOLT_LEVEL2:
 768                         reg_data = ANA_REG_GET(ctl->level_reg_b0);
 769                         reg_data &=~ctl->b0;
 770                         reg_data |= ctl->b1;
 771                         ANA_REG_SET(ctl->level_reg_b0, reg_data);
 772                         break;
 773
 774                 case LDO_VOLT_LEVEL3:
 775                         ANA_REG_OR (ctl->level_reg_b0, (ctl->b0|ctl->b1));
 776                         break;
 777
 778                 default:
 779                         goto Err_Exit;
 780         }
 781
 782         ctl->current_volt_level = volt_level;
 783         return LDO_ERR_OK;
 784 Err_Exit:
 785         return LDO_ERR_ERR;
 786 }
 787
 788 LDO_VOLT_LEVEL_E LDO_GetVoltLevel(LDO_ID_E ldo_id)
 789 {
 790         unsigned int level_ret = 0;
 791         struct ldo_ctl_info* ctl = NULL;
 792
 793         ctl = LDO_GetLdoCtl(ldo_id);
 794         SCI_PASSERT(ctl != NULL, ("ldo_id = %d", ldo_id));
 795
 796         if (ctl->current_volt_level == LDO_VOLT_LEVEL_FAULT_MAX)
 797         {
 798                 if(ctl->level_reg_b0 == ctl->level_reg_b1)
 799                 {
 800                         level_ret = 0;
 801                 }
 802                 else
 803                 {
 804                         level_ret = 0;
 805                         SCI_PASSERT(0, ("shakr b0 must equal b1!"));
 806                 }
 807         }
 808         else
 809         {
 810                 level_ret = ctl->current_volt_level;
 811         }
 812
 813         return level_ret;
 814 }
 815
 816 int LDO_Init(void)
 817 {
 818         int i;
 819         for ( i = 0; i < ARRAY_SIZE(ldo_ctl_data); ++i)
 820         {
 821                 if( ldo_ctl_data[i].init_level != LDO_VOLT_LEVEL_FAULT_MAX)
 822                 {
 823                         LDO_SetVoltLevel(ldo_ctl_data[i].id, ldo_ctl_data[i].init_level);
 824                 }
 825                 ldo_ctl_data[i].ref = 0;
 826                 ldo_ctl_data[i].current_status = CURRENT_STATUS_INIT;
 827                 ldo_ctl_data[i].current_volt_level = ldo_ctl_data[i].init_level;
 828         }
 829         return LDO_ERR_OK;
 830 }
 831
 832 static void LDO_TurnOffCoreLDO(void)
 833 {
 834         ANA_REG_SET(ANA_REG_GLB_LDO_DCDC_PD_RTCCLR, 0x0);
 835         ANA_REG_SET(ANA_REG_GLB_LDO_DCDC_PD_RTCSET, 0x7FFF);
 836 }
 837
 838 static void LDO_TurnOffAllModuleLDO(void)
 839 {
 840         ANA_REG_SET(ANA_REG_GLB_LDO_PD_CTRL, 0x1FFF);
 841 }
 842
 843 void LDO_TurnOffAllLDO(void)
 844 {
 845         LDO_TurnOffAllModuleLDO();
 846         LDO_TurnOffCoreLDO();
 847 }
 848
 849 #endif/*sc8830*/