2 #include <asm/arch/adc_reg_v3.h>
3 #include <asm/arch/regs_adi.h>
4 #include <asm/arch/regs_ana.h>
5 #include <asm/arch/adc_drvapi.h>
6 #include <asm/arch/adi_hal_internal.h>
8 #define pr_err(fmt...) printf(fmt)
9 #define pr_warning(fmt...) printf(fmt)
14 ANA_REG_OR(ANA_APB_ARM_RST, ADC_RST_BIT);
15 for(i = 0; i < 0xff; i++);
16 ANA_REG_AND(ANA_APB_ARM_RST, ~ADC_RST_BIT);
17 ANA_REG_OR(ANA_APB_CLK_EN, ADC_EB | CLK_AUXAD_EN | CLK_AUXADC_EN);
18 ANA_REG_OR(ADC_CTRL, ADC_EN_BIT);
19 ANA_REG_OR(ADC_CTRL, ADC_MODE_12B);
22 void ADC_SetCs(adc_channel id)
25 pr_err("adc limits to 0~%d\n", ADC_MAX);
29 ANA_REG_MSK_OR(ADC_CS, id, ADC_CS_BIT_MSK);
32 void ADC_SetScale(bool scale)
34 if(ADC_SCALE_1V2 == scale){
35 ANA_REG_AND(ADC_CS, ~ADC_SCALE_BIT);
36 }else if(ADC_SCALE_3V == scale){
37 ANA_REG_OR(ADC_CS, ADC_SCALE_BIT);
39 pr_err("adc scale %d not support\n", scale);
42 int32_t ADC_GetValues(adc_channel id, bool scale, uint8_t num, int32_t *p_buf)
48 ANA_REG_OR(ADC_INT_CLR, ADC_IRQ_CLR_BIT);
56 /* set read numbers run ADC soft channel */
60 ANA_REG_MSK_OR(ADC_CTRL, BIT_SW_CH_RUN_NUM(num), SW_CH_NUM_MSK);
61 ANA_REG_OR(ADC_CTRL, SW_CH_ON_BIT);
63 /* wait adc complete */
65 while(!(ANA_REG_GET(ADC_INT_SRC)&ADC_IRQ_RAW_BIT) && count--) {
66 for (i = 0; i < 0xFF; i++);
69 pr_warning("WARNING: ADC_GetValue timeout....\n");
73 for (i = 0; i < num; i++) {
74 p_buf[i] = ANA_REG_GET(ADC_DAT) & ADC_DATA_MSK;
77 ANA_REG_AND(ADC_CTRL, ~SW_CH_ON_BIT); // turn off adc soft channel
80 int32_t ADC_GetValue(adc_channel id, bool scale)
84 if (-1 == ADC_GetValues(id, scale, 1, &result)) {