2 * Copyright (C) 2012 Spreadtrum Communications Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 ************************************************
14 * Automatically generated C config: don't edit *
15 ************************************************
18 #ifndef __CTL_EFUSE_H__
19 #define __CTL_EFUSE_H__
20 #define BIT(x) (1<<(x))
25 /* registers definitions for controller CTL_EFUSE */
26 #define REG_EFUSE_DATA_RD SCI_ADDRESS(CTL_EFUSE_BASE, 0x0000)
27 #define REG_EFUSE_DATA_WR SCI_ADDRESS(CTL_EFUSE_BASE, 0x0004)
28 #define REG_EFUSE_BLOCK_INDEX SCI_ADDRESS(CTL_EFUSE_BASE, 0x0008)
29 #define REG_EFUSE_MODE_CTRL SCI_ADDRESS(CTL_EFUSE_BASE, 0x000c)
30 #define REG_EFUSE_PGM_PARA SCI_ADDRESS(CTL_EFUSE_BASE, 0x0010)
31 #define REG_EFUSE_STATUS SCI_ADDRESS(CTL_EFUSE_BASE, 0x0014)
32 #define REG_EFUSE_BLK_FLAGS SCI_ADDRESS(CTL_EFUSE_BASE, 0x0018)
33 #define REG_EFUSE_BLK_CLR SCI_ADDRESS(CTL_EFUSE_BASE, 0x001c)
34 #define REG_EFUSE_MAGIC_NUMBER SCI_ADDRESS(CTL_EFUSE_BASE, 0x0020)
36 /* bits definitions for register REG_EFUSE_BLOCK_INDEX */
37 #define BITS_READ_INDEX(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)) )
38 #define BITS_PGM_INDEX(_x_) ( (_x_) << 16 & (BIT(16)|BIT(17)|BIT(18)) )
40 #define SHIFT_READ_INDEX ( 0 )
41 #define MASK_READ_INDEX ( BIT(0)|BIT(1)|BIT(2) )
43 #define SHIFT_PGM_INDEX ( 16 )
44 #define MASK_PGM_INDEX ( BIT(16)|BIT(17)|BIT(18) )
46 /* bits definitions for register REG_EFUSE_MODE_CTRL */
47 #define BIT_PG_START ( BIT(0) )
48 #define BIT_RD_START ( BIT(1) )
49 #define BIT_STANDBY_START ( BIT(2) )
51 /* bits definitions for register REG_EFUSE_PGM_PARA */
52 #define BITS_TPGM_TIME_CNT(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)) )
53 #define BIT_CLK_EFS_EN ( BIT(28) )
54 #define BIT_EFUSE_VDD_ON ( BIT(29) )
55 #define BIT_PCLK_DIV_EN ( BIT(30) )
56 #define BIT_PGM_EN ( BIT(31) )
58 /* bits definitions for register REG_EFUSE_STATUS */
59 #define BIT_PGM_BUSY ( BIT(0) )
60 #define BIT_READ_BUSY ( BIT(1) )
61 #define BIT_STANDBY_BUSY ( BIT(2) )
63 /* bits definitions for register REG_EFUSE_BLK_FLAGS */
64 #define BIT_BLK0_PROT_FLAG ( BIT(0) )
65 #define BIT_BLK1_PROT_FLAG ( BIT(1) )
66 #define BIT_BLK2_PROT_FLAG ( BIT(2) )
67 #define BIT_BLK3_PROT_FLAG ( BIT(3) )
68 #define BIT_BLK4_PROT_FLAG ( BIT(4) )
69 #define BIT_BLK5_PROT_FLAG ( BIT(5) )
70 #define BIT_BLK6_PROT_FLAG ( BIT(6) )
71 #define BIT_BLK7_PROT_FLAG ( BIT(7) )
73 /* bits definitions for register REG_EFUSE_BLK_CLR */
74 #define BIT_BLK0_PROT_FLAG_CLR ( BIT(0) )
75 #define BIT_BLK1_PROT_FLAG_CLR ( BIT(1) )
76 #define BIT_BLK2_PROT_FLAG_CLR ( BIT(2) )
77 #define BIT_BLK3_PROT_FLAG_CLR ( BIT(3) )
78 #define BIT_BLK4_PROT_FLAG_CLR ( BIT(4) )
79 #define BIT_BLK5_PROT_FLAG_CLR ( BIT(5) )
80 #define BIT_BLK6_PROT_FLAG_CLR ( BIT(6) )
81 #define BIT_BLK7_PROT_FLAG_CLR ( BIT(7) )
83 /* bits definitions for register REG_EFUSE_MAGIC_NUMBER */
84 #define BITS_MAGIC_NUMBER(_x_) ( (_x_) << 0 & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
86 /* vars definitions for controller CTL_EFUSE */
87 #define PROT_LOCK ( BIT_31 )
89 #endif //__CTL_EFUSE_H__