2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm-offsets.h>
39 #if defined(CONFIG_OMAP1610)
40 #include <./configs/omap1510.h>
41 #elif defined(CONFIG_OMAP730)
42 #include <./configs/omap730.h>
46 *************************************************************************
48 * Jump vector table as in table 3.1 in [1]
50 *************************************************************************
59 #ifdef CONFIG_PRELOADER
60 /* No exception handlers in preloader */
71 /* pad to 64 byte boundary */
80 ldr pc, _undefined_instruction
81 ldr pc, _software_interrupt
82 ldr pc, _prefetch_abort
88 _undefined_instruction:
89 .word undefined_instruction
91 .word software_interrupt
103 #endif /* CONFIG_PRELOADER */
104 .balignl 16,0xdeadbeef
108 *************************************************************************
110 * Startup Code (reset vector)
112 * do important init only if we don't start from memory!
113 * setup Memory and board specific bits prior to relocation.
114 * relocate armboot to ram
117 *************************************************************************
122 .word CONFIG_SYS_TEXT_BASE
125 * These are defined in the board-specific linker script.
126 * Subtracting _start from them lets the linker put their
127 * relative position in the executable instead of leaving
130 .globl _bss_start_ofs
132 .word __bss_start - _start
138 #ifdef CONFIG_USE_IRQ
139 /* IRQ stack memory (calculated at run-time) */
140 .globl IRQ_STACK_START
144 /* IRQ stack memory (calculated at run-time) */
145 .globl FIQ_STACK_START
150 /* IRQ stack memory (calculated at run-time) + 8 bytes */
151 .globl IRQ_STACK_START_IN
156 * the actual reset code
161 * set the cpu to SVC32 mode
163 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
164 #ifdef SPRD_EVM_TAG_ON
165 ldr r0,=SPRD_EVM_ADDR_START
178 time: subs r1,r1,#0x1
183 * we do sys-critical inits only at reboot,
184 * not when booting from ram!
186 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
192 /* Set stackpointer in internal RAM to call board_init_f */
194 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
195 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
196 #ifndef CONFIG_NAND_SPL
200 ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
202 ldr r2, =(CONFIG_SYS_TEXT_BASE)
206 /*------------------------------------------------------------------------------*/
209 * void relocate_code (addr_sp, gd, addr_moni)
211 * This "function" does not return, instead it continues in RAM
212 * after relocating the monitor code.
217 mov r4, r0 /* save addr_sp */
218 mov r5, r1 /* save addr of gd */
219 mov r6, r2 /* save addr of destination */
221 /* Set up the stack */
226 ldr r6, =(CONFIG_SYS_TEXT_BASE)
229 beq clear_bss /* skip relocation */
230 mov r1, r6 /* r1 <- scratch for copy loop */
232 ldr r3, _bss_start_ofs
233 add r2, r0, r3 /* r2 <- source end address */
236 ldmia r0!, {r9-r10} /* copy from source address [r0] */
237 stmia r1!, {r9-r10} /* copy to target address [r1] */
238 cmp r0, r2 /* until source end address [r2] */
241 #ifndef CONFIG_PRELOADER
243 * fix .rel.dyn relocations
245 ldr r0, _TEXT_BASE /* r0 <- Text base */
246 sub r9, r6, r0 /* r9 <- relocation offset */
247 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
248 add r10, r10, r0 /* r10 <- sym table in FLASH */
249 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
250 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
251 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
252 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
254 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
255 add r0, r0, r9 /* r0 <- location to fix up in RAM */
258 cmp r7, #23 /* relative fixup? */
260 cmp r7, #2 /* absolute fixup? */
262 /* ignore unknown type of fixup */
265 /* absolute fix: set location to (offset) symbol value */
266 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
267 add r1, r10, r1 /* r1 <- address of symbol in table */
268 ldr r1, [r1, #4] /* r1 <- symbol value */
269 add r1, r1, r9 /* r1 <- relocated sym addr */
272 /* relative fix: increase location by offset */
277 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
283 #ifndef CONFIG_PRELOADER
284 ldr r0, _bss_start_ofs
286 ldr r3, _TEXT_BASE /* Text base */
287 mov r4, r6 /* reloc addr */
290 mov r2, #0x00000000 /* clear */
292 clbss_l:str r2, [r0] /* clear loop... */
302 * We are done. Do not return, instead branch to second part of board
303 * initialization, now running from RAM.
305 #ifdef CONFIG_NAND_SPL
306 ldr r0, _nand_boot_ofs
312 ldr r0, _board_init_r_ofs
316 /* setup parameters for board_init_r */
317 mov r0, r5 /* gd_t */
318 mov r1, r6 /* dest_addr */
323 .word board_init_r - _start
327 .word __rel_dyn_start - _start
329 .word __rel_dyn_end - _start
331 .word __dynsym_start - _start
334 *************************************************************************
336 * CPU_init_critical registers
338 * setup important registers
339 * setup memory timing
341 *************************************************************************
343 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
346 * flush v4 I/D caches
349 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
350 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
353 * disable MMU stuff and caches
355 mrc p15, 0, r0, c1, c0, 0
356 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
357 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
358 ;orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
359 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
360 mcr p15, 0, r0, c1, c0, 0
363 * Go setup Memory and board specific bits prior to relocation.
365 mov ip, lr /* perserve link reg across call */
366 @ bl lowlevel_init /* go setup pll,mux,memory */
367 mov lr, ip /* restore link */
368 mov pc, lr /* back to my caller */
369 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
371 #ifndef CONFIG_PRELOADER
373 *************************************************************************
377 *************************************************************************
383 #define S_FRAME_SIZE 72
405 #define MODE_SVC 0x13
409 * use bad_save_user_regs for abort/prefetch/undef/swi ...
410 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
413 .macro bad_save_user_regs
414 @ carve out a frame on current user stack
415 sub sp, sp, #S_FRAME_SIZE
416 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
417 ldr r2, IRQ_STACK_START_IN
418 @ get values for "aborted" pc and cpsr (into parm regs)
420 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
423 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
424 mov r0, sp @ save current stack into r0 (param register)
427 .macro irq_save_user_regs
428 sub sp, sp, #S_FRAME_SIZE
429 stmia sp, {r0 - r12} @ Calling r0-r12
430 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
432 stmdb r8, {sp, lr}^ @ Calling SP, LR
433 str lr, [r8, #0] @ Save calling PC
435 str r6, [r8, #4] @ Save CPSR
436 str r0, [r8, #8] @ Save OLD_R0
440 .macro irq_restore_user_regs
441 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
443 ldr lr, [sp, #S_PC] @ Get PC
444 add sp, sp, #S_FRAME_SIZE
445 subs pc, lr, #4 @ return & move spsr_svc into cpsr
449 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
451 str lr, [r13] @ save caller lr in position 0 of saved stack
452 mrs lr, spsr @ get the spsr
453 str lr, [r13, #4] @ save spsr in position 1 of saved stack
454 mov r13, #MODE_SVC @ prepare SVC-Mode
456 msr spsr, r13 @ switch modes, make sure moves will execute
457 mov lr, pc @ capture return pc
458 movs pc, lr @ jump to next instruction & switch modes.
461 .macro get_irq_stack @ setup IRQ stack
462 ldr sp, IRQ_STACK_START
465 .macro get_fiq_stack @ setup FIQ stack
466 ldr sp, FIQ_STACK_START
468 #endif /* CONFIG_PRELOADER */
473 #ifdef CONFIG_PRELOADER
476 ldr sp, _TEXT_BASE /* switch to abort stack */
478 bl 1b /* hang and never return */
479 #else /* !CONFIG_PRELOADER */
481 undefined_instruction:
484 bl do_undefined_instruction
490 bl do_software_interrupt
510 #ifdef CONFIG_USE_IRQ
517 irq_restore_user_regs
522 /* someone ought to write a more effiction fiq_save_user_regs */
525 irq_restore_user_regs
542 #endif /* CONFIG_PRELOADER */