1 /* linux/arch/arm/mach-exynos/include/mach/smc.h
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ASM_ARCH_SMC_H
14 #define __ASM_ARCH_SMC_H __FILE__
16 #define SMC_CMD_INIT (-1)
17 #define SMC_CMD_INFO (-2)
18 /* For Power Management */
19 #define SMC_CMD_SLEEP (-3)
20 #define SMC_CMD_CPU1BOOT (-4)
21 #define SMC_CMD_CPU0AFTR (-5)
23 #define SMC_CMD_C15RESUME (-11)
24 /* For L2 Cache Access */
25 #define SMC_CMD_L2X0CTRL (-21)
26 #define SMC_CMD_L2X0SETUP1 (-22)
27 #define SMC_CMD_L2X0SETUP2 (-23)
28 #define SMC_CMD_L2X0INVALL (-24)
29 #define SMC_CMD_L2X0DEBUG (-25)
31 /* For Accessing CP15/SFR (General) */
32 #define SMC_CMD_REG (-101)
34 /* For Custom Binary Info. Access */
35 #define SMC_CMD_STORE_BINFO (-201)
37 /* MACRO for SMC_CMD_REG */
38 #define SMC_REG_CLASS_CP15 (0x0 << 30)
39 #define SMC_REG_CLASS_SFR_W (0x1 << 30)
40 #define SMC_REG_CLASS_SFR_R (0x3 << 30)
41 #define SMC_REG_CLASS_MASK (0x3 << 30)
42 #define SMC_REG_ID_CP15(CRn, Op1, CRm, Op2) \
43 (SMC_REG_CLASS_CP15 | \
44 ((CRn) << 10) | ((Op1) << 7) | ((CRm) << 3) | (Op2))
45 #define SMC_REG_ID_SFR_W(ADDR) (SMC_REG_CLASS_SFR_W | ((ADDR) >> 2))
46 #define SMC_REG_ID_SFR_R(ADDR) (SMC_REG_CLASS_SFR_R | ((ADDR) >> 2))
49 extern u32 exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3);
50 extern u32 exynos_smc_readsfr(u32 addr, u32 *val);
53 #endif /* __ASM_ARCH_SMC_H */