Initial commit
[kernel/linux-3.0.git] / drivers / input / touchscreen / melfas_download.h
1 //------------------------------------------------------------------
2 //
3 //      MELFAS Firmware download base code v6 For MCS5080 2008/11/04
4 //
5 //------------------------------------------------------------------
6
7 #ifndef __MELFAS_FIRMWARE_DOWNLOAD_H__
8 #define __MELFAS_FIRMWARE_DOWNLOAD_H__
9
10 //============================================================
11 //
12 //      Porting section 1. Type define
13 //
14 //============================================================
15
16 typedef char                            INT8;
17 typedef unsigned char           UINT8;
18 typedef short                           INT16;
19 typedef unsigned short          UINT16;
20 typedef int                                     INT32;
21 typedef unsigned int            UINT32;
22 typedef unsigned char           BOOLEAN;
23
24
25 #ifndef TRUE
26 #define TRUE                            (1==1)
27 #endif
28
29 #ifndef FALSE
30 #define FALSE                           (1==0)
31 #endif
32
33 #ifndef NULL
34 #define NULL                            0
35 #endif
36
37 //============================================================
38 //      Baseand include
39 //============================================================
40 //#include "drv_io.h"
41 //#include "drv_i2c.h"
42 //#include "drv_uart.h"
43
44 //============================================================
45 //
46 //      Porting section 2. Options
47 //
48 //============================================================
49
50 // Selection of i2c function ( This must be 1 )
51 #define USE_BASEBAND_I2C_FUNCTION                                                                               1
52
53 // Disable downlaoding, if module version does not match.
54 #define MELFAS_DISABLE_DOWNLOAD_IF_MODULE_VERSION_DOES_NOT_MATCH                0
55
56 // If 'enable download command' is needed ( Pinmap dependent option ).
57 #define MELFAS_USE_PROTOCOL_COMMAND_FOR_DOWNLOAD                                                0
58
59 // For printing debug information. ( Please check 'printing function' )
60 #define MELFAS_ENABLE_DBG_PRINT                                                                                 1
61 #define MELFAS_ENABLE_DBG_PROGRESS_PRINT                                                                1
62
63 // For delay function test. ( Disable after Porting is finished )
64 #define MELFAS_ENABLE_DELAY_TEST                                                                                0
65
66
67 //============================================================
68 //
69 //      Port setting. ( Melfas preset this value. Just use default )
70 //
71 //============================================================
72
73 // Set 1 if Enabled.
74 #define MCSDL_USE_CE_CONTROL                                            0
75 #define MCSDL_USE_INTR_CONTROL                                          1
76 #define MCSDL_USE_VDD_CONTROL                                           1
77 #define MCSDL_USE_RESETB_CONTROL                                        0
78
79
80 //============================================================
81 //
82 //      Porting section 3. IO Control poting.
83 //
84 //      Fill up 'I2C IO'
85 //      Fill up 'USE_CONTROL' only on upper setting.
86 //
87 //============================================================
88
89 //----------------
90 // VDD
91 //----------------
92 #if MCSDL_USE_VDD_CONTROL
93 #define TKEY_VDD_SET_HIGH()                                     gpio_direction_output(_3_GPIO_TOUCH_EN, 1);                                     //
94 #define TKEY_VDD_SET_LOW()                                      gpio_direction_output(_3_GPIO_TOUCH_EN, 0);                                     //
95 #else
96 #define TKEY_VDD_SET_HIGH()                                                                                                     // Nothing
97 #define TKEY_VDD_SET_LOW()                                                                                                      // Nothing
98 #endif
99
100 //----------------
101 // CE
102 //----------------
103 #if MCSDL_USE_CE_CONTROL
104 #define TKEY_CE_SET_HIGH()                                      ____HERE!_____                                  //
105 #define TKEY_CE_SET_LOW()                                       ____HERE!_____                                  //
106 #define TKEY_CE_SET_OUTPUT()                                    ____HERE!_____                                  //
107 #else
108 #define TKEY_CE_SET_HIGH()                                                                                                      // Nothing
109 #define TKEY_CE_SET_LOW()                                                                                                       // Nothing
110 #define TKEY_CE_SET_OUTPUT()                                                                                                    // Nothing
111 #endif
112
113 //----------------
114 // INTR
115 //----------------
116 #if MCSDL_USE_INTR_CONTROL
117 #define TKEY_INTR_SET_HIGH()                                    gpio_direction_output(_3_GPIO_TOUCH_INT, 1);                                    //OT_INTR_SET_HIGH()
118 #define TKEY_INTR_SET_LOW()                                     gpio_direction_output(_3_GPIO_TOUCH_INT, 0);                                    //OT_INTR_SET_LOW()
119 #define TKEY_INTR_SET_OUTPUT()                                  //s3c_gpio_cfgpin(_3_GPIO_TOUCH_INT, GPIO_OUTPUT);                                      //OT_INTR_SET_OUTPUT()
120 #define TKEY_INTR_SET_INPUT()                                   gpio_direction_input(_3_GPIO_TOUCH_INT);                                        //OT_INTR_SET_INPUT()
121 #else
122 #define TKEY_INTR_SET_HIGH()                                                                                                    // Nothing
123 #define TKEY_INTR_SET_LOW()                                                                                                     // Nothing
124 #define TKEY_TINR_SET_OUTPUT()                                                                                                  // Nothing
125 #define TKEY_INTR_SET_INPUT()                                                                                                   // Nothing
126 #endif
127
128 //----------------
129 // RESETB
130 //----------------
131 #if MCSDL_USE_RESETB_CONTROL
132 #define TKEY_RESETB_SET_HIGH()                                  ____HERE!_____                                  //UHI2C_IRQ_EN(TRUE)
133 #define TKEY_RESETB_SET_LOW()                                   ____HERE!_____                                  //
134 #define TKEY_RESETB_SET_OUTPUT()                                ____HERE!_____                                  //
135 #define TKEY_RESETB_SET_INPUT()                                 ____HERE!_____                                  //
136 #else
137 #define TKEY_RESETB_SET_HIGH()                                                                                                  // Nothing
138 #define TKEY_RESETB_SET_LOW()                                                                                                   // Nothing
139 #define TKEY_RESETB_SET_OUTPUT()                                                                                                // Nothing
140 #define TKEY_RESETB_SET_INPUT()                                                                                                 // Nothing
141 #endif
142
143
144 //------------------
145 // I2C SCL & SDA
146 //------------------
147
148 #define TKEY_I2C_SCL_SET_HIGH()                                 gpio_direction_output(_3_TOUCH_SCL_28V, 1);                                             //OT_SCL_HIGH()
149 #define TKEY_I2C_SCL_SET_LOW()                                          gpio_direction_output(_3_TOUCH_SCL_28V, 0);                                             //OT_SCL_LOW()
150
151 #define TKEY_I2C_SDA_SET_HIGH()                                 gpio_direction_output(_3_TOUCH_SDA_28V, 1);                                             //OT_SDA_HIGH()
152 #define TKEY_I2C_SDA_SET_LOW()                                          gpio_direction_output(_3_TOUCH_SDA_28V, 0);                                             //OT_SDA_LOW()
153
154 #define TKEY_I2C_SCL_SET_OUTPUT()                                       //s3c_gpio_cfgpin(_3_TOUCH_SCL_28V, GPIO_OUTPUT);                                       //OT_SCL_SET_OUTPUT()
155 #define TKEY_I2C_SCL_SET_INPUT()                                        gpio_direction_input(_3_TOUCH_SCL_28V);                                 //OT_SCL_SET_INPUT()
156
157 #define TKEY_I2C_SDA_SET_OUTPUT()                                       //s3c_gpio_cfgpin(_3_TOUCH_SDA_28V, GPIO_OUTPUT);                                               //OT_SDA_SET_OUTPUT()
158 #define TKEY_I2C_SDA_SET_INPUT()                                        gpio_direction_input(_3_TOUCH_SDA_28V);                                 //OT_SDA_SET_INPUT()
159
160
161 #define TKEY_I2C_SET_HIGH()                             TKEY_I2C_SCL_SET_HIGH();                \
162                                                                 TKEY_I2C_SDA_SET_HIGH()
163
164 #define TKEY_I2C_SET_LOW()                                                      TKEY_I2C_SCL_SET_LOW();                 \
165                                                                                                         TKEY_I2C_SDA_SET_LOW()
166
167
168 #define TKEY_I2C_SET_OUTPUT()                           TKEY_I2C_SCL_SET_OUTPUT();              \
169                                                                 TKEY_I2C_SDA_SET_OUTPUT()
170
171 #define TKEY_I2C_INIT()                                 TKEY_I2C_SET_HIGH();                    \
172                                                                 TKEY_I2C_SET_OUTPUT()
173
174 #define TKEY_I2C_CLOSE()                                TKEY_I2C_SET_LOW();
175 //                                                              TKEY_I2C_SET_OUTPUT()
176
177 //============================================================
178 //
179 //      Porting section 4-2. Delay parameter setting
180 //
181 //============================================================
182 #define MCSDL_DELAY_15US                                                        15
183 #define MCSDL_DELAY_100US                                                       100
184 #define MCSDL_DELAY_150US                                                       150
185 #define MCSDL_DELAY_500US                                                       500
186 #define MCSDL_DELAY_1MS                                                         1000
187 #define MCSDL_DELAY_25MS                                                        25000
188 #define MCSDL_DELAY_45MS                                                        45000
189
190
191 //============================================================
192 //
193 //      Porting section 5. Defence External Effect
194 //
195 //============================================================
196 #if 0
197
198 #define MELFAS_DISABLE_BASEBAND_ISR()                           ____HERE!_____                          //disable_isr()
199 #define MELFAS_DISABLE_WATCHDOG_TIMER_RESET()           ____HERE!_____                          //disable_wtd_reset()
200
201 #define MELFAS_ROLLBACK_BASEBAND_ISR()                          ____HERE!_____                          //
202 #define MELFAS_ROLLBACK_WATCHDOG_TIMER_RESET()          ____HERE!_____                          //
203
204 #else
205
206 #define MELFAS_DISABLE_BASEBAND_ISR()                                                                                   //Nothing
207 #define MELFAS_DISABLE_WATCHDOG_TIMER_RESET()                                                                   //Nothing
208
209 #define MELFAS_ROLLBACK_BASEBAND_ISR()                                                                                  //Nothing
210 #define MELFAS_ROLLBACK_WATCHDOG_TIMER_RESET()                                                                  //Nothing
211
212 #endif
213
214
215 //=====================================================================
216 //
217 //   MELFAS Firmware download
218 //
219 //=====================================================================
220
221 #define MELFAS_TRANSFER_LENGTH                                  64              // Program & Read flash block size
222
223
224 //-----------------------------------------------
225 //      MELFAS Version information address
226 //-----------------------------------------------
227 #define MCSDL_ADDR_MODULE_REVISION                              0x98
228 #define MCSDL_ADDR_FIRMWARE_VERSION                             0x9C
229
230 //----------------------------------------------------
231 //   Return values of download function
232 //----------------------------------------------------
233 #define MCSDL_RET_SUCCESS                                               0x00
234 #define MCSDL_RET_ENTER_DOWNLOAD_MODE_FAILED    0x01
235 #define MCSDL_RET_ERASE_FLASH_FAILED                    0x02
236 #define MCSDL_RET_PREPARE_ERASE_FLASH_FAILED    0x0B
237 #define MCSDL_RET_ERASE_VERIFY_FAILED                   0x03
238 #define MCSDL_RET_READ_FLASH_FAILED                             0x04
239 #define MCSDL_RET_READ_EEPROM_FAILED                    0x05
240 #define MCSDL_RET_READ_INFORMAION_FAILED                0x06
241 #define MCSDL_RET_PROGRAM_FLASH_FAILED                  0x07
242 #define MCSDL_RET_PROGRAM_EEPROM_FAILED                 0x08
243 #define MCSDL_RET_PREPARE_PROGRAM_FAILED                0x09
244 #define MCSDL_RET_PROGRAM_VERIFY_FAILED                 0x0A
245
246 #define MCSDL_RET_WRONG_MODE_ERROR                              0xF0
247 #define MCSDL_RET_WRONG_SLAVE_SELECTION_ERROR   0xF1
248 #define MCSDL_RET_WRONG_PARAMETER                               0xF2
249 #define MCSDL_RET_COMMUNICATION_FAILED                  0xF3
250 #define MCSDL_RET_READING_HEXFILE_FAILED                0xF4
251 #define MCSDL_RET_FILE_ACCESS_FAILED                    0xF5
252 #define MCSDL_RET_MELLOC_FAILED                                 0xF6
253 #define MCSDL_RET_WRONG_MODULE_REVISION                 0xF7
254
255 //------------------------------
256 // MDS ISP mode entering
257 //------------------------------
258 #define MCSDL_MDS_ENTERING_ISP_MODE_CODE2               0x00
259
260 #define MCSDL_MDS_ENTERING_ISP_MODE_ACK_1               0x55
261 #define MCSDL_MDS_ENTERING_ISP_MODE_ACK_2               0x80
262
263 //------------------------------
264 // ISP commands - MDS & I2C
265 //------------------------------
266 #define MCSDL_ISP_CMD_ERASE                                             0x02
267 #define MCSDL_ISP_CMD_ERASE_TIMING                              0x0F
268 #define MCSDL_ISP_CMD_PROGRAM_FLASH                             0x03
269 #define MCSDL_ISP_CMD_READ_FLASH                                0x04
270 #define MCSDL_ISP_CMD_PROGRAM_INFORMATION       0x05
271 #define MCSDL_ISP_CMD_PROGRAM_TIMING                    0x0F
272 #define MCSDL_ISP_CMD_READ_INFORMATION                  0x06
273 #define MCSDL_ISP_CMD_RESET                                             0x07
274
275 //------------------------------
276 // MCS5000's responses
277 //------------------------------
278 #define MCSDL_ISP_ACK_ERASE_DONE_2ND_MDS                0x81
279 #define MCSDL_ISP_ACK_ERASE_DONE                                0x82
280 #define MCSDL_ISP_ACK_PREPARE_ERASE_DONE                0x8F
281 #define MCSDL_I2C_ACK_PREPARE_PROGRAM                   0x8F
282 #define MCSDL_MDS_ACK_PROGRAM_FLASH                             0x83
283 #define MCSDL_MDS_ACK_READ_FLASH                                0x84
284 #define MCSDL_I2C_ACK_PROGRAM_INFORMATION               0x85
285 #define MCSDL_MDS_ACK_PROGRAM_INFORMATION               0x88
286 #define MCSDL_MDS_ACK_PROGRAM_LOCKED                    0xFE
287 #define MCSDL_MDS_ACK_READ_LOCKED                               0xFE
288 #define MCSDL_MDS_ACK_FAIL                                              0xFE
289
290
291 //------------------------------
292 //      I2C ISP
293 //------------------------------
294 #define TOUCHKEY_ADDRESS        0x20
295
296 #define MCSDL_I2C_SLAVE_ADDR_ORG                                0x7E                                                    // Original Address
297 #define MCSDL_I2C_SLAVE_ADDR_ORG_5000                   0x7F                                                    // Original Address
298
299 #define MCSDL_I2C_SLAVE_ADDR_SHIFTED                    (MCSDL_I2C_SLAVE_ADDR_ORG<<1)   // Adress after sifting.
300
301 #define MCSDL_I2C_SLAVE_READY_STATUS                    0x55
302
303 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_0                0x00
304 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_1                0x00
305 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_2                0x78
306 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_3                0x01
307 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_4                0xD4
308 #define MCSDL_ISP_PROGRAM_TIMING_VALUE_5                0xC0
309
310 #define MCSDL_ISP_ERASE_TIMING_VALUE_0                  0x01
311 #define MCSDL_ISP_ERASE_TIMING_VALUE_1                  0xD4
312 #define MCSDL_ISP_ERASE_TIMING_VALUE_2                  0xC0
313
314
315 //----------------------------------------------------
316 //      Functions
317 //----------------------------------------------------
318
319 int mcsdl_download_binary_data(UINT8 chip_ver);                 // with binary type .c   file.
320 int mcsdl_download_binary_file(UINT8 *pData, UINT16 nBinary_length);                    // with binary type .bin file.
321
322 #if MELFAS_ENABLE_DELAY_TEST                                    // For initial porting test.
323 void mcsdl_delay_test(INT32 nCount);
324 #endif
325
326
327 #endif          //#ifndef __MELFAS_FIRMWARE_DOWNLOAD_H__