2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/types.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/major.h>
32 #include <linux/bio.h>
33 #include <linux/blkpg.h>
34 #include <linux/timer.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/init.h>
38 #include <linux/jiffies.h>
39 #include <linux/hdreg.h>
40 #include <linux/spinlock.h>
41 #include <linux/compat.h>
42 #include <linux/mutex.h>
43 #include <asm/uaccess.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/blkdev.h>
48 #include <linux/genhd.h>
49 #include <linux/completion.h>
50 #include <scsi/scsi.h>
52 #include <scsi/scsi_ioctl.h>
53 #include <linux/cdrom.h>
54 #include <linux/scatterlist.h>
55 #include <linux/kthread.h>
57 #define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
58 #define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59 #define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
61 /* Embedded module documentation macros - see modules.h */
62 MODULE_AUTHOR("Hewlett-Packard Company");
63 MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
64 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65 MODULE_VERSION("3.6.26");
66 MODULE_LICENSE("GPL");
67 static int cciss_tape_cmds = 6;
68 module_param(cciss_tape_cmds, int, 0644);
69 MODULE_PARM_DESC(cciss_tape_cmds,
70 "number of commands to allocate for tape devices (default: 6)");
72 static DEFINE_MUTEX(cciss_mutex);
73 static struct proc_dir_entry *proc_cciss;
75 #include "cciss_cmd.h"
77 #include <linux/cciss_ioctl.h>
79 /* define the PCI info for the cards we can control */
80 static const struct pci_device_id cciss_pci_device_id[] = {
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
104 MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
106 /* board_id = Subsystem Device ID & Vendor ID
107 * product = Marketing Name for the board
108 * access = Address of the struct of function pointers
110 static struct board_type products[] = {
111 {0x40700E11, "Smart Array 5300", &SA5_access},
112 {0x40800E11, "Smart Array 5i", &SA5B_access},
113 {0x40820E11, "Smart Array 532", &SA5B_access},
114 {0x40830E11, "Smart Array 5312", &SA5B_access},
115 {0x409A0E11, "Smart Array 641", &SA5_access},
116 {0x409B0E11, "Smart Array 642", &SA5_access},
117 {0x409C0E11, "Smart Array 6400", &SA5_access},
118 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
119 {0x40910E11, "Smart Array 6i", &SA5_access},
120 {0x3225103C, "Smart Array P600", &SA5_access},
121 {0x3223103C, "Smart Array P800", &SA5_access},
122 {0x3234103C, "Smart Array P400", &SA5_access},
123 {0x3235103C, "Smart Array P400i", &SA5_access},
124 {0x3211103C, "Smart Array E200i", &SA5_access},
125 {0x3212103C, "Smart Array E200", &SA5_access},
126 {0x3213103C, "Smart Array E200i", &SA5_access},
127 {0x3214103C, "Smart Array E200i", &SA5_access},
128 {0x3215103C, "Smart Array E200i", &SA5_access},
129 {0x3237103C, "Smart Array E500", &SA5_access},
130 {0x3223103C, "Smart Array P800", &SA5_access},
131 {0x3234103C, "Smart Array P400", &SA5_access},
132 {0x323D103C, "Smart Array P700m", &SA5_access},
135 /* How long to wait (in milliseconds) for board to go into simple mode */
136 #define MAX_CONFIG_WAIT 30000
137 #define MAX_IOCTL_CONFIG_WAIT 1000
139 /*define how many times we will try a command because of bus resets */
140 #define MAX_CMD_RETRIES 3
144 /* Originally cciss driver only supports 8 major numbers */
145 #define MAX_CTLR_ORIG 8
147 static ctlr_info_t *hba[MAX_CTLR];
149 static struct task_struct *cciss_scan_thread;
150 static DEFINE_MUTEX(scan_mutex);
151 static LIST_HEAD(scan_q);
153 static void do_cciss_request(struct request_queue *q);
154 static irqreturn_t do_cciss_intx(int irq, void *dev_id);
155 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
156 static int cciss_open(struct block_device *bdev, fmode_t mode);
157 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
158 static int cciss_release(struct gendisk *disk, fmode_t mode);
159 static int do_ioctl(struct block_device *bdev, fmode_t mode,
160 unsigned int cmd, unsigned long arg);
161 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
162 unsigned int cmd, unsigned long arg);
163 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
165 static int cciss_revalidate(struct gendisk *disk);
166 static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
167 static int deregister_disk(ctlr_info_t *h, int drv_index,
168 int clear_all, int via_ioctl);
170 static void cciss_read_capacity(ctlr_info_t *h, int logvol,
171 sector_t *total_size, unsigned int *block_size);
172 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
173 sector_t *total_size, unsigned int *block_size);
174 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
176 unsigned int block_size, InquiryData_struct *inq_buff,
177 drive_info_struct *drv);
178 static void __devinit cciss_interrupt_mode(ctlr_info_t *);
179 static void start_io(ctlr_info_t *h);
180 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
181 __u8 page_code, unsigned char scsi3addr[],
183 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
185 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
187 static int add_to_scan_list(struct ctlr_info *h);
188 static int scan_thread(void *data);
189 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
190 static void cciss_hba_release(struct device *dev);
191 static void cciss_device_release(struct device *dev);
192 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
193 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
194 static inline u32 next_command(ctlr_info_t *h);
195 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
196 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
198 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
199 unsigned long *memory_bar);
200 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
201 static __devinit int write_driver_ver_to_cfgtable(
202 CfgTable_struct __iomem *cfgtable);
204 /* performant mode helper functions */
205 static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
207 static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
209 #ifdef CONFIG_PROC_FS
210 static void cciss_procinit(ctlr_info_t *h);
212 static void cciss_procinit(ctlr_info_t *h)
215 #endif /* CONFIG_PROC_FS */
218 static int cciss_compat_ioctl(struct block_device *, fmode_t,
219 unsigned, unsigned long);
222 static const struct block_device_operations cciss_fops = {
223 .owner = THIS_MODULE,
224 .open = cciss_unlocked_open,
225 .release = cciss_release,
227 .getgeo = cciss_getgeo,
229 .compat_ioctl = cciss_compat_ioctl,
231 .revalidate_disk = cciss_revalidate,
234 /* set_performant_mode: Modify the tag for cciss performant
235 * set bit 0 for pull model, bits 3-1 for block fetch
238 static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
240 if (likely(h->transMethod & CFGTBL_Trans_Performant))
241 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
245 * Enqueuing and dequeuing functions for cmdlists.
247 static inline void addQ(struct list_head *list, CommandList_struct *c)
249 list_add_tail(&c->list, list);
252 static inline void removeQ(CommandList_struct *c)
255 * After kexec/dump some commands might still
256 * be in flight, which the firmware will try
257 * to complete. Resetting the firmware doesn't work
258 * with old fw revisions, so we have to mark
259 * them off as 'stale' to prevent the driver from
262 if (WARN_ON(list_empty(&c->list))) {
263 c->cmd_type = CMD_MSG_STALE;
267 list_del_init(&c->list);
270 static void enqueue_cmd_and_start_io(ctlr_info_t *h,
271 CommandList_struct *c)
274 set_performant_mode(h, c);
275 spin_lock_irqsave(&h->lock, flags);
278 if (h->Qdepth > h->maxQsinceinit)
279 h->maxQsinceinit = h->Qdepth;
281 spin_unlock_irqrestore(&h->lock, flags);
284 static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
291 for (i = 0; i < nr_cmds; i++) {
292 kfree(cmd_sg_list[i]);
293 cmd_sg_list[i] = NULL;
298 static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
299 ctlr_info_t *h, int chainsize, int nr_cmds)
302 SGDescriptor_struct **cmd_sg_list;
307 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
311 /* Build up chain blocks for each command */
312 for (j = 0; j < nr_cmds; j++) {
313 /* Need a block of chainsized s/g elements. */
314 cmd_sg_list[j] = kmalloc((chainsize *
315 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
316 if (!cmd_sg_list[j]) {
317 dev_err(&h->pdev->dev, "Cannot get memory "
318 "for s/g chains.\n");
324 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
328 static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
330 SGDescriptor_struct *chain_sg;
333 if (c->Header.SGTotal <= h->max_cmd_sgentries)
336 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
337 temp64.val32.lower = chain_sg->Addr.lower;
338 temp64.val32.upper = chain_sg->Addr.upper;
339 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
342 static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
343 SGDescriptor_struct *chain_block, int len)
345 SGDescriptor_struct *chain_sg;
348 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
349 chain_sg->Ext = CCISS_SG_CHAIN;
351 temp64.val = pci_map_single(h->pdev, chain_block, len,
353 chain_sg->Addr.lower = temp64.val32.lower;
354 chain_sg->Addr.upper = temp64.val32.upper;
357 #include "cciss_scsi.c" /* For SCSI tape support */
359 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
362 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
364 #ifdef CONFIG_PROC_FS
367 * Report information about this controller.
369 #define ENG_GIG 1000000000
370 #define ENG_GIG_FACTOR (ENG_GIG/512)
371 #define ENGAGE_SCSI "engage scsi"
373 static void cciss_seq_show_header(struct seq_file *seq)
375 ctlr_info_t *h = seq->private;
377 seq_printf(seq, "%s: HP %s Controller\n"
378 "Board ID: 0x%08lx\n"
379 "Firmware Version: %c%c%c%c\n"
381 "Logical drives: %d\n"
382 "Current Q depth: %d\n"
383 "Current # commands on controller: %d\n"
384 "Max Q depth since init: %d\n"
385 "Max # commands on controller since init: %d\n"
386 "Max SG entries since init: %d\n",
389 (unsigned long)h->board_id,
390 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
391 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
393 h->Qdepth, h->commands_outstanding,
394 h->maxQsinceinit, h->max_outstanding, h->maxSG);
396 #ifdef CONFIG_CISS_SCSI_TAPE
397 cciss_seq_tape_report(seq, h);
398 #endif /* CONFIG_CISS_SCSI_TAPE */
401 static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
403 ctlr_info_t *h = seq->private;
406 /* prevent displaying bogus info during configuration
407 * or deconfiguration of a logical volume
409 spin_lock_irqsave(&h->lock, flags);
410 if (h->busy_configuring) {
411 spin_unlock_irqrestore(&h->lock, flags);
412 return ERR_PTR(-EBUSY);
414 h->busy_configuring = 1;
415 spin_unlock_irqrestore(&h->lock, flags);
418 cciss_seq_show_header(seq);
423 static int cciss_seq_show(struct seq_file *seq, void *v)
425 sector_t vol_sz, vol_sz_frac;
426 ctlr_info_t *h = seq->private;
427 unsigned ctlr = h->ctlr;
429 drive_info_struct *drv = h->drv[*pos];
431 if (*pos > h->highest_lun)
434 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
440 vol_sz = drv->nr_blocks;
441 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
443 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
445 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
446 drv->raid_level = RAID_UNKNOWN;
447 seq_printf(seq, "cciss/c%dd%d:"
448 "\t%4u.%02uGB\tRAID %s\n",
449 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
450 raid_label[drv->raid_level]);
454 static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
456 ctlr_info_t *h = seq->private;
458 if (*pos > h->highest_lun)
465 static void cciss_seq_stop(struct seq_file *seq, void *v)
467 ctlr_info_t *h = seq->private;
469 /* Only reset h->busy_configuring if we succeeded in setting
470 * it during cciss_seq_start. */
471 if (v == ERR_PTR(-EBUSY))
474 h->busy_configuring = 0;
477 static const struct seq_operations cciss_seq_ops = {
478 .start = cciss_seq_start,
479 .show = cciss_seq_show,
480 .next = cciss_seq_next,
481 .stop = cciss_seq_stop,
484 static int cciss_seq_open(struct inode *inode, struct file *file)
486 int ret = seq_open(file, &cciss_seq_ops);
487 struct seq_file *seq = file->private_data;
490 seq->private = PDE(inode)->data;
496 cciss_proc_write(struct file *file, const char __user *buf,
497 size_t length, loff_t *ppos)
502 #ifndef CONFIG_CISS_SCSI_TAPE
506 if (!buf || length > PAGE_SIZE - 1)
509 buffer = (char *)__get_free_page(GFP_KERNEL);
514 if (copy_from_user(buffer, buf, length))
516 buffer[length] = '\0';
518 #ifdef CONFIG_CISS_SCSI_TAPE
519 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
520 struct seq_file *seq = file->private_data;
521 ctlr_info_t *h = seq->private;
523 err = cciss_engage_scsi(h);
527 #endif /* CONFIG_CISS_SCSI_TAPE */
529 /* might be nice to have "disengage" too, but it's not
530 safely possible. (only 1 module use count, lock issues.) */
533 free_page((unsigned long)buffer);
537 static const struct file_operations cciss_proc_fops = {
538 .owner = THIS_MODULE,
539 .open = cciss_seq_open,
542 .release = seq_release,
543 .write = cciss_proc_write,
546 static void __devinit cciss_procinit(ctlr_info_t *h)
548 struct proc_dir_entry *pde;
550 if (proc_cciss == NULL)
551 proc_cciss = proc_mkdir("driver/cciss", NULL);
554 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
556 &cciss_proc_fops, h);
558 #endif /* CONFIG_PROC_FS */
560 #define MAX_PRODUCT_NAME_LEN 19
562 #define to_hba(n) container_of(n, struct ctlr_info, dev)
563 #define to_drv(n) container_of(n, drive_info_struct, dev)
565 /* List of controllers which cannot be hard reset on kexec with reset_devices */
566 static u32 unresettable_controller[] = {
567 0x324a103C, /* Smart Array P712m */
568 0x324b103C, /* SmartArray P711m */
569 0x3223103C, /* Smart Array P800 */
570 0x3234103C, /* Smart Array P400 */
571 0x3235103C, /* Smart Array P400i */
572 0x3211103C, /* Smart Array E200i */
573 0x3212103C, /* Smart Array E200 */
574 0x3213103C, /* Smart Array E200i */
575 0x3214103C, /* Smart Array E200i */
576 0x3215103C, /* Smart Array E200i */
577 0x3237103C, /* Smart Array E500 */
578 0x323D103C, /* Smart Array P700m */
579 0x409C0E11, /* Smart Array 6400 */
580 0x409D0E11, /* Smart Array 6400 EM */
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x409C0E11, /* Smart Array 6400 */
586 0x409D0E11, /* Smart Array 6400 EM */
589 static int ctlr_is_hard_resettable(u32 board_id)
593 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
594 if (unresettable_controller[i] == board_id)
599 static int ctlr_is_soft_resettable(u32 board_id)
603 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
604 if (soft_unresettable_controller[i] == board_id)
609 static int ctlr_is_resettable(u32 board_id)
611 return ctlr_is_hard_resettable(board_id) ||
612 ctlr_is_soft_resettable(board_id);
615 static ssize_t host_show_resettable(struct device *dev,
616 struct device_attribute *attr,
619 struct ctlr_info *h = to_hba(dev);
621 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
623 static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
625 static ssize_t host_store_rescan(struct device *dev,
626 struct device_attribute *attr,
627 const char *buf, size_t count)
629 struct ctlr_info *h = to_hba(dev);
632 wake_up_process(cciss_scan_thread);
633 wait_for_completion_interruptible(&h->scan_wait);
637 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
639 static ssize_t dev_show_unique_id(struct device *dev,
640 struct device_attribute *attr,
643 drive_info_struct *drv = to_drv(dev);
644 struct ctlr_info *h = to_hba(drv->dev.parent);
649 spin_lock_irqsave(&h->lock, flags);
650 if (h->busy_configuring)
653 memcpy(sn, drv->serial_no, sizeof(sn));
654 spin_unlock_irqrestore(&h->lock, flags);
659 return snprintf(buf, 16 * 2 + 2,
660 "%02X%02X%02X%02X%02X%02X%02X%02X"
661 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
662 sn[0], sn[1], sn[2], sn[3],
663 sn[4], sn[5], sn[6], sn[7],
664 sn[8], sn[9], sn[10], sn[11],
665 sn[12], sn[13], sn[14], sn[15]);
667 static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
669 static ssize_t dev_show_vendor(struct device *dev,
670 struct device_attribute *attr,
673 drive_info_struct *drv = to_drv(dev);
674 struct ctlr_info *h = to_hba(drv->dev.parent);
675 char vendor[VENDOR_LEN + 1];
679 spin_lock_irqsave(&h->lock, flags);
680 if (h->busy_configuring)
683 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
684 spin_unlock_irqrestore(&h->lock, flags);
689 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
691 static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
693 static ssize_t dev_show_model(struct device *dev,
694 struct device_attribute *attr,
697 drive_info_struct *drv = to_drv(dev);
698 struct ctlr_info *h = to_hba(drv->dev.parent);
699 char model[MODEL_LEN + 1];
703 spin_lock_irqsave(&h->lock, flags);
704 if (h->busy_configuring)
707 memcpy(model, drv->model, MODEL_LEN + 1);
708 spin_unlock_irqrestore(&h->lock, flags);
713 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
715 static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
717 static ssize_t dev_show_rev(struct device *dev,
718 struct device_attribute *attr,
721 drive_info_struct *drv = to_drv(dev);
722 struct ctlr_info *h = to_hba(drv->dev.parent);
723 char rev[REV_LEN + 1];
727 spin_lock_irqsave(&h->lock, flags);
728 if (h->busy_configuring)
731 memcpy(rev, drv->rev, REV_LEN + 1);
732 spin_unlock_irqrestore(&h->lock, flags);
737 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
739 static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
741 static ssize_t cciss_show_lunid(struct device *dev,
742 struct device_attribute *attr, char *buf)
744 drive_info_struct *drv = to_drv(dev);
745 struct ctlr_info *h = to_hba(drv->dev.parent);
747 unsigned char lunid[8];
749 spin_lock_irqsave(&h->lock, flags);
750 if (h->busy_configuring) {
751 spin_unlock_irqrestore(&h->lock, flags);
755 spin_unlock_irqrestore(&h->lock, flags);
758 memcpy(lunid, drv->LunID, sizeof(lunid));
759 spin_unlock_irqrestore(&h->lock, flags);
760 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
761 lunid[0], lunid[1], lunid[2], lunid[3],
762 lunid[4], lunid[5], lunid[6], lunid[7]);
764 static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
766 static ssize_t cciss_show_raid_level(struct device *dev,
767 struct device_attribute *attr, char *buf)
769 drive_info_struct *drv = to_drv(dev);
770 struct ctlr_info *h = to_hba(drv->dev.parent);
774 spin_lock_irqsave(&h->lock, flags);
775 if (h->busy_configuring) {
776 spin_unlock_irqrestore(&h->lock, flags);
779 raid = drv->raid_level;
780 spin_unlock_irqrestore(&h->lock, flags);
781 if (raid < 0 || raid > RAID_UNKNOWN)
784 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
787 static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
789 static ssize_t cciss_show_usage_count(struct device *dev,
790 struct device_attribute *attr, char *buf)
792 drive_info_struct *drv = to_drv(dev);
793 struct ctlr_info *h = to_hba(drv->dev.parent);
797 spin_lock_irqsave(&h->lock, flags);
798 if (h->busy_configuring) {
799 spin_unlock_irqrestore(&h->lock, flags);
802 count = drv->usage_count;
803 spin_unlock_irqrestore(&h->lock, flags);
804 return snprintf(buf, 20, "%d\n", count);
806 static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
808 static struct attribute *cciss_host_attrs[] = {
809 &dev_attr_rescan.attr,
810 &dev_attr_resettable.attr,
814 static struct attribute_group cciss_host_attr_group = {
815 .attrs = cciss_host_attrs,
818 static const struct attribute_group *cciss_host_attr_groups[] = {
819 &cciss_host_attr_group,
823 static struct device_type cciss_host_type = {
824 .name = "cciss_host",
825 .groups = cciss_host_attr_groups,
826 .release = cciss_hba_release,
829 static struct attribute *cciss_dev_attrs[] = {
830 &dev_attr_unique_id.attr,
831 &dev_attr_model.attr,
832 &dev_attr_vendor.attr,
834 &dev_attr_lunid.attr,
835 &dev_attr_raid_level.attr,
836 &dev_attr_usage_count.attr,
840 static struct attribute_group cciss_dev_attr_group = {
841 .attrs = cciss_dev_attrs,
844 static const struct attribute_group *cciss_dev_attr_groups[] = {
845 &cciss_dev_attr_group,
849 static struct device_type cciss_dev_type = {
850 .name = "cciss_device",
851 .groups = cciss_dev_attr_groups,
852 .release = cciss_device_release,
855 static struct bus_type cciss_bus_type = {
860 * cciss_hba_release is called when the reference count
861 * of h->dev goes to zero.
863 static void cciss_hba_release(struct device *dev)
866 * nothing to do, but need this to avoid a warning
867 * about not having a release handler from lib/kref.c.
872 * Initialize sysfs entry for each controller. This sets up and registers
873 * the 'cciss#' directory for each individual controller under
874 * /sys/bus/pci/devices/<dev>/.
876 static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
878 device_initialize(&h->dev);
879 h->dev.type = &cciss_host_type;
880 h->dev.bus = &cciss_bus_type;
881 dev_set_name(&h->dev, "%s", h->devname);
882 h->dev.parent = &h->pdev->dev;
884 return device_add(&h->dev);
888 * Remove sysfs entries for an hba.
890 static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
893 put_device(&h->dev); /* final put. */
896 /* cciss_device_release is called when the reference count
897 * of h->drv[x]dev goes to zero.
899 static void cciss_device_release(struct device *dev)
901 drive_info_struct *drv = to_drv(dev);
906 * Initialize sysfs for each logical drive. This sets up and registers
907 * the 'c#d#' directory for each individual logical drive under
908 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
909 * /sys/block/cciss!c#d# to this entry.
911 static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
916 if (h->drv[drv_index]->device_initialized)
919 dev = &h->drv[drv_index]->dev;
920 device_initialize(dev);
921 dev->type = &cciss_dev_type;
922 dev->bus = &cciss_bus_type;
923 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
924 dev->parent = &h->dev;
925 h->drv[drv_index]->device_initialized = 1;
926 return device_add(dev);
930 * Remove sysfs entries for a logical drive.
932 static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
935 struct device *dev = &h->drv[drv_index]->dev;
937 /* special case for c*d0, we only destroy it on controller exit */
938 if (drv_index == 0 && !ctlr_exiting)
942 put_device(dev); /* the "final" put. */
943 h->drv[drv_index] = NULL;
947 * For operations that cannot sleep, a command block is allocated at init,
948 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
949 * which ones are free or in use.
951 static CommandList_struct *cmd_alloc(ctlr_info_t *h)
953 CommandList_struct *c;
956 dma_addr_t cmd_dma_handle, err_dma_handle;
959 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
962 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
963 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
965 memset(c, 0, sizeof(CommandList_struct));
966 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
967 c->err_info = h->errinfo_pool + i;
968 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
969 err_dma_handle = h->errinfo_pool_dhandle
970 + i * sizeof(ErrorInfo_struct);
975 INIT_LIST_HEAD(&c->list);
976 c->busaddr = (__u32) cmd_dma_handle;
977 temp64.val = (__u64) err_dma_handle;
978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
986 /* allocate a command using pci_alloc_consistent, used for ioctls,
987 * etc., not for the main i/o path.
989 static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
991 CommandList_struct *c;
993 dma_addr_t cmd_dma_handle, err_dma_handle;
995 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
996 sizeof(CommandList_struct), &cmd_dma_handle);
999 memset(c, 0, sizeof(CommandList_struct));
1003 c->err_info = (ErrorInfo_struct *)
1004 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1007 if (c->err_info == NULL) {
1008 pci_free_consistent(h->pdev,
1009 sizeof(CommandList_struct), c, cmd_dma_handle);
1012 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1014 INIT_LIST_HEAD(&c->list);
1015 c->busaddr = (__u32) cmd_dma_handle;
1016 temp64.val = (__u64) err_dma_handle;
1017 c->ErrDesc.Addr.lower = temp64.val32.lower;
1018 c->ErrDesc.Addr.upper = temp64.val32.upper;
1019 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1025 static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1029 i = c - h->cmd_pool;
1030 clear_bit(i & (BITS_PER_LONG - 1),
1031 h->cmd_pool_bits + (i / BITS_PER_LONG));
1035 static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1039 temp64.val32.lower = c->ErrDesc.Addr.lower;
1040 temp64.val32.upper = c->ErrDesc.Addr.upper;
1041 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1042 c->err_info, (dma_addr_t) temp64.val);
1043 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1044 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1047 static inline ctlr_info_t *get_host(struct gendisk *disk)
1049 return disk->queue->queuedata;
1052 static inline drive_info_struct *get_drv(struct gendisk *disk)
1054 return disk->private_data;
1058 * Open. Make sure the device is really there.
1060 static int cciss_open(struct block_device *bdev, fmode_t mode)
1062 ctlr_info_t *h = get_host(bdev->bd_disk);
1063 drive_info_struct *drv = get_drv(bdev->bd_disk);
1065 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
1066 if (drv->busy_configuring)
1069 * Root is allowed to open raw volume zero even if it's not configured
1070 * so array config can still work. Root is also allowed to open any
1071 * volume that has a LUN ID, so it can issue IOCTL to reread the
1072 * disk information. I don't think I really like this
1073 * but I'm already using way to many device nodes to claim another one
1074 * for "raw controller".
1076 if (drv->heads == 0) {
1077 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1078 /* if not node 0 make sure it is a partition = 0 */
1079 if (MINOR(bdev->bd_dev) & 0x0f) {
1081 /* if it is, make sure we have a LUN ID */
1082 } else if (memcmp(drv->LunID, CTLR_LUNID,
1083 sizeof(drv->LunID))) {
1087 if (!capable(CAP_SYS_ADMIN))
1095 static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1099 mutex_lock(&cciss_mutex);
1100 ret = cciss_open(bdev, mode);
1101 mutex_unlock(&cciss_mutex);
1107 * Close. Sync first.
1109 static int cciss_release(struct gendisk *disk, fmode_t mode)
1112 drive_info_struct *drv;
1114 mutex_lock(&cciss_mutex);
1116 drv = get_drv(disk);
1117 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1120 mutex_unlock(&cciss_mutex);
1124 static int do_ioctl(struct block_device *bdev, fmode_t mode,
1125 unsigned cmd, unsigned long arg)
1128 mutex_lock(&cciss_mutex);
1129 ret = cciss_ioctl(bdev, mode, cmd, arg);
1130 mutex_unlock(&cciss_mutex);
1134 #ifdef CONFIG_COMPAT
1136 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1137 unsigned cmd, unsigned long arg);
1138 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1139 unsigned cmd, unsigned long arg);
1141 static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1142 unsigned cmd, unsigned long arg)
1145 case CCISS_GETPCIINFO:
1146 case CCISS_GETINTINFO:
1147 case CCISS_SETINTINFO:
1148 case CCISS_GETNODENAME:
1149 case CCISS_SETNODENAME:
1150 case CCISS_GETHEARTBEAT:
1151 case CCISS_GETBUSTYPES:
1152 case CCISS_GETFIRMVER:
1153 case CCISS_GETDRIVVER:
1154 case CCISS_REVALIDVOLS:
1155 case CCISS_DEREGDISK:
1156 case CCISS_REGNEWDISK:
1158 case CCISS_RESCANDISK:
1159 case CCISS_GETLUNINFO:
1160 return do_ioctl(bdev, mode, cmd, arg);
1162 case CCISS_PASSTHRU32:
1163 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1164 case CCISS_BIG_PASSTHRU32:
1165 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1168 return -ENOIOCTLCMD;
1172 static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1175 IOCTL32_Command_struct __user *arg32 =
1176 (IOCTL32_Command_struct __user *) arg;
1177 IOCTL_Command_struct arg64;
1178 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1182 memset(&arg64, 0, sizeof(arg64));
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(cp, &arg32->buf);
1195 arg64.buf = compat_ptr(cp);
1196 err |= copy_to_user(p, &arg64, sizeof(arg64));
1201 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1205 copy_in_user(&arg32->error_info, &p->error_info,
1206 sizeof(arg32->error_info));
1212 static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1213 unsigned cmd, unsigned long arg)
1215 BIG_IOCTL32_Command_struct __user *arg32 =
1216 (BIG_IOCTL32_Command_struct __user *) arg;
1217 BIG_IOCTL_Command_struct arg64;
1218 BIG_IOCTL_Command_struct __user *p =
1219 compat_alloc_user_space(sizeof(arg64));
1223 memset(&arg64, 0, sizeof(arg64));
1226 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1227 sizeof(arg64.LUN_info));
1229 copy_from_user(&arg64.Request, &arg32->Request,
1230 sizeof(arg64.Request));
1232 copy_from_user(&arg64.error_info, &arg32->error_info,
1233 sizeof(arg64.error_info));
1234 err |= get_user(arg64.buf_size, &arg32->buf_size);
1235 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1236 err |= get_user(cp, &arg32->buf);
1237 arg64.buf = compat_ptr(cp);
1238 err |= copy_to_user(p, &arg64, sizeof(arg64));
1243 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1247 copy_in_user(&arg32->error_info, &p->error_info,
1248 sizeof(arg32->error_info));
1255 static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1257 drive_info_struct *drv = get_drv(bdev->bd_disk);
1259 if (!drv->cylinders)
1262 geo->heads = drv->heads;
1263 geo->sectors = drv->sectors;
1264 geo->cylinders = drv->cylinders;
1268 static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
1270 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1271 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
1272 (void)check_for_unit_attention(h, c);
1275 static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1277 cciss_pci_info_struct pciinfo;
1281 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1282 pciinfo.bus = h->pdev->bus->number;
1283 pciinfo.dev_fn = h->pdev->devfn;
1284 pciinfo.board_id = h->board_id;
1285 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1290 static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1292 cciss_coalint_struct intinfo;
1296 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1297 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1299 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1304 static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1306 cciss_coalint_struct intinfo;
1307 unsigned long flags;
1312 if (!capable(CAP_SYS_ADMIN))
1314 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1316 if ((intinfo.delay == 0) && (intinfo.count == 0))
1318 spin_lock_irqsave(&h->lock, flags);
1319 /* Update the field, and then ring the doorbell */
1320 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1321 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1322 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1324 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1325 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1327 udelay(1000); /* delay and try again */
1329 spin_unlock_irqrestore(&h->lock, flags);
1330 if (i >= MAX_IOCTL_CONFIG_WAIT)
1335 static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1337 NodeName_type NodeName;
1342 for (i = 0; i < 16; i++)
1343 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1344 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1349 static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1351 NodeName_type NodeName;
1352 unsigned long flags;
1357 if (!capable(CAP_SYS_ADMIN))
1359 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1361 spin_lock_irqsave(&h->lock, flags);
1362 /* Update the field, and then ring the doorbell */
1363 for (i = 0; i < 16; i++)
1364 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1365 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1366 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1367 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1369 udelay(1000); /* delay and try again */
1371 spin_unlock_irqrestore(&h->lock, flags);
1372 if (i >= MAX_IOCTL_CONFIG_WAIT)
1377 static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1379 Heartbeat_type heartbeat;
1383 heartbeat = readl(&h->cfgtable->HeartBeat);
1384 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1389 static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1391 BusTypes_type BusTypes;
1395 BusTypes = readl(&h->cfgtable->BusTypes);
1396 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1401 static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1403 FirmwareVer_type firmware;
1407 memcpy(firmware, h->firm_ver, 4);
1410 (argp, firmware, sizeof(FirmwareVer_type)))
1415 static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1417 DriverVer_type DriverVer = DRIVER_VERSION;
1421 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1426 static int cciss_getluninfo(ctlr_info_t *h,
1427 struct gendisk *disk, void __user *argp)
1429 LogvolInfo_struct luninfo;
1430 drive_info_struct *drv = get_drv(disk);
1434 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1435 luninfo.num_opens = drv->usage_count;
1436 luninfo.num_parts = 0;
1437 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1442 static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1444 IOCTL_Command_struct iocommand;
1445 CommandList_struct *c;
1448 DECLARE_COMPLETION_ONSTACK(wait);
1453 if (!capable(CAP_SYS_RAWIO))
1457 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1459 if ((iocommand.buf_size < 1) &&
1460 (iocommand.Request.Type.Direction != XFER_NONE)) {
1463 if (iocommand.buf_size > 0) {
1464 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1468 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1469 /* Copy the data into the buffer we created */
1470 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1475 memset(buff, 0, iocommand.buf_size);
1477 c = cmd_special_alloc(h);
1482 /* Fill in the command type */
1483 c->cmd_type = CMD_IOCTL_PEND;
1484 /* Fill in Command Header */
1485 c->Header.ReplyQueue = 0; /* unused in simple mode */
1486 if (iocommand.buf_size > 0) { /* buffer to fill */
1487 c->Header.SGList = 1;
1488 c->Header.SGTotal = 1;
1489 } else { /* no buffers to fill */
1490 c->Header.SGList = 0;
1491 c->Header.SGTotal = 0;
1493 c->Header.LUN = iocommand.LUN_info;
1494 /* use the kernel address the cmd block for tag */
1495 c->Header.Tag.lower = c->busaddr;
1497 /* Fill in Request block */
1498 c->Request = iocommand.Request;
1500 /* Fill in the scatter gather information */
1501 if (iocommand.buf_size > 0) {
1502 temp64.val = pci_map_single(h->pdev, buff,
1503 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1504 c->SG[0].Addr.lower = temp64.val32.lower;
1505 c->SG[0].Addr.upper = temp64.val32.upper;
1506 c->SG[0].Len = iocommand.buf_size;
1507 c->SG[0].Ext = 0; /* we are not chaining */
1511 enqueue_cmd_and_start_io(h, c);
1512 wait_for_completion(&wait);
1514 /* unlock the buffers from DMA */
1515 temp64.val32.lower = c->SG[0].Addr.lower;
1516 temp64.val32.upper = c->SG[0].Addr.upper;
1517 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1518 PCI_DMA_BIDIRECTIONAL);
1519 check_ioctl_unit_attention(h, c);
1521 /* Copy the error information out */
1522 iocommand.error_info = *(c->err_info);
1523 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1525 cmd_special_free(h, c);
1529 if (iocommand.Request.Type.Direction == XFER_READ) {
1530 /* Copy the data out of the buffer we created */
1531 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
1533 cmd_special_free(h, c);
1538 cmd_special_free(h, c);
1542 static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1544 BIG_IOCTL_Command_struct *ioc;
1545 CommandList_struct *c;
1546 unsigned char **buff = NULL;
1547 int *buff_size = NULL;
1552 DECLARE_COMPLETION_ONSTACK(wait);
1555 BYTE __user *data_ptr;
1559 if (!capable(CAP_SYS_RAWIO))
1561 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
1566 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1570 if ((ioc->buf_size < 1) &&
1571 (ioc->Request.Type.Direction != XFER_NONE)) {
1575 /* Check kmalloc limits using all SGs */
1576 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1580 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1584 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1589 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1594 left = ioc->buf_size;
1595 data_ptr = ioc->buf;
1597 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1598 buff_size[sg_used] = sz;
1599 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1600 if (buff[sg_used] == NULL) {
1604 if (ioc->Request.Type.Direction == XFER_WRITE) {
1605 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
1610 memset(buff[sg_used], 0, sz);
1616 c = cmd_special_alloc(h);
1621 c->cmd_type = CMD_IOCTL_PEND;
1622 c->Header.ReplyQueue = 0;
1623 c->Header.SGList = sg_used;
1624 c->Header.SGTotal = sg_used;
1625 c->Header.LUN = ioc->LUN_info;
1626 c->Header.Tag.lower = c->busaddr;
1628 c->Request = ioc->Request;
1629 for (i = 0; i < sg_used; i++) {
1630 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
1631 PCI_DMA_BIDIRECTIONAL);
1632 c->SG[i].Addr.lower = temp64.val32.lower;
1633 c->SG[i].Addr.upper = temp64.val32.upper;
1634 c->SG[i].Len = buff_size[i];
1635 c->SG[i].Ext = 0; /* we are not chaining */
1638 enqueue_cmd_and_start_io(h, c);
1639 wait_for_completion(&wait);
1640 /* unlock the buffers from DMA */
1641 for (i = 0; i < sg_used; i++) {
1642 temp64.val32.lower = c->SG[i].Addr.lower;
1643 temp64.val32.upper = c->SG[i].Addr.upper;
1644 pci_unmap_single(h->pdev,
1645 (dma_addr_t) temp64.val, buff_size[i],
1646 PCI_DMA_BIDIRECTIONAL);
1648 check_ioctl_unit_attention(h, c);
1649 /* Copy the error information out */
1650 ioc->error_info = *(c->err_info);
1651 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1652 cmd_special_free(h, c);
1656 if (ioc->Request.Type.Direction == XFER_READ) {
1657 /* Copy the data out of the buffer we created */
1658 BYTE __user *ptr = ioc->buf;
1659 for (i = 0; i < sg_used; i++) {
1660 if (copy_to_user(ptr, buff[i], buff_size[i])) {
1661 cmd_special_free(h, c);
1665 ptr += buff_size[i];
1668 cmd_special_free(h, c);
1672 for (i = 0; i < sg_used; i++)
1681 static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
1682 unsigned int cmd, unsigned long arg)
1684 struct gendisk *disk = bdev->bd_disk;
1685 ctlr_info_t *h = get_host(disk);
1686 void __user *argp = (void __user *)arg;
1688 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1691 case CCISS_GETPCIINFO:
1692 return cciss_getpciinfo(h, argp);
1693 case CCISS_GETINTINFO:
1694 return cciss_getintinfo(h, argp);
1695 case CCISS_SETINTINFO:
1696 return cciss_setintinfo(h, argp);
1697 case CCISS_GETNODENAME:
1698 return cciss_getnodename(h, argp);
1699 case CCISS_SETNODENAME:
1700 return cciss_setnodename(h, argp);
1701 case CCISS_GETHEARTBEAT:
1702 return cciss_getheartbeat(h, argp);
1703 case CCISS_GETBUSTYPES:
1704 return cciss_getbustypes(h, argp);
1705 case CCISS_GETFIRMVER:
1706 return cciss_getfirmver(h, argp);
1707 case CCISS_GETDRIVVER:
1708 return cciss_getdrivver(h, argp);
1709 case CCISS_DEREGDISK:
1711 case CCISS_REVALIDVOLS:
1712 return rebuild_lun_table(h, 0, 1);
1713 case CCISS_GETLUNINFO:
1714 return cciss_getluninfo(h, disk, argp);
1715 case CCISS_PASSTHRU:
1716 return cciss_passthru(h, argp);
1717 case CCISS_BIG_PASSTHRU:
1718 return cciss_bigpassthru(h, argp);
1720 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
1721 /* very meaningful for cciss. SG_IO is the main one people want. */
1723 case SG_GET_VERSION_NUM:
1724 case SG_SET_TIMEOUT:
1725 case SG_GET_TIMEOUT:
1726 case SG_GET_RESERVED_SIZE:
1727 case SG_SET_RESERVED_SIZE:
1728 case SG_EMULATED_HOST:
1730 case SCSI_IOCTL_SEND_COMMAND:
1731 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
1733 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
1734 /* they aren't a good fit for cciss, as CD-ROMs are */
1735 /* not supported, and we don't have any bus/target/lun */
1736 /* which we present to the kernel. */
1738 case CDROM_SEND_PACKET:
1739 case CDROMCLOSETRAY:
1741 case SCSI_IOCTL_GET_IDLUN:
1742 case SCSI_IOCTL_GET_BUS_NUMBER:
1748 static void cciss_check_queues(ctlr_info_t *h)
1750 int start_queue = h->next_to_run;
1753 /* check to see if we have maxed out the number of commands that can
1754 * be placed on the queue. If so then exit. We do this check here
1755 * in case the interrupt we serviced was from an ioctl and did not
1756 * free any new commands.
1758 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
1761 /* We have room on the queue for more commands. Now we need to queue
1762 * them up. We will also keep track of the next queue to run so
1763 * that every queue gets a chance to be started first.
1765 for (i = 0; i < h->highest_lun + 1; i++) {
1766 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1767 /* make sure the disk has been added and the drive is real
1768 * because this can be called from the middle of init_one.
1770 if (!h->drv[curr_queue])
1772 if (!(h->drv[curr_queue]->queue) ||
1773 !(h->drv[curr_queue]->heads))
1775 blk_start_queue(h->gendisk[curr_queue]->queue);
1777 /* check to see if we have maxed out the number of commands
1778 * that can be placed on the queue.
1780 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
1781 if (curr_queue == start_queue) {
1783 (start_queue + 1) % (h->highest_lun + 1);
1786 h->next_to_run = curr_queue;
1793 static void cciss_softirq_done(struct request *rq)
1795 CommandList_struct *c = rq->completion_data;
1796 ctlr_info_t *h = hba[c->ctlr];
1797 SGDescriptor_struct *curr_sg = c->SG;
1799 unsigned long flags;
1803 if (c->Request.Type.Direction == XFER_READ)
1804 ddir = PCI_DMA_FROMDEVICE;
1806 ddir = PCI_DMA_TODEVICE;
1808 /* command did not need to be retried */
1809 /* unmap the DMA mapping for all the scatter gather elements */
1810 for (i = 0; i < c->Header.SGList; i++) {
1811 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
1812 cciss_unmap_sg_chain_block(h, c);
1813 /* Point to the next block */
1814 curr_sg = h->cmd_sg_list[c->cmdindex];
1817 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1818 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1819 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1824 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
1826 /* set the residual count for pc requests */
1827 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
1828 rq->resid_len = c->err_info->ResidualCnt;
1830 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
1832 spin_lock_irqsave(&h->lock, flags);
1834 cciss_check_queues(h);
1835 spin_unlock_irqrestore(&h->lock, flags);
1838 static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1839 unsigned char scsi3addr[], uint32_t log_unit)
1841 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1842 sizeof(h->drv[log_unit]->LunID));
1845 /* This function gets the SCSI vendor, model, and revision of a logical drive
1846 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1847 * they cannot be read.
1849 static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
1850 char *vendor, char *model, char *rev)
1853 InquiryData_struct *inq_buf;
1854 unsigned char scsi3addr[8];
1860 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1864 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1865 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
1866 scsi3addr, TYPE_CMD);
1868 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1869 vendor[VENDOR_LEN] = '\0';
1870 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1871 model[MODEL_LEN] = '\0';
1872 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1873 rev[REV_LEN] = '\0';
1880 /* This function gets the serial number of a logical drive via
1881 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1882 * number cannot be had, for whatever reason, 16 bytes of 0xff
1883 * are returned instead.
1885 static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
1886 unsigned char *serial_no, int buflen)
1888 #define PAGE_83_INQ_BYTES 64
1891 unsigned char scsi3addr[8];
1895 memset(serial_no, 0xff, buflen);
1896 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1899 memset(serial_no, 0, buflen);
1900 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1901 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
1902 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
1904 memcpy(serial_no, &buf[8], buflen);
1910 * cciss_add_disk sets up the block device queue for a logical drive
1912 static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
1915 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
1917 goto init_queue_failure;
1918 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1919 disk->major = h->major;
1920 disk->first_minor = drv_index << NWD_SHIFT;
1921 disk->fops = &cciss_fops;
1922 if (cciss_create_ld_sysfs_entry(h, drv_index))
1924 disk->private_data = h->drv[drv_index];
1925 disk->driverfs_dev = &h->drv[drv_index]->dev;
1927 /* Set up queue information */
1928 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1930 /* This is a hardware imposed limit. */
1931 blk_queue_max_segments(disk->queue, h->maxsgentries);
1933 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
1935 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1937 disk->queue->queuedata = h;
1939 blk_queue_logical_block_size(disk->queue,
1940 h->drv[drv_index]->block_size);
1942 /* Make sure all queue data is written out before */
1943 /* setting h->drv[drv_index]->queue, as setting this */
1944 /* allows the interrupt handler to start the queue */
1946 h->drv[drv_index]->queue = disk->queue;
1951 blk_cleanup_queue(disk->queue);
1957 /* This function will check the usage_count of the drive to be updated/added.
1958 * If the usage_count is zero and it is a heretofore unknown drive, or,
1959 * the drive's capacity, geometry, or serial number has changed,
1960 * then the drive information will be updated and the disk will be
1961 * re-registered with the kernel. If these conditions don't hold,
1962 * then it will be left alone for the next reboot. The exception to this
1963 * is disk 0 which will always be left registered with the kernel since it
1964 * is also the controller node. Any changes to disk 0 will show up on
1967 static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1968 int first_time, int via_ioctl)
1970 struct gendisk *disk;
1971 InquiryData_struct *inq_buff = NULL;
1972 unsigned int block_size;
1973 sector_t total_size;
1974 unsigned long flags = 0;
1976 drive_info_struct *drvinfo;
1978 /* Get information about the disk and modify the driver structure */
1979 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1980 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
1981 if (inq_buff == NULL || drvinfo == NULL)
1984 /* testing to see if 16-byte CDBs are already being used */
1985 if (h->cciss_read == CCISS_READ_16) {
1986 cciss_read_capacity_16(h, drv_index,
1987 &total_size, &block_size);
1990 cciss_read_capacity(h, drv_index, &total_size, &block_size);
1991 /* if read_capacity returns all F's this volume is >2TB */
1992 /* in size so we switch to 16-byte CDB's for all */
1993 /* read/write ops */
1994 if (total_size == 0xFFFFFFFFULL) {
1995 cciss_read_capacity_16(h, drv_index,
1996 &total_size, &block_size);
1997 h->cciss_read = CCISS_READ_16;
1998 h->cciss_write = CCISS_WRITE_16;
2000 h->cciss_read = CCISS_READ_10;
2001 h->cciss_write = CCISS_WRITE_10;
2005 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
2007 drvinfo->block_size = block_size;
2008 drvinfo->nr_blocks = total_size + 1;
2010 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
2011 drvinfo->model, drvinfo->rev);
2012 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
2013 sizeof(drvinfo->serial_no));
2014 /* Save the lunid in case we deregister the disk, below. */
2015 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2016 sizeof(drvinfo->LunID));
2018 /* Is it the same disk we already know, and nothing's changed? */
2019 if (h->drv[drv_index]->raid_level != -1 &&
2020 ((memcmp(drvinfo->serial_no,
2021 h->drv[drv_index]->serial_no, 16) == 0) &&
2022 drvinfo->block_size == h->drv[drv_index]->block_size &&
2023 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2024 drvinfo->heads == h->drv[drv_index]->heads &&
2025 drvinfo->sectors == h->drv[drv_index]->sectors &&
2026 drvinfo->cylinders == h->drv[drv_index]->cylinders))
2027 /* The disk is unchanged, nothing to update */
2030 /* If we get here it's not the same disk, or something's changed,
2031 * so we need to * deregister it, and re-register it, if it's not
2033 * If the disk already exists then deregister it before proceeding
2034 * (unless it's the first disk (for the controller node).
2036 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
2037 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
2038 spin_lock_irqsave(&h->lock, flags);
2039 h->drv[drv_index]->busy_configuring = 1;
2040 spin_unlock_irqrestore(&h->lock, flags);
2042 /* deregister_disk sets h->drv[drv_index]->queue = NULL
2043 * which keeps the interrupt handler from starting
2046 ret = deregister_disk(h, drv_index, 0, via_ioctl);
2049 /* If the disk is in use return */
2053 /* Save the new information from cciss_geometry_inquiry
2054 * and serial number inquiry. If the disk was deregistered
2055 * above, then h->drv[drv_index] will be NULL.
2057 if (h->drv[drv_index] == NULL) {
2058 drvinfo->device_initialized = 0;
2059 h->drv[drv_index] = drvinfo;
2060 drvinfo = NULL; /* so it won't be freed below. */
2062 /* special case for cxd0 */
2063 h->drv[drv_index]->block_size = drvinfo->block_size;
2064 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2065 h->drv[drv_index]->heads = drvinfo->heads;
2066 h->drv[drv_index]->sectors = drvinfo->sectors;
2067 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2068 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2069 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2070 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2072 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2073 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2077 disk = h->gendisk[drv_index];
2078 set_capacity(disk, h->drv[drv_index]->nr_blocks);
2080 /* If it's not disk 0 (drv_index != 0)
2081 * or if it was disk 0, but there was previously
2082 * no actual corresponding configured logical drive
2083 * (raid_leve == -1) then we want to update the
2084 * logical drive's information.
2086 if (drv_index || first_time) {
2087 if (cciss_add_disk(h, disk, drv_index) != 0) {
2088 cciss_free_gendisk(h, drv_index);
2089 cciss_free_drive_info(h, drv_index);
2090 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2101 dev_err(&h->pdev->dev, "out of memory\n");
2105 /* This function will find the first index of the controllers drive array
2106 * that has a null drv pointer and allocate the drive info struct and
2107 * will return that index This is where new drives will be added.
2108 * If the index to be returned is greater than the highest_lun index for
2109 * the controller then highest_lun is set * to this new index.
2110 * If there are no available indexes or if tha allocation fails, then -1
2111 * is returned. * "controller_node" is used to know if this is a real
2112 * logical drive, or just the controller node, which determines if this
2113 * counts towards highest_lun.
2115 static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
2118 drive_info_struct *drv;
2120 /* Search for an empty slot for our drive info */
2121 for (i = 0; i < CISS_MAX_LUN; i++) {
2123 /* if not cxd0 case, and it's occupied, skip it. */
2124 if (h->drv[i] && i != 0)
2127 * If it's cxd0 case, and drv is alloc'ed already, and a
2128 * disk is configured there, skip it.
2130 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2134 * We've found an empty slot. Update highest_lun
2135 * provided this isn't just the fake cxd0 controller node.
2137 if (i > h->highest_lun && !controller_node)
2140 /* If adding a real disk at cxd0, and it's already alloc'ed */
2141 if (i == 0 && h->drv[i] != NULL)
2145 * Found an empty slot, not already alloc'ed. Allocate it.
2146 * Mark it with raid_level == -1, so we know it's new later on.
2148 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2151 drv->raid_level = -1; /* so we know it's new */
2158 static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2160 kfree(h->drv[drv_index]);
2161 h->drv[drv_index] = NULL;
2164 static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2166 put_disk(h->gendisk[drv_index]);
2167 h->gendisk[drv_index] = NULL;
2170 /* cciss_add_gendisk finds a free hba[]->drv structure
2171 * and allocates a gendisk if needed, and sets the lunid
2172 * in the drvinfo structure. It returns the index into
2173 * the ->drv[] array, or -1 if none are free.
2174 * is_controller_node indicates whether highest_lun should
2175 * count this disk, or if it's only being added to provide
2176 * a means to talk to the controller in case no logical
2177 * drives have yet been configured.
2179 static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2180 int controller_node)
2184 drv_index = cciss_alloc_drive_info(h, controller_node);
2185 if (drv_index == -1)
2188 /*Check if the gendisk needs to be allocated */
2189 if (!h->gendisk[drv_index]) {
2190 h->gendisk[drv_index] =
2191 alloc_disk(1 << NWD_SHIFT);
2192 if (!h->gendisk[drv_index]) {
2193 dev_err(&h->pdev->dev,
2194 "could not allocate a new disk %d\n",
2196 goto err_free_drive_info;
2199 memcpy(h->drv[drv_index]->LunID, lunid,
2200 sizeof(h->drv[drv_index]->LunID));
2201 if (cciss_create_ld_sysfs_entry(h, drv_index))
2203 /* Don't need to mark this busy because nobody */
2204 /* else knows about this disk yet to contend */
2205 /* for access to it. */
2206 h->drv[drv_index]->busy_configuring = 0;
2211 cciss_free_gendisk(h, drv_index);
2212 err_free_drive_info:
2213 cciss_free_drive_info(h, drv_index);
2217 /* This is for the special case of a controller which
2218 * has no logical drives. In this case, we still need
2219 * to register a disk so the controller can be accessed
2220 * by the Array Config Utility.
2222 static void cciss_add_controller_node(ctlr_info_t *h)
2224 struct gendisk *disk;
2227 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2230 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
2231 if (drv_index == -1)
2233 h->drv[drv_index]->block_size = 512;
2234 h->drv[drv_index]->nr_blocks = 0;
2235 h->drv[drv_index]->heads = 0;
2236 h->drv[drv_index]->sectors = 0;
2237 h->drv[drv_index]->cylinders = 0;
2238 h->drv[drv_index]->raid_level = -1;
2239 memset(h->drv[drv_index]->serial_no, 0, 16);
2240 disk = h->gendisk[drv_index];
2241 if (cciss_add_disk(h, disk, drv_index) == 0)
2243 cciss_free_gendisk(h, drv_index);
2244 cciss_free_drive_info(h, drv_index);
2246 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
2250 /* This function will add and remove logical drives from the Logical
2251 * drive array of the controller and maintain persistency of ordering
2252 * so that mount points are preserved until the next reboot. This allows
2253 * for the removal of logical drives in the middle of the drive array
2254 * without a re-ordering of those drives.
2256 * h = The controller to perform the operations on
2258 static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2262 ReportLunData_struct *ld_buff = NULL;
2268 unsigned char lunid[8] = CTLR_LUNID;
2269 unsigned long flags;
2271 if (!capable(CAP_SYS_RAWIO))
2274 /* Set busy_configuring flag for this operation */
2275 spin_lock_irqsave(&h->lock, flags);
2276 if (h->busy_configuring) {
2277 spin_unlock_irqrestore(&h->lock, flags);
2280 h->busy_configuring = 1;
2281 spin_unlock_irqrestore(&h->lock, flags);
2283 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2284 if (ld_buff == NULL)
2287 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
2288 sizeof(ReportLunData_struct),
2289 0, CTLR_LUNID, TYPE_CMD);
2291 if (return_code == IO_OK)
2292 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2293 else { /* reading number of logical volumes failed */
2294 dev_warn(&h->pdev->dev,
2295 "report logical volume command failed\n");
2300 num_luns = listlength / 8; /* 8 bytes per entry */
2301 if (num_luns > CISS_MAX_LUN) {
2302 num_luns = CISS_MAX_LUN;
2303 dev_warn(&h->pdev->dev, "more luns configured"
2304 " on controller than can be handled by"
2309 cciss_add_controller_node(h);
2311 /* Compare controller drive array to driver's drive array
2312 * to see if any drives are missing on the controller due
2313 * to action of Array Config Utility (user deletes drive)
2314 * and deregister logical drives which have disappeared.
2316 for (i = 0; i <= h->highest_lun; i++) {
2320 /* skip holes in the array from already deleted drives */
2321 if (h->drv[i] == NULL)
2324 for (j = 0; j < num_luns; j++) {
2325 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
2326 if (memcmp(h->drv[i]->LunID, lunid,
2327 sizeof(lunid)) == 0) {
2333 /* Deregister it from the OS, it's gone. */
2334 spin_lock_irqsave(&h->lock, flags);
2335 h->drv[i]->busy_configuring = 1;
2336 spin_unlock_irqrestore(&h->lock, flags);
2337 return_code = deregister_disk(h, i, 1, via_ioctl);
2338 if (h->drv[i] != NULL)
2339 h->drv[i]->busy_configuring = 0;
2343 /* Compare controller drive array to driver's drive array.
2344 * Check for updates in the drive information and any new drives
2345 * on the controller due to ACU adding logical drives, or changing
2346 * a logical drive's size, etc. Reregister any new/changed drives
2348 for (i = 0; i < num_luns; i++) {
2353 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
2354 /* Find if the LUN is already in the drive array
2355 * of the driver. If so then update its info
2356 * if not in use. If it does not exist then find
2357 * the first free index and add it.
2359 for (j = 0; j <= h->highest_lun; j++) {
2360 if (h->drv[j] != NULL &&
2361 memcmp(h->drv[j]->LunID, lunid,
2362 sizeof(h->drv[j]->LunID)) == 0) {
2369 /* check if the drive was found already in the array */
2371 drv_index = cciss_add_gendisk(h, lunid, 0);
2372 if (drv_index == -1)
2375 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
2380 h->busy_configuring = 0;
2381 /* We return -1 here to tell the ACU that we have registered/updated
2382 * all of the drives that we can and to keep it from calling us
2387 dev_err(&h->pdev->dev, "out of memory\n");
2388 h->busy_configuring = 0;
2392 static void cciss_clear_drive_info(drive_info_struct *drive_info)
2394 /* zero out the disk size info */
2395 drive_info->nr_blocks = 0;
2396 drive_info->block_size = 0;
2397 drive_info->heads = 0;
2398 drive_info->sectors = 0;
2399 drive_info->cylinders = 0;
2400 drive_info->raid_level = -1;
2401 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2402 memset(drive_info->model, 0, sizeof(drive_info->model));
2403 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2404 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2406 * don't clear the LUNID though, we need to remember which
2411 /* This function will deregister the disk and it's queue from the
2412 * kernel. It must be called with the controller lock held and the
2413 * drv structures busy_configuring flag set. It's parameters are:
2415 * disk = This is the disk to be deregistered
2416 * drv = This is the drive_info_struct associated with the disk to be
2417 * deregistered. It contains information about the disk used
2419 * clear_all = This flag determines whether or not the disk information
2420 * is going to be completely cleared out and the highest_lun
2421 * reset. Sometimes we want to clear out information about
2422 * the disk in preparation for re-adding it. In this case
2423 * the highest_lun should be left unchanged and the LunID
2424 * should not be cleared.
2426 * This indicates whether we've reached this path via ioctl.
2427 * This affects the maximum usage count allowed for c0d0 to be messed with.
2428 * If this path is reached via ioctl(), then the max_usage_count will
2429 * be 1, as the process calling ioctl() has got to have the device open.
2430 * If we get here via sysfs, then the max usage count will be zero.
2432 static int deregister_disk(ctlr_info_t *h, int drv_index,
2433 int clear_all, int via_ioctl)
2436 struct gendisk *disk;
2437 drive_info_struct *drv;
2438 int recalculate_highest_lun;
2440 if (!capable(CAP_SYS_RAWIO))
2443 drv = h->drv[drv_index];
2444 disk = h->gendisk[drv_index];
2446 /* make sure logical volume is NOT is use */
2447 if (clear_all || (h->gendisk[0] == disk)) {
2448 if (drv->usage_count > via_ioctl)
2450 } else if (drv->usage_count > 0)
2453 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2455 /* invalidate the devices and deregister the disk. If it is disk
2456 * zero do not deregister it but just zero out it's values. This
2457 * allows us to delete disk zero but keep the controller registered.
2459 if (h->gendisk[0] != disk) {
2460 struct request_queue *q = disk->queue;
2461 if (disk->flags & GENHD_FL_UP) {
2462 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
2466 blk_cleanup_queue(q);
2467 /* If clear_all is set then we are deleting the logical
2468 * drive, not just refreshing its info. For drives
2469 * other than disk 0 we will call put_disk. We do not
2470 * do this for disk 0 as we need it to be able to
2471 * configure the controller.
2474 /* This isn't pretty, but we need to find the
2475 * disk in our array and NULL our the pointer.
2476 * This is so that we will call alloc_disk if
2477 * this index is used again later.
2479 for (i=0; i < CISS_MAX_LUN; i++){
2480 if (h->gendisk[i] == disk) {
2481 h->gendisk[i] = NULL;
2488 set_capacity(disk, 0);
2489 cciss_clear_drive_info(drv);
2494 /* if it was the last disk, find the new hightest lun */
2495 if (clear_all && recalculate_highest_lun) {
2496 int newhighest = -1;
2497 for (i = 0; i <= h->highest_lun; i++) {
2498 /* if the disk has size > 0, it is available */
2499 if (h->drv[i] && h->drv[i]->heads)
2502 h->highest_lun = newhighest;
2507 static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
2508 size_t size, __u8 page_code, unsigned char *scsi3addr,
2511 u64bit buff_dma_handle;
2514 c->cmd_type = CMD_IOCTL_PEND;
2515 c->Header.ReplyQueue = 0;
2517 c->Header.SGList = 1;
2518 c->Header.SGTotal = 1;
2520 c->Header.SGList = 0;
2521 c->Header.SGTotal = 0;
2523 c->Header.Tag.lower = c->busaddr;
2524 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
2526 c->Request.Type.Type = cmd_type;
2527 if (cmd_type == TYPE_CMD) {
2530 /* are we trying to read a vital product page */
2531 if (page_code != 0) {
2532 c->Request.CDB[1] = 0x01;
2533 c->Request.CDB[2] = page_code;
2535 c->Request.CDBLen = 6;
2536 c->Request.Type.Attribute = ATTR_SIMPLE;
2537 c->Request.Type.Direction = XFER_READ;
2538 c->Request.Timeout = 0;
2539 c->Request.CDB[0] = CISS_INQUIRY;
2540 c->Request.CDB[4] = size & 0xFF;
2542 case CISS_REPORT_LOG:
2543 case CISS_REPORT_PHYS:
2544 /* Talking to controller so It's a physical command
2545 mode = 00 target = 0. Nothing to write.
2547 c->Request.CDBLen = 12;
2548 c->Request.Type.Attribute = ATTR_SIMPLE;
2549 c->Request.Type.Direction = XFER_READ;
2550 c->Request.Timeout = 0;
2551 c->Request.CDB[0] = cmd;
2552 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
2553 c->Request.CDB[7] = (size >> 16) & 0xFF;
2554 c->Request.CDB[8] = (size >> 8) & 0xFF;
2555 c->Request.CDB[9] = size & 0xFF;
2558 case CCISS_READ_CAPACITY:
2559 c->Request.CDBLen = 10;
2560 c->Request.Type.Attribute = ATTR_SIMPLE;
2561 c->Request.Type.Direction = XFER_READ;
2562 c->Request.Timeout = 0;
2563 c->Request.CDB[0] = cmd;
2565 case CCISS_READ_CAPACITY_16:
2566 c->Request.CDBLen = 16;
2567 c->Request.Type.Attribute = ATTR_SIMPLE;
2568 c->Request.Type.Direction = XFER_READ;
2569 c->Request.Timeout = 0;
2570 c->Request.CDB[0] = cmd;
2571 c->Request.CDB[1] = 0x10;
2572 c->Request.CDB[10] = (size >> 24) & 0xFF;
2573 c->Request.CDB[11] = (size >> 16) & 0xFF;
2574 c->Request.CDB[12] = (size >> 8) & 0xFF;
2575 c->Request.CDB[13] = size & 0xFF;
2576 c->Request.Timeout = 0;
2577 c->Request.CDB[0] = cmd;
2579 case CCISS_CACHE_FLUSH:
2580 c->Request.CDBLen = 12;
2581 c->Request.Type.Attribute = ATTR_SIMPLE;
2582 c->Request.Type.Direction = XFER_WRITE;
2583 c->Request.Timeout = 0;
2584 c->Request.CDB[0] = BMIC_WRITE;
2585 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
2587 case TEST_UNIT_READY:
2588 c->Request.CDBLen = 6;
2589 c->Request.Type.Attribute = ATTR_SIMPLE;
2590 c->Request.Type.Direction = XFER_NONE;
2591 c->Request.Timeout = 0;
2594 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
2597 } else if (cmd_type == TYPE_MSG) {
2599 case CCISS_ABORT_MSG:
2600 c->Request.CDBLen = 12;
2601 c->Request.Type.Attribute = ATTR_SIMPLE;
2602 c->Request.Type.Direction = XFER_WRITE;
2603 c->Request.Timeout = 0;
2604 c->Request.CDB[0] = cmd; /* abort */
2605 c->Request.CDB[1] = 0; /* abort a command */
2606 /* buff contains the tag of the command to abort */
2607 memcpy(&c->Request.CDB[4], buff, 8);
2609 case CCISS_RESET_MSG:
2610 c->Request.CDBLen = 16;
2611 c->Request.Type.Attribute = ATTR_SIMPLE;
2612 c->Request.Type.Direction = XFER_NONE;
2613 c->Request.Timeout = 0;
2614 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
2615 c->Request.CDB[0] = cmd; /* reset */
2616 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
2618 case CCISS_NOOP_MSG:
2619 c->Request.CDBLen = 1;
2620 c->Request.Type.Attribute = ATTR_SIMPLE;
2621 c->Request.Type.Direction = XFER_WRITE;
2622 c->Request.Timeout = 0;
2623 c->Request.CDB[0] = cmd;
2626 dev_warn(&h->pdev->dev,
2627 "unknown message type %d\n", cmd);
2631 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
2634 /* Fill in the scatter gather information */
2636 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
2638 PCI_DMA_BIDIRECTIONAL);
2639 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2640 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2641 c->SG[0].Len = size;
2642 c->SG[0].Ext = 0; /* we are not chaining */
2647 static int __devinit cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2650 CommandList_struct *c;
2656 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2657 CTLR_LUNID, TYPE_MSG);
2658 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2659 if (return_status != IO_OK) {
2660 cmd_special_free(h, c);
2661 return return_status;
2664 enqueue_cmd_and_start_io(h, c);
2665 /* Don't wait for completion, the reset won't complete. Don't free
2666 * the command either. This is the last command we will send before
2667 * re-initializing everything, so it doesn't matter and won't leak.
2672 static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2674 switch (c->err_info->ScsiStatus) {
2677 case SAM_STAT_CHECK_CONDITION:
2678 switch (0xf & c->err_info->SenseInfo[2]) {
2679 case 0: return IO_OK; /* no sense */
2680 case 1: return IO_OK; /* recovered error */
2682 if (check_for_unit_attention(h, c))
2683 return IO_NEEDS_RETRY;
2684 dev_warn(&h->pdev->dev, "cmd 0x%02x "
2685 "check condition, sense key = 0x%02x\n",
2686 c->Request.CDB[0], c->err_info->SenseInfo[2]);
2690 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2691 "scsi status = 0x%02x\n",
2692 c->Request.CDB[0], c->err_info->ScsiStatus);
2698 static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
2700 int return_status = IO_OK;
2702 if (c->err_info->CommandStatus == CMD_SUCCESS)
2705 switch (c->err_info->CommandStatus) {
2706 case CMD_TARGET_STATUS:
2707 return_status = check_target_status(h, c);
2709 case CMD_DATA_UNDERRUN:
2710 case CMD_DATA_OVERRUN:
2711 /* expected for inquiry and report lun commands */
2714 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
2715 "reported invalid\n", c->Request.CDB[0]);
2716 return_status = IO_ERROR;
2718 case CMD_PROTOCOL_ERR:
2719 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2720 "protocol error\n", c->Request.CDB[0]);
2721 return_status = IO_ERROR;
2723 case CMD_HARDWARE_ERR:
2724 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2725 " hardware error\n", c->Request.CDB[0]);
2726 return_status = IO_ERROR;
2728 case CMD_CONNECTION_LOST:
2729 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
2730 "connection lost\n", c->Request.CDB[0]);
2731 return_status = IO_ERROR;
2734 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
2735 "aborted\n", c->Request.CDB[0]);
2736 return_status = IO_ERROR;
2738 case CMD_ABORT_FAILED:
2739 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
2740 "abort failed\n", c->Request.CDB[0]);
2741 return_status = IO_ERROR;
2743 case CMD_UNSOLICITED_ABORT:
2744 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
2746 return_status = IO_NEEDS_RETRY;
2748 case CMD_UNABORTABLE:
2749 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2750 return_status = IO_ERROR;
2753 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
2754 "unknown status %x\n", c->Request.CDB[0],
2755 c->err_info->CommandStatus);
2756 return_status = IO_ERROR;
2758 return return_status;
2761 static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2764 DECLARE_COMPLETION_ONSTACK(wait);
2765 u64bit buff_dma_handle;
2766 int return_status = IO_OK;
2770 enqueue_cmd_and_start_io(h, c);
2772 wait_for_completion(&wait);
2774 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2777 return_status = process_sendcmd_error(h, c);
2779 if (return_status == IO_NEEDS_RETRY &&
2780 c->retry_count < MAX_CMD_RETRIES) {
2781 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
2784 /* erase the old error information */
2785 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2786 return_status = IO_OK;
2787 INIT_COMPLETION(wait);
2792 /* unlock the buffers from DMA */
2793 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2794 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
2795 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2796 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
2797 return return_status;
2800 static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
2801 __u8 page_code, unsigned char scsi3addr[],
2804 CommandList_struct *c;
2807 c = cmd_special_alloc(h);
2810 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
2811 scsi3addr, cmd_type);
2812 if (return_status == IO_OK)
2813 return_status = sendcmd_withirq_core(h, c, 1);
2815 cmd_special_free(h, c);
2816 return return_status;
2819 static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
2820 sector_t total_size,
2821 unsigned int block_size,
2822 InquiryData_struct *inq_buff,
2823 drive_info_struct *drv)
2827 unsigned char scsi3addr[8];
2829 memset(inq_buff, 0, sizeof(InquiryData_struct));
2830 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2831 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
2832 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
2833 if (return_code == IO_OK) {
2834 if (inq_buff->data_byte[8] == 0xFF) {
2835 dev_warn(&h->pdev->dev,
2836 "reading geometry failed, volume "
2837 "does not support reading geometry\n");
2839 drv->sectors = 32; /* Sectors per track */
2840 drv->cylinders = total_size + 1;
2841 drv->raid_level = RAID_UNKNOWN;
2843 drv->heads = inq_buff->data_byte[6];
2844 drv->sectors = inq_buff->data_byte[7];
2845 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2846 drv->cylinders += inq_buff->data_byte[5];
2847 drv->raid_level = inq_buff->data_byte[8];
2849 drv->block_size = block_size;
2850 drv->nr_blocks = total_size + 1;
2851 t = drv->heads * drv->sectors;
2853 sector_t real_size = total_size + 1;
2854 unsigned long rem = sector_div(real_size, t);
2857 drv->cylinders = real_size;
2859 } else { /* Get geometry failed */
2860 dev_warn(&h->pdev->dev, "reading geometry failed\n");
2865 cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
2866 unsigned int *block_size)
2868 ReadCapdata_struct *buf;
2870 unsigned char scsi3addr[8];
2872 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2874 dev_warn(&h->pdev->dev, "out of memory\n");
2878 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2879 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
2880 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
2881 if (return_code == IO_OK) {
2882 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2883 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2884 } else { /* read capacity command failed */
2885 dev_warn(&h->pdev->dev, "read capacity failed\n");
2887 *block_size = BLOCK_SIZE;
2892 static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
2893 sector_t *total_size, unsigned int *block_size)
2895 ReadCapdata_struct_16 *buf;
2897 unsigned char scsi3addr[8];
2899 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2901 dev_warn(&h->pdev->dev, "out of memory\n");
2905 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2906 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2907 buf, sizeof(ReadCapdata_struct_16),
2908 0, scsi3addr, TYPE_CMD);
2909 if (return_code == IO_OK) {
2910 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2911 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
2912 } else { /* read capacity command failed */
2913 dev_warn(&h->pdev->dev, "read capacity failed\n");
2915 *block_size = BLOCK_SIZE;
2917 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
2918 (unsigned long long)*total_size+1, *block_size);
2922 static int cciss_revalidate(struct gendisk *disk)
2924 ctlr_info_t *h = get_host(disk);
2925 drive_info_struct *drv = get_drv(disk);
2928 unsigned int block_size;
2929 sector_t total_size;
2930 InquiryData_struct *inq_buff = NULL;
2932 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
2933 if (!h->drv[logvol])
2935 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
2936 sizeof(drv->LunID)) == 0) {
2945 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2946 if (inq_buff == NULL) {
2947 dev_warn(&h->pdev->dev, "out of memory\n");
2950 if (h->cciss_read == CCISS_READ_10) {
2951 cciss_read_capacity(h, logvol,
2952 &total_size, &block_size);
2954 cciss_read_capacity_16(h, logvol,
2955 &total_size, &block_size);
2957 cciss_geometry_inquiry(h, logvol, total_size, block_size,
2960 blk_queue_logical_block_size(drv->queue, drv->block_size);
2961 set_capacity(disk, drv->nr_blocks);
2968 * Map (physical) PCI mem into (virtual) kernel space
2970 static void __iomem *remap_pci_mem(ulong base, ulong size)
2972 ulong page_base = ((ulong) base) & PAGE_MASK;
2973 ulong page_offs = ((ulong) base) - page_base;
2974 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
2976 return page_remapped ? (page_remapped + page_offs) : NULL;
2980 * Takes jobs of the Q and sends them to the hardware, then puts it on
2981 * the Q to wait for completion.
2983 static void start_io(ctlr_info_t *h)
2985 CommandList_struct *c;
2987 while (!list_empty(&h->reqQ)) {
2988 c = list_entry(h->reqQ.next, CommandList_struct, list);
2989 /* can't do anything if fifo is full */
2990 if ((h->access.fifo_full(h))) {
2991 dev_warn(&h->pdev->dev, "fifo full\n");
2995 /* Get the first entry from the Request Q */
2999 /* Tell the controller execute command */
3000 h->access.submit_command(h, c);
3002 /* Put job onto the completed Q */
3007 /* Assumes that h->lock is held. */
3008 /* Zeros out the error record and then resends the command back */
3009 /* to the controller */
3010 static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
3012 /* erase the old error information */
3013 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3015 /* add it to software queue and then send it to the controller */
3018 if (h->Qdepth > h->maxQsinceinit)
3019 h->maxQsinceinit = h->Qdepth;
3024 static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3025 unsigned int msg_byte, unsigned int host_byte,
3026 unsigned int driver_byte)
3028 /* inverse of macros in scsi.h */
3029 return (scsi_status_byte & 0xff) |
3030 ((msg_byte & 0xff) << 8) |
3031 ((host_byte & 0xff) << 16) |
3032 ((driver_byte & 0xff) << 24);
3035 static inline int evaluate_target_status(ctlr_info_t *h,
3036 CommandList_struct *cmd, int *retry_cmd)
3038 unsigned char sense_key;
3039 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3043 /* If we get in here, it means we got "target status", that is, scsi status */
3044 status_byte = cmd->err_info->ScsiStatus;
3045 driver_byte = DRIVER_OK;
3046 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3048 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
3049 host_byte = DID_PASSTHROUGH;
3053 error_value = make_status_bytes(status_byte, msg_byte,
3054 host_byte, driver_byte);
3056 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
3057 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
3058 dev_warn(&h->pdev->dev, "cmd %p "
3059 "has SCSI Status 0x%x\n",
3060 cmd, cmd->err_info->ScsiStatus);
3064 /* check the sense key */
3065 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3066 /* no status or recovered error */
3067 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3068 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
3071 if (check_for_unit_attention(h, cmd)) {
3072 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
3076 /* Not SG_IO or similar? */
3077 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
3078 if (error_value != 0)
3079 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
3080 " sense key = 0x%x\n", cmd, sense_key);
3084 /* SG_IO or similar, copy sense data back */
3085 if (cmd->rq->sense) {
3086 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3087 cmd->rq->sense_len = cmd->err_info->SenseLen;
3088 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3089 cmd->rq->sense_len);
3091 cmd->rq->sense_len = 0;
3096 /* checks the status of the job and calls complete buffers to mark all
3097 * buffers for the completed job. Note that this function does not need
3098 * to hold the hba/queue lock.
3100 static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3104 struct request *rq = cmd->rq;
3109 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
3111 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3112 goto after_error_processing;
3114 switch (cmd->err_info->CommandStatus) {
3115 case CMD_TARGET_STATUS:
3116 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
3118 case CMD_DATA_UNDERRUN:
3119 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
3120 dev_warn(&h->pdev->dev, "cmd %p has"
3121 " completed with data underrun "
3123 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
3126 case CMD_DATA_OVERRUN:
3127 if (cmd->rq->cmd_type == REQ_TYPE_FS)
3128 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
3129 " completed with data overrun "
3133 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
3134 "reported invalid\n", cmd);
3135 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3136 cmd->err_info->CommandStatus, DRIVER_OK,
3137 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3138 DID_PASSTHROUGH : DID_ERROR);
3140 case CMD_PROTOCOL_ERR:
3141 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3142 "protocol error\n", cmd);
3143 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3144 cmd->err_info->CommandStatus, DRIVER_OK,
3145 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3146 DID_PASSTHROUGH : DID_ERROR);
3148 case CMD_HARDWARE_ERR:
3149 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3150 " hardware error\n", cmd);
3151 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3152 cmd->err_info->CommandStatus, DRIVER_OK,
3153 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3154 DID_PASSTHROUGH : DID_ERROR);
3156 case CMD_CONNECTION_LOST:
3157 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
3158 "connection lost\n", cmd);
3159 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3160 cmd->err_info->CommandStatus, DRIVER_OK,
3161 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3162 DID_PASSTHROUGH : DID_ERROR);
3165 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
3167 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3168 cmd->err_info->CommandStatus, DRIVER_OK,
3169 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3170 DID_PASSTHROUGH : DID_ABORT);
3172 case CMD_ABORT_FAILED:
3173 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
3174 "abort failed\n", cmd);
3175 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3176 cmd->err_info->CommandStatus, DRIVER_OK,
3177 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3178 DID_PASSTHROUGH : DID_ERROR);
3180 case CMD_UNSOLICITED_ABORT:
3181 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
3182 "abort %p\n", h->ctlr, cmd);
3183 if (cmd->retry_count < MAX_CMD_RETRIES) {
3185 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
3188 dev_warn(&h->pdev->dev,
3189 "%p retried too many times\n", cmd);
3190 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3191 cmd->err_info->CommandStatus, DRIVER_OK,
3192 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3193 DID_PASSTHROUGH : DID_ABORT);
3196 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
3197 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3198 cmd->err_info->CommandStatus, DRIVER_OK,
3199 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3200 DID_PASSTHROUGH : DID_ERROR);
3202 case CMD_UNABORTABLE:
3203 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3204 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3205 cmd->err_info->CommandStatus, DRIVER_OK,
3206 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3207 DID_PASSTHROUGH : DID_ERROR);
3210 dev_warn(&h->pdev->dev, "cmd %p returned "
3211 "unknown status %x\n", cmd,
3212 cmd->err_info->CommandStatus);
3213 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3214 cmd->err_info->CommandStatus, DRIVER_OK,
3215 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3216 DID_PASSTHROUGH : DID_ERROR);
3219 after_error_processing:
3221 /* We need to return this command */
3223 resend_cciss_cmd(h, cmd);
3226 cmd->rq->completion_data = cmd;
3227 blk_complete_request(cmd->rq);
3230 static inline u32 cciss_tag_contains_index(u32 tag)
3232 #define DIRECT_LOOKUP_BIT 0x10
3233 return tag & DIRECT_LOOKUP_BIT;
3236 static inline u32 cciss_tag_to_index(u32 tag)
3238 #define DIRECT_LOOKUP_SHIFT 5
3239 return tag >> DIRECT_LOOKUP_SHIFT;
3242 static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
3244 #define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3245 #define CCISS_SIMPLE_ERROR_BITS 0x03
3246 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3247 return tag & ~CCISS_PERF_ERROR_BITS;
3248 return tag & ~CCISS_SIMPLE_ERROR_BITS;
3251 static inline void cciss_mark_tag_indexed(u32 *tag)
3253 *tag |= DIRECT_LOOKUP_BIT;
3256 static inline void cciss_set_tag_index(u32 *tag, u32 index)
3258 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3262 * Get a request and submit it to the controller.
3264 static void do_cciss_request(struct request_queue *q)
3266 ctlr_info_t *h = q->queuedata;
3267 CommandList_struct *c;
3270 struct request *creq;
3272 struct scatterlist *tmp_sg;
3273 SGDescriptor_struct *curr_sg;
3274 drive_info_struct *drv;
3280 creq = blk_peek_request(q);
3284 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
3290 blk_start_request(creq);
3292 tmp_sg = h->scatter_list[c->cmdindex];
3293 spin_unlock_irq(q->queue_lock);
3295 c->cmd_type = CMD_RWREQ;
3298 /* fill in the request */
3299 drv = creq->rq_disk->private_data;
3300 c->Header.ReplyQueue = 0; /* unused in simple mode */
3301 /* got command from pool, so use the command block index instead */
3302 /* for direct lookups. */
3303 /* The first 2 bits are reserved for controller error reporting. */
3304 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3305 cciss_mark_tag_indexed(&c->Header.Tag.lower);
3306 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
3307 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3308 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
3309 c->Request.Type.Attribute = ATTR_SIMPLE;
3310 c->Request.Type.Direction =
3311 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
3312 c->Request.Timeout = 0; /* Don't time out */
3314 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
3315 start_blk = blk_rq_pos(creq);
3316 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
3317 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
3318 sg_init_table(tmp_sg, h->maxsgentries);
3319 seg = blk_rq_map_sg(q, creq, tmp_sg);
3321 /* get the DMA records for the setup */
3322 if (c->Request.Type.Direction == XFER_READ)
3323 dir = PCI_DMA_FROMDEVICE;
3325 dir = PCI_DMA_TODEVICE;
3331 for (i = 0; i < seg; i++) {
3332 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3333 !chained && ((seg - i) > 1)) {
3334 /* Point to next chain block. */
3335 curr_sg = h->cmd_sg_list[c->cmdindex];
3339 curr_sg[sg_index].Len = tmp_sg[i].length;
3340 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
3342 tmp_sg[i].length, dir);
3343 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3344 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3345 curr_sg[sg_index].Ext = 0; /* we are not chaining */
3349 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3350 (seg - (h->max_cmd_sgentries - 1)) *
3351 sizeof(SGDescriptor_struct));
3353 /* track how many SG entries we are using */
3357 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
3359 blk_rq_sectors(creq), seg, chained);
3361 c->Header.SGTotal = seg + chained;
3362 if (seg <= h->max_cmd_sgentries)
3363 c->Header.SGList = c->Header.SGTotal;
3365 c->Header.SGList = h->max_cmd_sgentries;
3366 set_performant_mode(h, c);
3368 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
3369 if(h->cciss_read == CCISS_READ_10) {
3370 c->Request.CDB[1] = 0;
3371 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
3372 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3373 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3374 c->Request.CDB[5] = start_blk & 0xff;
3375 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
3376 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3377 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
3378 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3380 u32 upper32 = upper_32_bits(start_blk);
3382 c->Request.CDBLen = 16;
3383 c->Request.CDB[1]= 0;
3384 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
3385 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3386 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3387 c->Request.CDB[5]= upper32 & 0xff;
3388 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3389 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3390 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3391 c->Request.CDB[9]= start_blk & 0xff;
3392 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3393 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3394 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3395 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
3396 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3398 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
3399 c->Request.CDBLen = creq->cmd_len;
3400 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
3402 dev_warn(&h->pdev->dev, "bad request type %d\n",
3407 spin_lock_irq(q->queue_lock);
3411 if (h->Qdepth > h->maxQsinceinit)
3412 h->maxQsinceinit = h->Qdepth;
3418 /* We will already have the driver lock here so not need
3424 static inline unsigned long get_next_completion(ctlr_info_t *h)
3426 return h->access.command_completed(h);
3429 static inline int interrupt_pending(ctlr_info_t *h)
3431 return h->access.intr_pending(h);
3434 static inline long interrupt_not_for_us(ctlr_info_t *h)
3436 return ((h->access.intr_pending(h) == 0) ||
3437 (h->interrupts_enabled == 0));
3440 static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3443 if (unlikely(tag_index >= h->nr_cmds)) {
3444 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3450 static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3454 if (likely(c->cmd_type == CMD_RWREQ))
3455 complete_command(h, c, 0);
3456 else if (c->cmd_type == CMD_IOCTL_PEND)
3457 complete(c->waiting);
3458 #ifdef CONFIG_CISS_SCSI_TAPE
3459 else if (c->cmd_type == CMD_SCSI)
3460 complete_scsi_command(c, 0, raw_tag);
3464 static inline u32 next_command(ctlr_info_t *h)
3468 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3469 return h->access.command_completed(h);
3471 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3472 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3473 (h->reply_pool_head)++;
3474 h->commands_outstanding--;
3478 /* Check for wraparound */
3479 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3480 h->reply_pool_head = h->reply_pool;
3481 h->reply_pool_wraparound ^= 1;
3486 /* process completion of an indexed ("direct lookup") command */
3487 static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3490 CommandList_struct *c;
3492 tag_index = cciss_tag_to_index(raw_tag);
3493 if (bad_tag(h, tag_index, raw_tag))
3494 return next_command(h);
3495 c = h->cmd_pool + tag_index;
3496 finish_cmd(h, c, raw_tag);
3497 return next_command(h);
3500 /* process completion of a non-indexed command */
3501 static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3503 CommandList_struct *c = NULL;
3504 __u32 busaddr_masked, tag_masked;
3506 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
3507 list_for_each_entry(c, &h->cmpQ, list) {
3508 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
3509 if (busaddr_masked == tag_masked) {
3510 finish_cmd(h, c, raw_tag);
3511 return next_command(h);
3514 bad_tag(h, h->nr_cmds + 1, raw_tag);
3515 return next_command(h);
3518 /* Some controllers, like p400, will give us one interrupt
3519 * after a soft reset, even if we turned interrupts off.
3520 * Only need to check for this in the cciss_xxx_discard_completions
3523 static int ignore_bogus_interrupt(ctlr_info_t *h)
3525 if (likely(!reset_devices))
3528 if (likely(h->interrupts_enabled))
3531 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3532 "(known firmware bug.) Ignoring.\n");
3537 static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3539 ctlr_info_t *h = dev_id;
3540 unsigned long flags;
3543 if (ignore_bogus_interrupt(h))
3546 if (interrupt_not_for_us(h))
3548 spin_lock_irqsave(&h->lock, flags);
3549 while (interrupt_pending(h)) {
3550 raw_tag = get_next_completion(h);
3551 while (raw_tag != FIFO_EMPTY)
3552 raw_tag = next_command(h);
3554 spin_unlock_irqrestore(&h->lock, flags);
3558 static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3560 ctlr_info_t *h = dev_id;
3561 unsigned long flags;
3564 if (ignore_bogus_interrupt(h))
3567 spin_lock_irqsave(&h->lock, flags);
3568 raw_tag = get_next_completion(h);
3569 while (raw_tag != FIFO_EMPTY)
3570 raw_tag = next_command(h);
3571 spin_unlock_irqrestore(&h->lock, flags);
3575 static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3577 ctlr_info_t *h = dev_id;
3578 unsigned long flags;
3581 if (interrupt_not_for_us(h))
3583 spin_lock_irqsave(&h->lock, flags);
3584 while (interrupt_pending(h)) {
3585 raw_tag = get_next_completion(h);
3586 while (raw_tag != FIFO_EMPTY) {
3587 if (cciss_tag_contains_index(raw_tag))
3588 raw_tag = process_indexed_cmd(h, raw_tag);
3590 raw_tag = process_nonindexed_cmd(h, raw_tag);
3593 spin_unlock_irqrestore(&h->lock, flags);
3597 /* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3598 * check the interrupt pending register because it is not set.
3600 static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3602 ctlr_info_t *h = dev_id;
3603 unsigned long flags;
3606 spin_lock_irqsave(&h->lock, flags);
3607 raw_tag = get_next_completion(h);
3608 while (raw_tag != FIFO_EMPTY) {
3609 if (cciss_tag_contains_index(raw_tag))
3610 raw_tag = process_indexed_cmd(h, raw_tag);
3612 raw_tag = process_nonindexed_cmd(h, raw_tag);
3614 spin_unlock_irqrestore(&h->lock, flags);
3619 * add_to_scan_list() - add controller to rescan queue
3620 * @h: Pointer to the controller.
3622 * Adds the controller to the rescan queue if not already on the queue.
3624 * returns 1 if added to the queue, 0 if skipped (could be on the
3625 * queue already, or the controller could be initializing or shutting
3628 static int add_to_scan_list(struct ctlr_info *h)
3630 struct ctlr_info *test_h;
3634 if (h->busy_initializing)
3637 if (!mutex_trylock(&h->busy_shutting_down))
3640 mutex_lock(&scan_mutex);
3641 list_for_each_entry(test_h, &scan_q, scan_list) {
3647 if (!found && !h->busy_scanning) {
3648 INIT_COMPLETION(h->scan_wait);
3649 list_add_tail(&h->scan_list, &scan_q);
3652 mutex_unlock(&scan_mutex);
3653 mutex_unlock(&h->busy_shutting_down);
3659 * remove_from_scan_list() - remove controller from rescan queue
3660 * @h: Pointer to the controller.
3662 * Removes the controller from the rescan queue if present. Blocks if
3663 * the controller is currently conducting a rescan. The controller
3664 * can be in one of three states:
3665 * 1. Doesn't need a scan
3666 * 2. On the scan list, but not scanning yet (we remove it)
3667 * 3. Busy scanning (and not on the list). In this case we want to wait for
3668 * the scan to complete to make sure the scanning thread for this
3669 * controller is completely idle.
3671 static void remove_from_scan_list(struct ctlr_info *h)
3673 struct ctlr_info *test_h, *tmp_h;
3675 mutex_lock(&scan_mutex);
3676 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
3677 if (test_h == h) { /* state 2. */
3678 list_del(&h->scan_list);
3679 complete_all(&h->scan_wait);
3680 mutex_unlock(&scan_mutex);
3684 if (h->busy_scanning) { /* state 3. */
3685 mutex_unlock(&scan_mutex);
3686 wait_for_completion(&h->scan_wait);
3687 } else { /* state 1, nothing to do. */
3688 mutex_unlock(&scan_mutex);
3693 * scan_thread() - kernel thread used to rescan controllers
3696 * A kernel thread used scan for drive topology changes on
3697 * controllers. The thread processes only one controller at a time
3698 * using a queue. Controllers are added to the queue using
3699 * add_to_scan_list() and removed from the queue either after done
3700 * processing or using remove_from_scan_list().
3704 static int scan_thread(void *data)
3706 struct ctlr_info *h;
3709 set_current_state(TASK_INTERRUPTIBLE);
3711 if (kthread_should_stop())
3715 mutex_lock(&scan_mutex);
3716 if (list_empty(&scan_q)) {
3717 mutex_unlock(&scan_mutex);
3721 h = list_entry(scan_q.next,
3724 list_del(&h->scan_list);
3725 h->busy_scanning = 1;
3726 mutex_unlock(&scan_mutex);
3728 rebuild_lun_table(h, 0, 0);
3729 complete_all(&h->scan_wait);
3730 mutex_lock(&scan_mutex);
3731 h->busy_scanning = 0;
3732 mutex_unlock(&scan_mutex);
3739 static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3741 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3744 switch (c->err_info->SenseInfo[12]) {
3746 dev_warn(&h->pdev->dev, "a state change "
3747 "detected, command retried\n");
3751 dev_warn(&h->pdev->dev, "LUN failure "
3752 "detected, action required\n");
3755 case REPORT_LUNS_CHANGED:
3756 dev_warn(&h->pdev->dev, "report LUN data changed\n");
3758 * Here, we could call add_to_scan_list and wake up the scan thread,
3759 * except that it's quite likely that we will get more than one
3760 * REPORT_LUNS_CHANGED condition in quick succession, which means
3761 * that those which occur after the first one will likely happen
3762 * *during* the scan_thread's rescan. And the rescan code is not
3763 * robust enough to restart in the middle, undoing what it has already
3764 * done, and it's not clear that it's even possible to do this, since
3765 * part of what it does is notify the block layer, which starts
3766 * doing it's own i/o to read partition tables and so on, and the
3767 * driver doesn't have visibility to know what might need undoing.
3768 * In any event, if possible, it is horribly complicated to get right
3769 * so we just don't do it for now.
3771 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3775 case POWER_OR_RESET:
3776 dev_warn(&h->pdev->dev,
3777 "a power on or device reset detected\n");
3780 case UNIT_ATTENTION_CLEARED:
3781 dev_warn(&h->pdev->dev,
3782 "unit attention cleared by another initiator\n");
3786 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3792 * We cannot read the structure directly, for portability we must use
3794 * This is for debug only.
3796 static void print_cfg_table(ctlr_info_t *h)
3800 CfgTable_struct *tb = h->cfgtable;
3802 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3803 dev_dbg(&h->pdev->dev, "------------------------------------\n");
3804 for (i = 0; i < 4; i++)
3805 temp_name[i] = readb(&(tb->Signature[i]));
3806 temp_name[4] = '\0';
3807 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3808 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3809 readl(&(tb->SpecValence)));
3810 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
3811 readl(&(tb->TransportSupport)));
3812 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
3813 readl(&(tb->TransportActive)));
3814 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
3815 readl(&(tb->HostWrite.TransportRequest)));
3816 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
3817 readl(&(tb->HostWrite.CoalIntDelay)));
3818 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
3819 readl(&(tb->HostWrite.CoalIntCount)));
3820 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
3821 readl(&(tb->CmdsOutMax)));
3822 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3823 readl(&(tb->BusTypes)));
3824 for (i = 0; i < 16; i++)
3825 temp_name[i] = readb(&(tb->ServerName[i]));
3826 temp_name[16] = '\0';
3827 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3828 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3829 readl(&(tb->HeartBeat)));
3832 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3834 int i, offset, mem_type, bar_type;
3835 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
3838 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3839 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
3840 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3843 mem_type = pci_resource_flags(pdev, i) &
3844 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
3846 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3847 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3848 offset += 4; /* 32 bit */
3850 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3853 default: /* reserved in PCI 2.2 */
3854 dev_warn(&pdev->dev,
3855 "Base address is invalid\n");
3860 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3866 /* Fill in bucket_map[], given nsgs (the max number of
3867 * scatter gather elements supported) and bucket[],
3868 * which is an array of 8 integers. The bucket[] array
3869 * contains 8 different DMA transfer sizes (in 16
3870 * byte increments) which the controller uses to fetch
3871 * commands. This function fills in bucket_map[], which
3872 * maps a given number of scatter gather elements to one of
3873 * the 8 DMA transfer sizes. The point of it is to allow the
3874 * controller to only do as much DMA as needed to fetch the
3875 * command, with the DMA transfer size encoded in the lower
3876 * bits of the command address.
3878 static void calc_bucket_map(int bucket[], int num_buckets,
3879 int nsgs, int *bucket_map)
3883 /* even a command with 0 SGs requires 4 blocks */
3884 #define MINIMUM_TRANSFER_BLOCKS 4
3885 #define NUM_BUCKETS 8
3886 /* Note, bucket_map must have nsgs+1 entries. */
3887 for (i = 0; i <= nsgs; i++) {
3888 /* Compute size of a command with i SG entries */
3889 size = i + MINIMUM_TRANSFER_BLOCKS;
3890 b = num_buckets; /* Assume the biggest bucket */
3891 /* Find the bucket that is just big enough */
3892 for (j = 0; j < 8; j++) {
3893 if (bucket[j] >= size) {
3898 /* for a command with i SG entries, use bucket b. */
3903 static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3907 /* under certain very rare conditions, this can take awhile.
3908 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3909 * as we enter this code.) */
3910 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3911 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3913 usleep_range(10000, 20000);
3917 static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3920 /* This is a bit complicated. There are 8 registers on
3921 * the controller which we write to to tell it 8 different
3922 * sizes of commands which there may be. It's a way of
3923 * reducing the DMA done to fetch each command. Encoded into
3924 * each command's tag are 3 bits which communicate to the controller
3925 * which of the eight sizes that command fits within. The size of
3926 * each command depends on how many scatter gather entries there are.
3927 * Each SG entry requires 16 bytes. The eight registers are programmed
3928 * with the number of 16-byte blocks a command of that size requires.
3929 * The smallest command possible requires 5 such 16 byte blocks.
3930 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3931 * blocks. Note, this only extends to the SG entries contained
3932 * within the command block, and does not extend to chained blocks
3933 * of SG elements. bft[] contains the eight values we write to
3934 * the registers. They are not evenly distributed, but have more
3935 * sizes for small commands, and fewer sizes for larger commands.
3938 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
3940 * 5 = 1 s/g entry or 4k
3941 * 6 = 2 s/g entry or 8k
3942 * 8 = 4 s/g entry or 16k
3943 * 10 = 6 s/g entry or 24k
3945 unsigned long register_value;
3946 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3948 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3950 /* Controller spec: zero out this buffer. */
3951 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3952 h->reply_pool_head = h->reply_pool;
3954 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3955 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3956 h->blockFetchTable);
3957 writel(bft[0], &h->transtable->BlockFetch0);
3958 writel(bft[1], &h->transtable->BlockFetch1);
3959 writel(bft[2], &h->transtable->BlockFetch2);
3960 writel(bft[3], &h->transtable->BlockFetch3);
3961 writel(bft[4], &h->transtable->BlockFetch4);
3962 writel(bft[5], &h->transtable->BlockFetch5);
3963 writel(bft[6], &h->transtable->BlockFetch6);
3964 writel(bft[7], &h->transtable->BlockFetch7);
3966 /* size of controller ring buffer */
3967 writel(h->max_commands, &h->transtable->RepQSize);
3968 writel(1, &h->transtable->RepQCount);
3969 writel(0, &h->transtable->RepQCtrAddrLow32);
3970 writel(0, &h->transtable->RepQCtrAddrHigh32);
3971 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3972 writel(0, &h->transtable->RepQAddr0High32);
3973 writel(CFGTBL_Trans_Performant | use_short_tags,
3974 &(h->cfgtable->HostWrite.TransportRequest));
3976 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
3977 cciss_wait_for_mode_change_ack(h);
3978 register_value = readl(&(h->cfgtable->TransportActive));
3979 if (!(register_value & CFGTBL_Trans_Performant))
3980 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
3981 " performant mode\n");
3984 static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3986 __u32 trans_support;
3988 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3989 /* Attempt to put controller into performant mode if supported */
3990 /* Does board support performant mode? */
3991 trans_support = readl(&(h->cfgtable->TransportSupport));
3992 if (!(trans_support & PERFORMANT_MODE))
3995 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
3996 /* Performant mode demands commands on a 32 byte boundary
3997 * pci_alloc_consistent aligns on page boundarys already.
3998 * Just need to check if divisible by 32
4000 if ((sizeof(CommandList_struct) % 32) != 0) {
4001 dev_warn(&h->pdev->dev, "%s %d %s\n",
4002 "cciss info: command size[",
4003 (int)sizeof(CommandList_struct),
4004 "] not divisible by 32, no performant mode..\n");
4008 /* Performant mode ring buffer and supporting data structures */
4009 h->reply_pool = (__u64 *)pci_alloc_consistent(
4010 h->pdev, h->max_commands * sizeof(__u64),
4011 &(h->reply_pool_dhandle));
4013 /* Need a block fetch table for performant mode */
4014 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4015 sizeof(__u32)), GFP_KERNEL);
4017 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4020 cciss_enter_performant_mode(h,
4021 trans_support & CFGTBL_Trans_use_short_tags);
4023 /* Change the access methods to the performant access methods */
4024 h->access = SA5_performant_access;
4025 h->transMethod = CFGTBL_Trans_Performant;
4029 kfree(h->blockFetchTable);
4031 pci_free_consistent(h->pdev,
4032 h->max_commands * sizeof(__u64),
4034 h->reply_pool_dhandle);
4037 } /* cciss_put_controller_into_performant_mode */
4039 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4040 * controllers that are capable. If not, we use IO-APIC mode.
4043 static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
4045 #ifdef CONFIG_PCI_MSI
4047 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4051 /* Some boards advertise MSI but don't really support it */
4052 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4053 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4054 goto default_int_mode;
4056 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4057 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
4059 h->intr[0] = cciss_msix_entries[0].vector;
4060 h->intr[1] = cciss_msix_entries[1].vector;
4061 h->intr[2] = cciss_msix_entries[2].vector;
4062 h->intr[3] = cciss_msix_entries[3].vector;
4067 dev_warn(&h->pdev->dev,
4068 "only %d MSI-X vectors available\n", err);
4069 goto default_int_mode;
4071 dev_warn(&h->pdev->dev,
4072 "MSI-X init failed %d\n", err);
4073 goto default_int_mode;
4076 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4077 if (!pci_enable_msi(h->pdev))
4080 dev_warn(&h->pdev->dev, "MSI init failed\n");
4083 #endif /* CONFIG_PCI_MSI */
4084 /* if we get here we're going to use the default interrupt mode */
4085 h->intr[PERF_MODE_INT] = h->pdev->irq;
4089 static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4092 u32 subsystem_vendor_id, subsystem_device_id;
4094 subsystem_vendor_id = pdev->subsystem_vendor;
4095 subsystem_device_id = pdev->subsystem_device;
4096 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4097 subsystem_vendor_id;
4099 for (i = 0; i < ARRAY_SIZE(products); i++)
4100 if (*board_id == products[i].board_id)
4102 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4107 static inline bool cciss_board_disabled(ctlr_info_t *h)
4111 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4112 return ((command & PCI_COMMAND_MEMORY) == 0);
4115 static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4116 unsigned long *memory_bar)
4120 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4121 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4122 /* addressing mode bits already removed */
4123 *memory_bar = pci_resource_start(pdev, i);
4124 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4128 dev_warn(&pdev->dev, "no memory BAR found\n");
4132 static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4133 void __iomem *vaddr, int wait_for_ready)
4134 #define BOARD_READY 1
4135 #define BOARD_NOT_READY 0
4141 iterations = CCISS_BOARD_READY_ITERATIONS;
4143 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4145 for (i = 0; i < iterations; i++) {
4146 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4147 if (wait_for_ready) {
4148 if (scratchpad == CCISS_FIRMWARE_READY)
4151 if (scratchpad != CCISS_FIRMWARE_READY)
4154 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
4156 dev_warn(&pdev->dev, "board not ready, timed out.\n");
4160 static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4161 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4164 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4165 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4166 *cfg_base_addr &= (u32) 0x0000ffff;
4167 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4168 if (*cfg_base_addr_index == -1) {
4169 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4170 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4176 static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4180 u64 cfg_base_addr_index;
4184 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4185 &cfg_base_addr_index, &cfg_offset);
4188 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4189 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4192 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4195 /* Find performant mode table. */
4196 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4197 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4198 cfg_base_addr_index)+cfg_offset+trans_offset,
4199 sizeof(*h->transtable));
4205 static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4207 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4209 /* Limit commands in memory limited kdump scenario. */
4210 if (reset_devices && h->max_commands > 32)
4211 h->max_commands = 32;
4213 if (h->max_commands < 16) {
4214 dev_warn(&h->pdev->dev, "Controller reports "
4215 "max supported commands of %d, an obvious lie. "
4216 "Using 16. Ensure that firmware is up to date.\n",
4218 h->max_commands = 16;
4222 /* Interrogate the hardware for some limits:
4223 * max commands, max SG elements without chaining, and with chaining,
4224 * SG chain block size, etc.
4226 static void __devinit cciss_find_board_params(ctlr_info_t *h)
4228 cciss_get_max_perf_mode_cmds(h);
4229 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
4230 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
4232 * Limit in-command s/g elements to 32 save dma'able memory.
4233 * Howvever spec says if 0, use 31
4235 h->max_cmd_sgentries = 31;
4236 if (h->maxsgentries > 512) {
4237 h->max_cmd_sgentries = 32;
4238 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4239 h->maxsgentries--; /* save one for chain pointer */
4241 h->maxsgentries = 31; /* default to traditional values */
4246 static inline bool CISS_signature_present(ctlr_info_t *h)
4248 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4249 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4250 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4251 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4252 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4258 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4259 static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4264 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4266 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4270 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4271 * in a prefetch beyond physical memory.
4273 static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4278 if (h->board_id != 0x3225103C)
4280 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4281 dma_prefetch |= 0x8000;
4282 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4283 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4285 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4288 static int __devinit cciss_pci_init(ctlr_info_t *h)
4290 int prod_index, err;
4292 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
4295 h->product_name = products[prod_index].product_name;
4296 h->access = *(products[prod_index].access);
4298 if (cciss_board_disabled(h)) {
4299 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
4302 err = pci_enable_device(h->pdev);
4304 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
4308 err = pci_request_regions(h->pdev, "cciss");
4310 dev_warn(&h->pdev->dev,
4311 "Cannot obtain PCI resources, aborting\n");
4315 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4316 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
4318 /* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4319 * else we use the IO-APIC interrupt assigned to us by system ROM.
4321 cciss_interrupt_mode(h);
4322 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
4324 goto err_out_free_res;
4325 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4328 goto err_out_free_res;
4330 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4332 goto err_out_free_res;
4333 err = cciss_find_cfgtables(h);
4335 goto err_out_free_res;
4337 cciss_find_board_params(h);
4339 if (!CISS_signature_present(h)) {
4341 goto err_out_free_res;
4343 cciss_enable_scsi_prefetch(h);
4344 cciss_p600_dma_prefetch_quirk(h);
4345 cciss_put_controller_into_performant_mode(h);
4350 * Deliberately omit pci_disable_device(): it does something nasty to
4351 * Smart Array controllers that pci_enable_device does not undo
4354 iounmap(h->transtable);
4356 iounmap(h->cfgtable);
4359 pci_release_regions(h->pdev);
4363 /* Function to find the first free pointer into our hba[] array
4364 * Returns -1 if no free entries are left.
4366 static int alloc_cciss_hba(struct pci_dev *pdev)
4370 for (i = 0; i < MAX_CTLR; i++) {
4374 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4381 dev_warn(&pdev->dev, "This driver supports a maximum"
4382 " of %d controllers.\n", MAX_CTLR);
4385 dev_warn(&pdev->dev, "out of memory.\n");
4389 static void free_hba(ctlr_info_t *h)
4393 hba[h->ctlr] = NULL;
4394 for (i = 0; i < h->highest_lun + 1; i++)
4395 if (h->gendisk[i] != NULL)
4396 put_disk(h->gendisk[i]);
4400 /* Send a message CDB to the firmware. */
4401 static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4404 CommandListHeader_struct CommandHeader;
4405 RequestBlock_struct Request;
4406 ErrDescriptor_struct ErrorDescriptor;
4408 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4411 uint32_t paddr32, tag;
4412 void __iomem *vaddr;
4415 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4419 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4420 CCISS commands, so they must be allocated from the lower 4GiB of
4422 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4428 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4434 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4435 although there's no guarantee, we assume that the address is at
4436 least 4-byte aligned (most likely, it's page-aligned). */
4439 cmd->CommandHeader.ReplyQueue = 0;
4440 cmd->CommandHeader.SGList = 0;
4441 cmd->CommandHeader.SGTotal = 0;
4442 cmd->CommandHeader.Tag.lower = paddr32;
4443 cmd->CommandHeader.Tag.upper = 0;
4444 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4446 cmd->Request.CDBLen = 16;
4447 cmd->Request.Type.Type = TYPE_MSG;
4448 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4449 cmd->Request.Type.Direction = XFER_NONE;
4450 cmd->Request.Timeout = 0; /* Don't time out */
4451 cmd->Request.CDB[0] = opcode;
4452 cmd->Request.CDB[1] = type;
4453 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4455 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4456 cmd->ErrorDescriptor.Addr.upper = 0;
4457 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4459 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4461 for (i = 0; i < 10; i++) {
4462 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4463 if ((tag & ~3) == paddr32)
4465 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
4470 /* we leak the DMA buffer here ... no choice since the controller could
4471 still complete the command. */
4474 "controller message %02x:%02x timed out\n",
4479 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4482 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
4487 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
4492 #define cciss_noop(p) cciss_message(p, 3, 0)
4494 static int cciss_controller_hard_reset(struct pci_dev *pdev,
4495 void * __iomem vaddr, u32 use_doorbell)
4501 /* For everything after the P600, the PCI power state method
4502 * of resetting the controller doesn't work, so we have this
4503 * other way using the doorbell register.
4505 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4506 writel(use_doorbell, vaddr + SA5_DOORBELL);
4507 } else { /* Try to do it the PCI power state way */
4509 /* Quoting from the Open CISS Specification: "The Power
4510 * Management Control/Status Register (CSR) controls the power
4511 * state of the device. The normal operating state is D0,
4512 * CSR=00h. The software off state is D3, CSR=03h. To reset
4513 * the controller, place the interface device in D3 then to D0,
4514 * this causes a secondary PCI reset which will reset the
4517 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4520 "cciss_controller_hard_reset: "
4521 "PCI PM not supported\n");
4524 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4525 /* enter the D3hot power management state */
4526 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4527 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4529 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4533 /* enter the D0 power management state */
4534 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4536 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
4539 * The P600 requires a small delay when changing states.
4540 * Otherwise we may think the board did not reset and we bail.
4541 * This for kdump only and is particular to the P600.
4548 static __devinit void init_driver_version(char *driver_version, int len)
4550 memset(driver_version, 0, len);
4551 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4554 static __devinit int write_driver_ver_to_cfgtable(
4555 CfgTable_struct __iomem *cfgtable)
4557 char *driver_version;
4558 int i, size = sizeof(cfgtable->driver_version);
4560 driver_version = kmalloc(size, GFP_KERNEL);
4561 if (!driver_version)
4564 init_driver_version(driver_version, size);
4565 for (i = 0; i < size; i++)
4566 writeb(driver_version[i], &cfgtable->driver_version[i]);
4567 kfree(driver_version);
4571 static __devinit void read_driver_ver_from_cfgtable(
4572 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4576 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4577 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4580 static __devinit int controller_reset_failed(
4581 CfgTable_struct __iomem *cfgtable)
4584 char *driver_ver, *old_driver_ver;
4585 int rc, size = sizeof(cfgtable->driver_version);
4587 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4588 if (!old_driver_ver)
4590 driver_ver = old_driver_ver + size;
4592 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4593 * should have been changed, otherwise we know the reset failed.
4595 init_driver_version(old_driver_ver, size);
4596 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4597 rc = !memcmp(driver_ver, old_driver_ver, size);
4598 kfree(old_driver_ver);
4602 /* This does a hard reset of the controller using PCI power management
4603 * states or using the doorbell register. */
4604 static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4608 u64 cfg_base_addr_index;
4609 void __iomem *vaddr;
4610 unsigned long paddr;
4611 u32 misc_fw_support;
4613 CfgTable_struct __iomem *cfgtable;
4616 u16 command_register;
4618 /* For controllers as old a the p600, this is very nearly
4621 * pci_save_state(pci_dev);
4622 * pci_set_power_state(pci_dev, PCI_D3hot);
4623 * pci_set_power_state(pci_dev, PCI_D0);
4624 * pci_restore_state(pci_dev);
4626 * For controllers newer than the P600, the pci power state
4627 * method of resetting doesn't work so we have another way
4628 * using the doorbell register.
4631 /* Exclude 640x boards. These are two pci devices in one slot
4632 * which share a battery backed cache module. One controls the
4633 * cache, the other accesses the cache through the one that controls
4634 * it. If we reset the one controlling the cache, the other will
4635 * likely not be happy. Just forbid resetting this conjoined mess.
4637 cciss_lookup_board_id(pdev, &board_id);
4638 if (!ctlr_is_resettable(board_id)) {
4639 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4640 "due to shared cache module.");
4644 /* if controller is soft- but not hard resettable... */
4645 if (!ctlr_is_hard_resettable(board_id))
4646 return -ENOTSUPP; /* try soft reset later. */
4648 /* Save the PCI command register */
4649 pci_read_config_word(pdev, 4, &command_register);
4650 /* Turn the board off. This is so that later pci_restore_state()
4651 * won't turn the board on before the rest of config space is ready.
4653 pci_disable_device(pdev);
4654 pci_save_state(pdev);
4656 /* find the first memory BAR, so we can find the cfg table */
4657 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4660 vaddr = remap_pci_mem(paddr, 0x250);
4664 /* find cfgtable in order to check if reset via doorbell is supported */
4665 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4666 &cfg_base_addr_index, &cfg_offset);
4669 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4670 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4675 rc = write_driver_ver_to_cfgtable(cfgtable);
4679 /* If reset via doorbell register is supported, use that.
4680 * There are two such methods. Favor the newest method.
4682 misc_fw_support = readl(&cfgtable->misc_fw_support);
4683 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4685 use_doorbell = DOORBELL_CTLR_RESET2;
4687 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
4689 dev_warn(&pdev->dev, "Controller claims that "
4690 "'Bit 2 doorbell reset' is "
4691 "supported, but not 'bit 5 doorbell reset'. "
4692 "Firmware update is recommended.\n");
4693 rc = -ENOTSUPP; /* use the soft reset */
4694 goto unmap_cfgtable;
4698 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4700 goto unmap_cfgtable;
4701 pci_restore_state(pdev);
4702 rc = pci_enable_device(pdev);
4704 dev_warn(&pdev->dev, "failed to enable device.\n");
4705 goto unmap_cfgtable;
4707 pci_write_config_word(pdev, 4, command_register);
4709 /* Some devices (notably the HP Smart Array 5i Controller)
4710 need a little pause here */
4711 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4713 /* Wait for board to become not ready, then ready. */
4714 dev_info(&pdev->dev, "Waiting for board to reset.\n");
4715 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4717 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4718 " Will try soft reset.\n");
4719 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4720 goto unmap_cfgtable;
4722 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4724 dev_warn(&pdev->dev,
4725 "failed waiting for board to become ready "
4726 "after hard reset\n");
4727 goto unmap_cfgtable;
4730 rc = controller_reset_failed(vaddr);
4732 goto unmap_cfgtable;
4734 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4735 "controller. Will try soft reset.\n");
4736 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4738 dev_info(&pdev->dev, "Board ready after hard reset.\n");
4749 static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4756 /* Reset the controller with a PCI power-cycle or via doorbell */
4757 rc = cciss_kdump_hard_reset_controller(pdev);
4759 /* -ENOTSUPP here means we cannot reset the controller
4760 * but it's already (and still) up and running in
4761 * "performant mode". Or, it might be 640x, which can't reset
4762 * due to concerns about shared bbwc between 6402/6404 pair.
4764 if (rc == -ENOTSUPP)
4765 return rc; /* just try to do the kdump anyhow. */
4769 /* Now try to get the controller to respond to a no-op */
4770 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4771 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4772 if (cciss_noop(pdev) == 0)
4775 dev_warn(&pdev->dev, "no-op failed%s\n",
4776 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4777 "; re-trying" : ""));
4778 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4783 static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4785 h->cmd_pool_bits = kmalloc(
4786 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4787 sizeof(unsigned long), GFP_KERNEL);
4788 h->cmd_pool = pci_alloc_consistent(h->pdev,
4789 h->nr_cmds * sizeof(CommandList_struct),
4790 &(h->cmd_pool_dhandle));
4791 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4792 h->nr_cmds * sizeof(ErrorInfo_struct),
4793 &(h->errinfo_pool_dhandle));
4794 if ((h->cmd_pool_bits == NULL)
4795 || (h->cmd_pool == NULL)
4796 || (h->errinfo_pool == NULL)) {
4797 dev_err(&h->pdev->dev, "out of memory");
4803 static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4807 /* zero it, so that on free we need not know how many were alloc'ed */
4808 h->scatter_list = kzalloc(h->max_commands *
4809 sizeof(struct scatterlist *), GFP_KERNEL);
4810 if (!h->scatter_list)
4813 for (i = 0; i < h->nr_cmds; i++) {
4814 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4815 h->maxsgentries, GFP_KERNEL);
4816 if (h->scatter_list[i] == NULL) {
4817 dev_err(&h->pdev->dev, "could not allocate "
4825 static void cciss_free_scatterlists(ctlr_info_t *h)
4829 if (h->scatter_list) {
4830 for (i = 0; i < h->nr_cmds; i++)
4831 kfree(h->scatter_list[i]);
4832 kfree(h->scatter_list);
4836 static void cciss_free_cmd_pool(ctlr_info_t *h)
4838 kfree(h->cmd_pool_bits);
4840 pci_free_consistent(h->pdev,
4841 h->nr_cmds * sizeof(CommandList_struct),
4842 h->cmd_pool, h->cmd_pool_dhandle);
4843 if (h->errinfo_pool)
4844 pci_free_consistent(h->pdev,
4845 h->nr_cmds * sizeof(ErrorInfo_struct),
4846 h->errinfo_pool, h->errinfo_pool_dhandle);
4849 static int cciss_request_irq(ctlr_info_t *h,
4850 irqreturn_t (*msixhandler)(int, void *),
4851 irqreturn_t (*intxhandler)(int, void *))
4853 if (h->msix_vector || h->msi_vector) {
4854 if (!request_irq(h->intr[PERF_MODE_INT], msixhandler,
4855 IRQF_DISABLED, h->devname, h))
4857 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
4858 " for %s\n", h->intr[PERF_MODE_INT],
4863 if (!request_irq(h->intr[PERF_MODE_INT], intxhandler,
4864 IRQF_DISABLED, h->devname, h))
4866 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
4867 h->intr[PERF_MODE_INT], h->devname);
4871 static int __devinit cciss_kdump_soft_reset(ctlr_info_t *h)
4873 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4874 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4878 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4879 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4880 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4884 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4885 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4886 dev_warn(&h->pdev->dev, "Board failed to become ready "
4887 "after soft reset.\n");
4894 static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4898 free_irq(h->intr[PERF_MODE_INT], h);
4899 #ifdef CONFIG_PCI_MSI
4901 pci_disable_msix(h->pdev);
4902 else if (h->msi_vector)
4903 pci_disable_msi(h->pdev);
4904 #endif /* CONFIG_PCI_MSI */
4905 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4906 cciss_free_scatterlists(h);
4907 cciss_free_cmd_pool(h);
4908 kfree(h->blockFetchTable);
4910 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4911 h->reply_pool, h->reply_pool_dhandle);
4913 iounmap(h->transtable);
4915 iounmap(h->cfgtable);
4918 unregister_blkdev(h->major, h->devname);
4919 cciss_destroy_hba_sysfs_entry(h);
4920 pci_release_regions(h->pdev);
4926 * This is it. Find all the controllers and register them. I really hate
4927 * stealing all these major device numbers.
4928 * returns the number of block devices registered.
4930 static int __devinit cciss_init_one(struct pci_dev *pdev,
4931 const struct pci_device_id *ent)
4936 int try_soft_reset = 0;
4937 int dac, return_code;
4938 InquiryData_struct *inq_buff;
4940 unsigned long flags;
4942 rc = cciss_init_reset_devices(pdev);
4944 if (rc != -ENOTSUPP)
4946 /* If the reset fails in a particular way (it has no way to do
4947 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4948 * a soft reset once we get the controller configured up to the
4949 * point that it can accept a command.
4955 reinit_after_soft_reset:
4957 i = alloc_cciss_hba(pdev);
4963 h->busy_initializing = 1;
4964 INIT_LIST_HEAD(&h->cmpQ);
4965 INIT_LIST_HEAD(&h->reqQ);
4966 mutex_init(&h->busy_shutting_down);
4968 if (cciss_pci_init(h) != 0)
4969 goto clean_no_release_regions;
4971 sprintf(h->devname, "cciss%d", i);
4974 if (cciss_tape_cmds < 2)
4975 cciss_tape_cmds = 2;
4976 if (cciss_tape_cmds > 16)
4977 cciss_tape_cmds = 16;
4979 init_completion(&h->scan_wait);
4981 if (cciss_create_hba_sysfs_entry(h))
4984 /* configure PCI DMA stuff */
4985 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
4987 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
4990 dev_err(&h->pdev->dev, "no suitable DMA available\n");
4995 * register with the major number, or get a dynamic major number
4996 * by passing 0 as argument. This is done for greater than
4997 * 8 controller support.
4999 if (i < MAX_CTLR_ORIG)
5000 h->major = COMPAQ_CISS_MAJOR + i;
5001 rc = register_blkdev(h->major, h->devname);
5002 if (rc == -EBUSY || rc == -EINVAL) {
5003 dev_err(&h->pdev->dev,
5004 "Unable to get major number %d for %s "
5005 "on hba %d\n", h->major, h->devname, i);
5008 if (i >= MAX_CTLR_ORIG)
5012 /* make sure the board interrupts are off */
5013 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5014 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5018 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
5019 h->devname, pdev->device, pci_name(pdev),
5020 h->intr[PERF_MODE_INT], dac ? "" : " not");
5022 if (cciss_allocate_cmd_pool(h))
5025 if (cciss_allocate_scatterlists(h))
5028 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5029 h->chainsize, h->nr_cmds);
5030 if (!h->cmd_sg_list && h->chainsize > 0)
5033 spin_lock_init(&h->lock);
5035 /* Initialize the pdev driver private data.
5036 have it point to h. */
5037 pci_set_drvdata(pdev, h);
5038 /* command and error info recs zeroed out before
5040 memset(h->cmd_pool_bits, 0,
5041 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
5042 * sizeof(unsigned long));
5045 h->highest_lun = -1;
5046 for (j = 0; j < CISS_MAX_LUN; j++) {
5048 h->gendisk[j] = NULL;
5051 /* At this point, the controller is ready to take commands.
5052 * Now, if reset_devices and the hard reset didn't work, try
5053 * the soft reset and see if that works.
5055 if (try_soft_reset) {
5057 /* This is kind of gross. We may or may not get a completion
5058 * from the soft reset command, and if we do, then the value
5059 * from the fifo may or may not be valid. So, we wait 10 secs
5060 * after the reset throwing away any completions we get during
5061 * that time. Unregister the interrupt handler and register
5062 * fake ones to scoop up any residual completions.
5064 spin_lock_irqsave(&h->lock, flags);
5065 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5066 spin_unlock_irqrestore(&h->lock, flags);
5067 free_irq(h->intr[PERF_MODE_INT], h);
5068 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5069 cciss_intx_discard_completions);
5071 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5076 rc = cciss_kdump_soft_reset(h);
5078 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5082 dev_info(&h->pdev->dev, "Board READY.\n");
5083 dev_info(&h->pdev->dev,
5084 "Waiting for stale completions to drain.\n");
5085 h->access.set_intr_mask(h, CCISS_INTR_ON);
5087 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5089 rc = controller_reset_failed(h->cfgtable);
5091 dev_info(&h->pdev->dev,
5092 "Soft reset appears to have failed.\n");
5094 /* since the controller's reset, we have to go back and re-init
5095 * everything. Easiest to just forget what we've done and do it
5098 cciss_undo_allocations_after_kdump_soft_reset(h);
5101 /* don't go to clean4, we already unallocated */
5104 goto reinit_after_soft_reset;
5107 cciss_scsi_setup(h);
5109 /* Turn the interrupts on so we can service requests */
5110 h->access.set_intr_mask(h, CCISS_INTR_ON);
5112 /* Get the firmware version */
5113 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5114 if (inq_buff == NULL) {
5115 dev_err(&h->pdev->dev, "out of memory\n");
5119 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
5120 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
5121 if (return_code == IO_OK) {
5122 h->firm_ver[0] = inq_buff->data_byte[32];
5123 h->firm_ver[1] = inq_buff->data_byte[33];
5124 h->firm_ver[2] = inq_buff->data_byte[34];
5125 h->firm_ver[3] = inq_buff->data_byte[35];
5126 } else { /* send command failed */
5127 dev_warn(&h->pdev->dev, "unable to determine firmware"
5128 " version of controller\n");
5134 h->cciss_max_sectors = 8192;
5136 rebuild_lun_table(h, 1, 0);
5137 h->busy_initializing = 0;
5141 cciss_free_cmd_pool(h);
5142 cciss_free_scatterlists(h);
5143 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5144 free_irq(h->intr[PERF_MODE_INT], h);
5146 unregister_blkdev(h->major, h->devname);
5148 cciss_destroy_hba_sysfs_entry(h);
5150 pci_release_regions(pdev);
5151 clean_no_release_regions:
5152 h->busy_initializing = 0;
5155 * Deliberately omit pci_disable_device(): it does something nasty to
5156 * Smart Array controllers that pci_enable_device does not undo
5158 pci_set_drvdata(pdev, NULL);
5163 static void cciss_shutdown(struct pci_dev *pdev)
5169 h = pci_get_drvdata(pdev);
5170 flush_buf = kzalloc(4, GFP_KERNEL);
5172 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
5175 /* write all data in the battery backed cache to disk */
5176 memset(flush_buf, 0, 4);
5177 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
5178 4, 0, CTLR_LUNID, TYPE_CMD);
5180 if (return_code != IO_OK)
5181 dev_warn(&h->pdev->dev, "Error flushing cache\n");
5182 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5183 free_irq(h->intr[PERF_MODE_INT], h);
5186 static void __devexit cciss_remove_one(struct pci_dev *pdev)
5191 if (pci_get_drvdata(pdev) == NULL) {
5192 dev_err(&pdev->dev, "Unable to remove device\n");
5196 h = pci_get_drvdata(pdev);
5198 if (hba[i] == NULL) {
5199 dev_err(&pdev->dev, "device appears to already be removed\n");
5203 mutex_lock(&h->busy_shutting_down);
5205 remove_from_scan_list(h);
5206 remove_proc_entry(h->devname, proc_cciss);
5207 unregister_blkdev(h->major, h->devname);
5209 /* remove it from the disk list */
5210 for (j = 0; j < CISS_MAX_LUN; j++) {
5211 struct gendisk *disk = h->gendisk[j];
5213 struct request_queue *q = disk->queue;
5215 if (disk->flags & GENHD_FL_UP) {
5216 cciss_destroy_ld_sysfs_entry(h, j, 1);
5220 blk_cleanup_queue(q);
5224 #ifdef CONFIG_CISS_SCSI_TAPE
5225 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
5228 cciss_shutdown(pdev);
5230 #ifdef CONFIG_PCI_MSI
5232 pci_disable_msix(h->pdev);
5233 else if (h->msi_vector)
5234 pci_disable_msi(h->pdev);
5235 #endif /* CONFIG_PCI_MSI */
5237 iounmap(h->transtable);
5238 iounmap(h->cfgtable);
5241 cciss_free_cmd_pool(h);
5242 /* Free up sg elements */
5243 for (j = 0; j < h->nr_cmds; j++)
5244 kfree(h->scatter_list[j]);
5245 kfree(h->scatter_list);
5246 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
5247 kfree(h->blockFetchTable);
5249 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5250 h->reply_pool, h->reply_pool_dhandle);
5252 * Deliberately omit pci_disable_device(): it does something nasty to
5253 * Smart Array controllers that pci_enable_device does not undo
5255 pci_release_regions(pdev);
5256 pci_set_drvdata(pdev, NULL);
5257 cciss_destroy_hba_sysfs_entry(h);
5258 mutex_unlock(&h->busy_shutting_down);
5262 static struct pci_driver cciss_pci_driver = {
5264 .probe = cciss_init_one,
5265 .remove = __devexit_p(cciss_remove_one),
5266 .id_table = cciss_pci_device_id, /* id_table */
5267 .shutdown = cciss_shutdown,
5271 * This is it. Register the PCI driver information for the cards we control
5272 * the OS will call our registered routines when it finds one of our cards.
5274 static int __init cciss_init(void)
5279 * The hardware requires that commands are aligned on a 64-bit
5280 * boundary. Given that we use pci_alloc_consistent() to allocate an
5281 * array of them, the size must be a multiple of 8 bytes.
5283 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
5284 printk(KERN_INFO DRIVER_NAME "\n");
5286 err = bus_register(&cciss_bus_type);
5290 /* Start the scan thread */
5291 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5292 if (IS_ERR(cciss_scan_thread)) {
5293 err = PTR_ERR(cciss_scan_thread);
5294 goto err_bus_unregister;
5297 /* Register for our PCI devices */
5298 err = pci_register_driver(&cciss_pci_driver);
5300 goto err_thread_stop;
5305 kthread_stop(cciss_scan_thread);
5307 bus_unregister(&cciss_bus_type);
5312 static void __exit cciss_cleanup(void)
5316 pci_unregister_driver(&cciss_pci_driver);
5317 /* double check that all controller entrys have been removed */
5318 for (i = 0; i < MAX_CTLR; i++) {
5319 if (hba[i] != NULL) {
5320 dev_warn(&hba[i]->pdev->dev,
5321 "had to remove controller\n");
5322 cciss_remove_one(hba[i]->pdev);
5325 kthread_stop(cciss_scan_thread);
5327 remove_proc_entry("driver/cciss", NULL);
5328 bus_unregister(&cciss_bus_type);
5331 module_init(cciss_init);
5332 module_exit(cciss_cleanup);