1 /* linux/arch/arm/plat-s5p/include/plat/map-s5p.h
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
6 * S5P - Memory map definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __ASM_PLAT_MAP_S5P_H
14 #define __ASM_PLAT_MAP_S5P_H __FILE__
16 #define S5P_VA_CHIPID S3C_ADDR(0x02000000)
17 #define S5P_VA_CMU S3C_ADDR(0x02100000)
18 #define S5P_VA_PMU S3C_ADDR(0x02180000)
19 #define S5P_VA_GPIO S3C_ADDR(0x02200000)
20 #define S5P_VA_GPIO1 S5P_VA_GPIO
21 #define S5P_VA_GPIO2 S3C_ADDR(0x02240000)
22 #define S5P_VA_GPIO3 S3C_ADDR(0x02280000)
23 #define S5P_VA_GPIO4 S3C_ADDR(0x022C0000)
25 #define S5P_VA_SYSRAM S3C_ADDR(0x02400000)
26 #define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000)
27 #define S5P_VA_DMC0 S3C_ADDR(0x02440000)
28 #define S5P_VA_DMC1 S3C_ADDR(0x02480000)
29 #define S5P_VA_SROMC S3C_ADDR(0x024C0000)
31 #define S5P_VA_SYSTIMER S3C_ADDR(0x02500000)
32 #define S5P_VA_L2CC S3C_ADDR(0x02600000)
34 #define S5P_VA_COMBINER_BASE S3C_ADDR(0x02700000)
35 #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
37 #define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000)
38 #define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x))
39 #define S5P_VA_SCU S5P_VA_COREPERI(0x0)
40 #define S5P_VA_TWD S5P_VA_COREPERI(0x600)
42 #define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
43 #define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
45 #define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000)
47 #define S5P_VA_AUDSS S3C_ADDR(0x02910000)
49 #define S5P_VA_PPMU_DMC0 S3C_ADDR(0x02930000)
50 #define S5P_VA_PPMU_DMC1 S3C_ADDR(0x02932000)
51 #define S5P_VA_PPMU_CPU S3C_ADDR(0x02934000)
53 #define S5P_VA_GDL S3C_ADDR(0x02940000)
54 #define S5P_VA_GDR S3C_ADDR(0x02941000)
56 #define S5P_VA_PPMU_DDR_C S3C_ADDR(0x02936000)
57 #define S5P_VA_PPMU_DDR_R1 S3C_ADDR(0x02938000)
58 #define S5P_VA_PPMU_DDR_L S3C_ADDR(0x0293a000)
59 #define S5P_VA_PPMU_RIGHT0_BUS S3C_ADDR(0x0293c000)
61 #define S5P_VA_SS_PHY S3C_ADDR(0x02A00000)
62 #define S5P_VA_FIMCLITE0 S3C_ADDR(0x02A10000)
63 #define S5P_VA_FIMCLITE1 S3C_ADDR(0x02A20000)
64 #define S5P_VA_MIPICSI0 S3C_ADDR(0x02A30000)
65 #define S5P_VA_MIPICSI1 S3C_ADDR(0x02A40000)
66 #define S5P_VA_FIMCLITE2 S3C_ADDR(0x02A90000)
68 #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
69 #define VA_VIC0 VA_VIC(0)
70 #define VA_VIC1 VA_VIC(1)
71 #define VA_VIC2 VA_VIC(2)
72 #define VA_VIC3 VA_VIC(3)
74 #define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
75 #define S5P_VA_UART0 S5P_VA_UART(0)
76 #define S5P_VA_UART1 S5P_VA_UART(1)
77 #define S5P_VA_UART2 S5P_VA_UART(2)
78 #define S5P_VA_UART3 S5P_VA_UART(3)
80 #ifndef S3C_UART_OFFSET
81 #define S3C_UART_OFFSET (0x400)
84 #endif /* __ASM_PLAT_MAP_S5P_H */