1 /* sound/soc/s3c24xx/spdif.h
3 * ALSA SoC Audio Layer - Samsung S/PDIF Controller driver
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd
6 * http://www.samsung.com/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __SND_SOC_SAMSUNG_SPDIF_H
14 #define __SND_SOC_SAMSUNG_SPDIF_H __FILE__
17 * struct samsung_spdif_info - Samsung S/PDIF Controller information
18 * @lock: spin lock for spdif.
19 * @dev: The parent device passed to use from the probe.
20 * @regs: The pointer to the device register block.
21 * @clk_rate: Current clock rate for calcurate ratio.
22 * @use_int_clk: Check variable for internal clock using or not.
23 * @pclk: The peri-clock pointer for spdif master operation.
24 * @sclk: The source clock pointer for making sync signals.
25 * @save_clkcon: Backup clkcon reg. in suspend.
26 * @save_con: Backup con reg. in suspend.
27 * @save_cstas: Backup cstas reg. in suspend.
28 * @dma_playback: DMA information for playback channel.
30 struct samsung_spdif_info {
41 struct s3c_dma_params *dma_playback;
44 extern struct snd_soc_dai samsung_spdif_dai;
51 #define DATA_OUTBUF 0x10
56 #define CLKCTL_MASK 0x7
57 #define CLKCTL_MCLK_EXT (0x1 << 2)
58 #define CLKCTL_PWR_ON (0x1 << 0)
60 #define CON_MASK 0x3ffffff
61 #define CON_FIFO_TH_SHIFT 19
62 #define CON_FIFO_TH_MASK (0x7 << 19)
63 #define CON_USERDATA_23RDBIT (0x1 << 12)
65 #define CON_SW_RESET (0x1 << 5)
67 #define CON_MCLKDIV_MASK (0x3 << 3)
68 #define CON_MCLKDIV_256FS (0x0 << 3)
69 #define CON_MCLKDIV_384FS (0x1 << 3)
70 #define CON_MCLKDIV_512FS (0x2 << 3)
72 #define CON_PCM_MASK (0x3 << 1)
73 #define CON_PCM_16BIT (0x0 << 1)
74 #define CON_PCM_20BIT (0x1 << 1)
75 #define CON_PCM_24BIT (0x2 << 1)
77 #define CON_PCM_DATA (0x1 << 0)
79 #define CSTAS_MASK 0x3fffffff
80 #define CSTAS_SAMP_FREQ_MASK (0xF << 24)
81 #define CSTAS_SAMP_FREQ_44 (0x0 << 24)
82 #define CSTAS_SAMP_FREQ_48 (0x2 << 24)
83 #define CSTAS_SAMP_FREQ_32 (0x3 << 24)
84 #define CSTAS_SAMP_FREQ_96 (0xA << 24)
86 #define CSTAS_CATEGORY_MASK (0xFF << 8)
87 #define CSTAS_CATEGORY_CODE_CDP (0x01 << 8)
89 #define CSTAS_NO_COPYRIGHT (0x1 << 2)
91 #endif /* __SND_SOC_S5P_SPDIF_H */