upload tizen1.0 source
[kernel/linux-2.6.36.git] / sound / soc / s3c24xx / s3c-pcm.c
1 /* sound/soc/s3c24xx/s3c-pcm.c
2  *
3  * ALSA SoC Audio Layer - S3C PCM-Controller driver
4  *
5  * Copyright (c) 2009 Samsung Electronics Co. Ltd
6  * Author: Jaswinder Singh <jassi.brar@samsung.com>
7  * based upon I2S drivers by Ben Dooks.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/delay.h>
18 #include <linux/clk.h>
19 #include <linux/kernel.h>
20 #include <linux/gpio.h>
21 #include <linux/io.h>
22
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/initval.h>
27 #include <sound/soc.h>
28
29 #include <plat/audio.h>
30 #include <plat/dma.h>
31
32 #include "s3c-dma.h"
33 #include "s3c-pcm.h"
34
35 static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
36         .name           = "PCM Stereo out"
37 };
38
39 static struct s3c2410_dma_client s3c_pcm_dma_client_in = {
40         .name           = "PCM Stereo in"
41 };
42
43 static struct s3c_dma_params s3c_pcm_stereo_out[] = {
44         [0] = {
45                 .client         = &s3c_pcm_dma_client_out,
46                 .dma_size       = 4,
47         },
48         [1] = {
49                 .client         = &s3c_pcm_dma_client_out,
50                 .dma_size       = 4,
51         },
52 };
53
54 static struct s3c_dma_params s3c_pcm_stereo_in[] = {
55         [0] = {
56                 .client         = &s3c_pcm_dma_client_in,
57                 .dma_size       = 4,
58         },
59         [1] = {
60                 .client         = &s3c_pcm_dma_client_in,
61                 .dma_size       = 4,
62         },
63 };
64
65 static struct s3c_pcm_info s3c_pcm[2];
66
67 static inline struct s3c_pcm_info *to_info(struct snd_soc_dai *cpu_dai)
68 {
69         return cpu_dai->private_data;
70 }
71
72 static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on)
73 {
74         void __iomem *regs = pcm->regs;
75         u32 ctl, clkctl;
76
77         clkctl = readl(regs + S3C_PCM_CLKCTL);
78         ctl = readl(regs + S3C_PCM_CTL);
79         ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK
80                          << S3C_PCM_CTL_TXDIPSTICK_SHIFT);
81
82         if (on) {
83                 ctl |= S3C_PCM_CTL_TXDMA_EN;
84                 ctl |= S3C_PCM_CTL_TXFIFO_EN;
85                 ctl |= S3C_PCM_CTL_ENABLE;
86                 ctl |= (0x20<<S3C_PCM_CTL_TXDIPSTICK_SHIFT);
87                 clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
88         } else {
89                 ctl &= ~S3C_PCM_CTL_TXDMA_EN;
90                 ctl &= ~S3C_PCM_CTL_TXFIFO_EN;
91
92                 if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) {
93                         ctl &= ~S3C_PCM_CTL_ENABLE;
94                         if (!pcm->idleclk)
95                                 clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
96                 }
97         }
98
99         writel(clkctl, regs + S3C_PCM_CLKCTL);
100         writel(ctl, regs + S3C_PCM_CTL);
101 }
102
103 static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
104 {
105         void __iomem *regs = pcm->regs;
106         u32 ctl, clkctl;
107
108         ctl = readl(regs + S3C_PCM_CTL);
109         clkctl = readl(regs + S3C_PCM_CLKCTL);
110         ctl &= ~(S3C_PCM_CTL_RXDIPSTICK_MASK
111                          << S3C_PCM_CTL_RXDIPSTICK_SHIFT);
112
113         if (on) {
114                 ctl |= S3C_PCM_CTL_RXDMA_EN;
115                 ctl |= S3C_PCM_CTL_RXFIFO_EN;
116                 ctl |= S3C_PCM_CTL_ENABLE;
117                 ctl |= (0x20<<S3C_PCM_CTL_RXDIPSTICK_SHIFT);
118                 clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
119         } else {
120                 ctl &= ~S3C_PCM_CTL_RXDMA_EN;
121                 ctl &= ~S3C_PCM_CTL_RXFIFO_EN;
122
123                 if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) {
124                         ctl &= ~S3C_PCM_CTL_ENABLE;
125                         if (!pcm->idleclk)
126                                 clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
127                 }
128         }
129
130         writel(clkctl, regs + S3C_PCM_CLKCTL);
131         writel(ctl, regs + S3C_PCM_CTL);
132 }
133
134 static int s3c_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
135                                struct snd_soc_dai *dai)
136 {
137         struct snd_soc_pcm_runtime *rtd = substream->private_data;
138         struct s3c_pcm_info *pcm = to_info(rtd->dai->cpu_dai);
139         unsigned long flags;
140
141         dev_dbg(pcm->dev, "Entered %s\n", __func__);
142
143         switch (cmd) {
144         case SNDRV_PCM_TRIGGER_START:
145         case SNDRV_PCM_TRIGGER_RESUME:
146         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
147                 spin_lock_irqsave(&pcm->lock, flags);
148
149                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
150                         s3c_pcm_snd_rxctrl(pcm, 1);
151                 else
152                         s3c_pcm_snd_txctrl(pcm, 1);
153
154                 spin_unlock_irqrestore(&pcm->lock, flags);
155                 break;
156
157         case SNDRV_PCM_TRIGGER_STOP:
158         case SNDRV_PCM_TRIGGER_SUSPEND:
159         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
160                 spin_lock_irqsave(&pcm->lock, flags);
161
162                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
163                         s3c_pcm_snd_rxctrl(pcm, 0);
164                 else
165                         s3c_pcm_snd_txctrl(pcm, 0);
166
167                 spin_unlock_irqrestore(&pcm->lock, flags);
168                 break;
169
170         default:
171                 return -EINVAL;
172         }
173
174         return 0;
175 }
176
177 static int s3c_pcm_hw_params(struct snd_pcm_substream *substream,
178                                  struct snd_pcm_hw_params *params,
179                                  struct snd_soc_dai *socdai)
180 {
181         struct snd_soc_pcm_runtime *rtd = substream->private_data;
182         struct snd_soc_dai_link *dai = rtd->dai;
183         struct s3c_pcm_info *pcm = to_info(dai->cpu_dai);
184         struct s3c_dma_params *dma_data;
185         void __iomem *regs = pcm->regs;
186         struct clk *clk;
187         int sclk_div, sync_div;
188         unsigned long flags;
189         u32 clkctl;
190
191         dev_dbg(pcm->dev, "Entered %s\n", __func__);
192
193         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
194                 dma_data = pcm->dma_playback;
195         else
196                 dma_data = pcm->dma_capture;
197
198         snd_soc_dai_set_dma_data(dai->cpu_dai, substream, dma_data);
199
200         /* Strictly check for sample size */
201         switch (params_format(params)) {
202         case SNDRV_PCM_FORMAT_S16_LE:
203                 break;
204         default:
205                 return -EINVAL;
206         }
207
208         spin_lock_irqsave(&pcm->lock, flags);
209
210         /* Get hold of the PCMSOURCE_CLK */
211         clkctl = readl(regs + S3C_PCM_CLKCTL);
212         if (clkctl & S3C_PCM_CLKCTL_SERCLKSEL_PCLK)
213                 clk = pcm->pclk;
214         else
215                 clk = pcm->cclk;
216
217         /* Set the SCLK divider */
218         sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /
219                                         params_rate(params) / 2 - 1;
220
221 #if defined(CONFIG_ARCH_S5PV310)
222         if (clk_get_rate(clk) != (pcm->sclk_per_fs*params_rate(params)))
223                 clk_set_rate(clk, pcm->sclk_per_fs*params_rate(params));
224 #else
225         clkctl &= ~(S3C_PCM_CLKCTL_SCLKDIV_MASK
226                         << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
227         clkctl |= ((sclk_div & S3C_PCM_CLKCTL_SCLKDIV_MASK)
228                         << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
229 #endif
230
231         /* Set the SYNC divider */
232         sync_div = pcm->sclk_per_fs - 1;
233
234         clkctl &= ~(S3C_PCM_CLKCTL_SYNCDIV_MASK
235                                 << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
236         clkctl |= ((sync_div & S3C_PCM_CLKCTL_SYNCDIV_MASK)
237                                 << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
238
239         writel(clkctl, regs + S3C_PCM_CLKCTL);
240
241         spin_unlock_irqrestore(&pcm->lock, flags);
242
243         dev_dbg(pcm->dev, "PCMSOURCE_CLK-%lu SCLK=%ufs SCLK_DIV=%d SYNC_DIV=%d\n",
244                                 clk_get_rate(clk), pcm->sclk_per_fs,
245                                 sclk_div, sync_div);
246
247         return 0;
248 }
249
250 static int s3c_pcm_set_fmt(struct snd_soc_dai *cpu_dai,
251                                unsigned int fmt)
252 {
253         struct s3c_pcm_info *pcm = to_info(cpu_dai);
254         void __iomem *regs = pcm->regs;
255         unsigned long flags;
256         int ret = 0;
257         u32 ctl;
258
259         dev_dbg(pcm->dev, "Entered %s\n", __func__);
260
261         spin_lock_irqsave(&pcm->lock, flags);
262
263         ctl = readl(regs + S3C_PCM_CTL);
264
265         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
266         case SND_SOC_DAIFMT_IB_NF:
267                 /* Nothing to do, IB_NF by default */
268                 break;
269         default:
270                 dev_err(pcm->dev, "Unsupported clock inversion!\n");
271                 ret = -EINVAL;
272                 goto exit;
273         }
274
275         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
276         case SND_SOC_DAIFMT_CBS_CFS:
277                 /* Nothing to do, Master by default */
278                 break;
279         default:
280                 dev_err(pcm->dev, "Unsupported master/slave format!\n");
281                 ret = -EINVAL;
282                 goto exit;
283         }
284
285         switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
286         case SND_SOC_DAIFMT_CONT:
287                 pcm->idleclk = 1;
288                 break;
289         case SND_SOC_DAIFMT_GATED:
290                 pcm->idleclk = 0;
291                 break;
292         default:
293                 dev_err(pcm->dev, "Invalid Clock gating request!\n");
294                 ret = -EINVAL;
295                 goto exit;
296         }
297
298         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
299         case SND_SOC_DAIFMT_DSP_A:
300                 ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
301                 ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
302                 break;
303         case SND_SOC_DAIFMT_DSP_B:
304                 ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
305                 ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
306                 break;
307         default:
308                 dev_err(pcm->dev, "Unsupported data format!\n");
309                 ret = -EINVAL;
310                 goto exit;
311         }
312
313         writel(ctl, regs + S3C_PCM_CTL);
314
315 exit:
316         spin_unlock_irqrestore(&pcm->lock, flags);
317
318         return ret;
319 }
320
321 static int s3c_pcm_set_clkdiv(struct snd_soc_dai *cpu_dai,
322                                                 int div_id, int div)
323 {
324         struct s3c_pcm_info *pcm = to_info(cpu_dai);
325
326         switch (div_id) {
327         case S3C_PCM_SCLK_PER_FS:
328                 pcm->sclk_per_fs = div;
329                 break;
330
331         default:
332                 return -EINVAL;
333         }
334
335         return 0;
336 }
337
338 static int s3c_pcm_set_sysclk(struct snd_soc_dai *cpu_dai,
339                                   int clk_id, unsigned int freq, int dir)
340 {
341         struct s3c_pcm_info *pcm = to_info(cpu_dai);
342         void __iomem *regs = pcm->regs;
343         u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
344
345         switch (clk_id) {
346         case S3C_PCM_CLKSRC_PCLK:
347                 clkctl |= S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
348                 break;
349
350         case S3C_PCM_CLKSRC_MUX:
351                 clkctl &= ~S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
352
353                 if (clk_get_rate(pcm->cclk) != freq)
354                         clk_set_rate(pcm->cclk, freq);
355
356                 break;
357
358         default:
359                 return -EINVAL;
360         }
361
362         writel(clkctl, regs + S3C_PCM_CLKCTL);
363
364         return 0;
365 }
366
367 static struct snd_soc_dai_ops s3c_pcm_dai_ops = {
368         .set_sysclk     = s3c_pcm_set_sysclk,
369         .set_clkdiv     = s3c_pcm_set_clkdiv,
370         .trigger        = s3c_pcm_trigger,
371         .hw_params      = s3c_pcm_hw_params,
372         .set_fmt        = s3c_pcm_set_fmt,
373 };
374
375 #ifdef CONFIG_PM
376 static int s3c_pcm_suspend(struct snd_soc_dai *dai)
377 {
378         struct s3c_pcm_info *pcm = to_info(dai);
379
380         pcm->backup_pcmctl = readl(pcm->regs + S3C_PCM_CTL);
381         pcm->backup_pcmclkctl = readl(pcm->regs + S3C_PCM_CLKCTL);
382
383         return 0;
384 }
385 static int s3c_pcm_resume(struct snd_soc_dai *dai)
386 {
387         struct s3c_pcm_info *pcm = to_info(dai);
388
389         writel(pcm->backup_pcmctl, pcm->regs + S3C_PCM_CTL);
390         writel(pcm->backup_pcmclkctl, pcm->regs + S3C_PCM_CLKCTL);
391
392         return 0;
393 }
394 #else
395 #define s3c_pcm_suspend NULL
396 #define s3c_pcm_resume NULL
397 #endif
398
399
400 #define S3C_PCM_RATES  SNDRV_PCM_RATE_8000_96000
401
402 #define S3C_PCM_DECLARE(n)                      \
403 {                                                               \
404         .name            = "samsung-pcm",                       \
405         .id              = (n),                         \
406         .symmetric_rates = 1,                                   \
407         .ops = &s3c_pcm_dai_ops,                                \
408         .playback = {                                           \
409                 .channels_min   = 2,                            \
410                 .channels_max   = 2,                            \
411                 .rates          = S3C_PCM_RATES,                \
412                 .formats        = SNDRV_PCM_FMTBIT_S16_LE,      \
413         },                                                      \
414         .capture = {                                            \
415                 .channels_min   = 2,                            \
416                 .channels_max   = 2,                            \
417                 .rates          = S3C_PCM_RATES,                \
418                 .formats        = SNDRV_PCM_FMTBIT_S16_LE,      \
419         },                                                      \
420         .suspend = s3c_pcm_suspend,                             \
421         .resume = s3c_pcm_resume,                               \
422 }
423
424 struct snd_soc_dai s3c_pcm_dai[] = {
425         S3C_PCM_DECLARE(0),
426         S3C_PCM_DECLARE(1),
427 };
428 EXPORT_SYMBOL_GPL(s3c_pcm_dai);
429
430 static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev)
431 {
432         struct s3c_pcm_info *pcm;
433         struct snd_soc_dai *dai;
434         struct resource *mem_res, *dmatx_res, *dmarx_res;
435         struct s3c_audio_pdata *pcm_pdata;
436         int ret;
437
438         /* Check for valid device index */
439         if ((pdev->id < 0) || pdev->id >= ARRAY_SIZE(s3c_pcm)) {
440                 dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
441                 return -EINVAL;
442         }
443
444         pcm_pdata = pdev->dev.platform_data;
445
446         /* Check for availability of necessary resource */
447         dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
448         if (!dmatx_res) {
449                 dev_err(&pdev->dev, "Unable to get PCM-TX dma resource\n");
450                 return -ENXIO;
451         }
452
453         dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
454         if (!dmarx_res) {
455                 dev_err(&pdev->dev, "Unable to get PCM-RX dma resource\n");
456                 return -ENXIO;
457         }
458
459         mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
460         if (!mem_res) {
461                 dev_err(&pdev->dev, "Unable to get register resource\n");
462                 return -ENXIO;
463         }
464
465         if (pcm_pdata && pcm_pdata->cfg_gpio && pcm_pdata->cfg_gpio(pdev)) {
466                 dev_err(&pdev->dev, "Unable to configure gpio\n");
467                 return -EINVAL;
468         }
469
470         pcm = &s3c_pcm[pdev->id];
471         pcm->dev = &pdev->dev;
472
473         spin_lock_init(&pcm->lock);
474
475         dai = &s3c_pcm_dai[pdev->id];
476         dai->dev = &pdev->dev;
477
478         /* Default is 128fs */
479         pcm->sclk_per_fs = 128;
480
481 #if defined(CONFIG_ARCH_S5PV310)
482         pcm->cclk = clk_get(&pdev->dev, "sclk_pcm");
483 #else
484         pcm->cclk = clk_get(&pdev->dev, "audio-bus");
485 #endif
486         if (IS_ERR(pcm->cclk)) {
487                 dev_err(&pdev->dev, "failed to get audio-bus\n");
488                 ret = PTR_ERR(pcm->cclk);
489                 goto err1;
490         }
491         clk_enable(pcm->cclk);
492
493         /* record our pcm structure for later use in the callbacks */
494         dai->private_data = pcm;
495
496         if (!request_mem_region(mem_res->start,
497                                 resource_size(mem_res), "samsung-pcm")) {
498                 dev_err(&pdev->dev, "Unable to request register region\n");
499                 ret = -EBUSY;
500                 goto err2;
501         }
502
503         pcm->regs = ioremap(mem_res->start, 0x100);
504         if (pcm->regs == NULL) {
505                 dev_err(&pdev->dev, "cannot ioremap registers\n");
506                 ret = -ENXIO;
507                 goto err3;
508         }
509
510         pcm->pclk = clk_get(&pdev->dev, "pcm");
511         if (IS_ERR(pcm->pclk)) {
512                 dev_err(&pdev->dev, "failed to get pcm_clock\n");
513                 ret = -ENOENT;
514                 goto err4;
515         }
516         clk_enable(pcm->pclk);
517
518         ret = snd_soc_register_dai(dai);
519         if (ret != 0) {
520                 dev_err(&pdev->dev, "failed to get pcm_clock\n");
521                 goto err5;
522         }
523
524         s3c_pcm_stereo_in[pdev->id].dma_addr = mem_res->start
525                                                         + S3C_PCM_RXFIFO;
526         s3c_pcm_stereo_out[pdev->id].dma_addr = mem_res->start
527                                                         + S3C_PCM_TXFIFO;
528
529         s3c_pcm_stereo_in[pdev->id].channel = dmarx_res->start;
530         s3c_pcm_stereo_out[pdev->id].channel = dmatx_res->start;
531
532         pcm->dma_capture = &s3c_pcm_stereo_in[pdev->id];
533         pcm->dma_playback = &s3c_pcm_stereo_out[pdev->id];
534
535         return 0;
536
537 err5:
538         clk_disable(pcm->pclk);
539         clk_put(pcm->pclk);
540 err4:
541         iounmap(pcm->regs);
542 err3:
543         release_mem_region(mem_res->start, resource_size(mem_res));
544 err2:
545         clk_disable(pcm->cclk);
546         clk_put(pcm->cclk);
547 err1:
548         return ret;
549 }
550
551 static __devexit int s3c_pcm_dev_remove(struct platform_device *pdev)
552 {
553         struct s3c_pcm_info *pcm = &s3c_pcm[pdev->id];
554         struct resource *mem_res;
555
556         iounmap(pcm->regs);
557
558         mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
559         release_mem_region(mem_res->start, resource_size(mem_res));
560
561         clk_disable(pcm->cclk);
562         clk_disable(pcm->pclk);
563         clk_put(pcm->pclk);
564         clk_put(pcm->cclk);
565
566         return 0;
567 }
568
569 static struct platform_driver s3c_pcm_driver = {
570         .probe  = s3c_pcm_dev_probe,
571         .remove = s3c_pcm_dev_remove,
572         .driver = {
573                 .name = "samsung-pcm",
574                 .owner = THIS_MODULE,
575         },
576 };
577
578 static int __init s3c_pcm_init(void)
579 {
580         return platform_driver_register(&s3c_pcm_driver);
581 }
582 module_init(s3c_pcm_init);
583
584 static void __exit s3c_pcm_exit(void)
585 {
586         platform_driver_unregister(&s3c_pcm_driver);
587 }
588 module_exit(s3c_pcm_exit);
589
590 /* Module information */
591 MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
592 MODULE_DESCRIPTION("S3C PCM Controller Driver");
593 MODULE_LICENSE("GPL");