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[kernel/linux-2.6.36.git] / drivers / usb / host / s3c-otg / s3c-otg-hcdi-kal.h
1 /****************************************************************************
2  *  (C) Copyright 2008 Samsung Electronics Co., Ltd., All rights reserved
3  *
4  * @file   s3c-otg-hcdi-kal.h
5  * @brief  header of s3c-otg-hcdi-kal \n
6  * @version
7  *  -# Jun 9,2008 v1.0 by SeungSoo Yang (ss1.yang@samsung.com) \n
8  *        : Creating the initial version of this code \n
9  *  -# Jul 15,2008 v1.2 by SeungSoo Yang (ss1.yang@samsung.com) \n
10  *        : Optimizing for performance \n
11  *  -# Aug 18,2008 v1.3 by SeungSoo Yang (ss1.yang@samsung.com) \n
12  *        : Modifying for successful rmmod & disconnecting \n
13  * @see None
14  ****************************************************************************/
15 /****************************************************************************
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License as published by
18  * the Free Software Foundation; either version 2 of the License, or
19  * (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
29  ****************************************************************************/
30
31 #ifndef _S3C_OTG_HCDI_KAL_H_
32 #define _S3C_OTG_HCDI_KAL_H_
33
34 #ifdef __cplusplus
35 extern "C"
36 {
37 #endif
38
39 #include "s3c-otg-hcdi-debug.h"
40 #include "s3c-otg-common-common.h"
41 #include "s3c-otg-common-datastruct.h"
42 #include "s3c-otg-common-const.h"
43
44 #include <asm/io.h>                     //for readl, writel
45 #include <linux/usb/ch9.h>              //for usb_device_driver, enum usb_device_speed
46 #include <linux/usb.h>
47 #include <linux/usb/hcd.h>
48 #include <mach/map.h>
49 #include <plat/regs-otg.h>
50
51 extern volatile         u8 *            g_pUDCBase;
52 extern struct           usb_hcd*        g_pUsbHcd;
53
54 #include <linux/spinlock.h>
55 #define         SPINLOCK_t              spinlock_t
56 #define         SPIN_LOCK_INIT          SPIN_LOCK_UNLOCKED
57
58 #define         spin_lock_otg(lock)                     spin_lock(lock)
59 #define         spin_lock_irg_otg(lock)                 spin_lock_irq(lock)
60 #define         spin_lock_irq_save_otg(lock, flags)     spin_lock_irqsave(lock, flags)
61
62 #define         spin_unlock_otg(lock)                           spin_unlock(lock)
63 #define         spin_unlock_irq_otg(lock)                       spin_unlock_irq(lock)
64 #define         spin_unlock_irq_save_otg(lock, flags)           spin_unlock_irqrestore(lock, flags)
65
66 #define         ctrlr_base_reg_addr(offset) \
67                         ((volatile unsigned int *)((g_pUDCBase) + (offset)))
68 /**
69  * otg_kal_make_ep_null
70  *
71  * @brief make ep->hcpriv NULL
72  *
73  * @param [in] pdelete_ed : pointer of ed
74  *
75  * @return void \n
76  */
77 static  inline  void
78 otg_kal_make_ep_null
79 (
80         ed_t            *pdelete_ed
81 )
82 {
83         ((struct usb_host_endpoint *)(pdelete_ed->ed_private))->hcpriv = NULL;
84 }
85 //---------------------------------------------------------------------------------------
86
87 /**
88  * otg_kal_is_ep_null
89  *
90  * @brief check ep->hcpriv is NULL or not
91  *
92  * @param [in] pdelete_ed : pointer of ed
93  *
94  * @return bool \n
95  */
96 static  inline  bool
97 otg_kal_is_ep_null
98 (
99         ed_t            *pdelete_ed
100 )
101 {
102         if (((struct usb_host_endpoint *)(pdelete_ed->ed_private))->hcpriv == NULL)
103                 return true;
104         else
105                 return false;
106 }
107 //---------------------------------------------------------------------------------------
108
109
110 /**
111  * int  otg_usbcore_get_calc_bustime()
112  *
113  * @brief get bus time of usbcore
114  *
115  * @param [in] speed : usb speed
116  *                [in] is_input : input or not
117  *                [in] is_isoch : isochronous or not
118  *                [in] byte_count : bytes
119  *
120  * @return bus time of usbcore \n
121  */
122 static  inline  int
123 otg_usbcore_get_calc_bustime
124 (
125         u8              speed,
126         bool            is_input,
127         bool            is_isoch,
128         unsigned int    byte_count
129 )
130 {
131         unsigned int convert_speed = 0;
132
133         otg_dbg(OTG_DBG_OTGHCDI_KAL, "otg_usbcore_get_calc_bustime \n");
134 /*      enum usb_device_speed {
135                 USB_SPEED_UNKNOWN = 0,
136                 USB_SPEED_LOW, USB_SPEED_FULL,
137                 USB_SPEED_HIGH,
138                 USB_SPEED_VARIABLE,     };*/
139         switch(speed) {
140         case HIGH_SPEED_OTG :
141                 convert_speed = USB_SPEED_HIGH;
142                 break;
143
144         case FULL_SPEED_OTG :
145                 convert_speed = USB_SPEED_FULL;
146                 break;
147
148         case LOW_SPEED_OTG :
149                 convert_speed = USB_SPEED_LOW;
150                 break;
151
152         default:
153                 convert_speed = USB_SPEED_UNKNOWN;
154                 break;
155         }
156         return usb_calc_bus_time(convert_speed, is_input, (unsigned int)is_isoch, byte_count);
157 }
158
159 //-------------------------------------------------------------------------------
160
161 /**
162  * void otg_usbcore_giveback(td_t td_p)
163  *
164  * @brief give-back a td as urb
165  *
166  * @param [in] td_p : pointer of td_t to give back
167  *
168  * @return void \n
169  */
170 static  inline  void
171 otg_usbcore_giveback(td_t * td_p)
172 {
173         struct urb *urb_p = NULL;
174
175         otg_dbg(OTG_DBG_OTGHCDI_KAL, "otg_usbcore_giveback \n");
176
177         if (td_p->td_private == NULL)
178         {
179                 otg_err(OTG_DBG_OTGHCDI_KAL,
180                         "td_p->td_private == NULL \n");
181                 return;
182         }
183
184         urb_p = (struct urb *)td_p->td_private;
185
186         urb_p->actual_length    = (int)(td_p->transferred_szie);
187         urb_p->status           = (int)(td_p->error_code);
188         urb_p->error_count      = (int)(td_p->err_cnt);
189         urb_p->hcpriv           = NULL;
190
191         usb_hcd_giveback_urb(g_pUsbHcd, urb_p, urb_p->status);
192 }
193 //-------------------------------------------------------------------------------
194
195 /**
196  * void         otg_usbcore_hc_died(void)
197  *
198  * @brief inform usbcore of hc die
199  *
200  * @return void \n
201  */
202 static  inline  void
203 otg_usbcore_hc_died(void)
204 {
205         otg_dbg(OTG_DBG_OTGHCDI_KAL, "otg_usbcore_hc_died \n");
206         usb_hc_died(g_pUsbHcd);
207 }
208 //-------------------------------------------------------------------------------
209
210 /**
211  * void otg_usbcore_poll_rh_status(void)
212  *
213  * @brief invoke usbcore's usb_hcd_poll_rh_status
214  *
215  * @param void
216  *
217  * @return void \n
218  */
219 static  inline  void
220 otg_usbcore_poll_rh_status(void)
221 {
222         usb_hcd_poll_rh_status(g_pUsbHcd);
223 }
224 //-------------------------------------------------------------------------------
225
226 /**
227  * void otg_usbcore_resume_roothub(void)
228  *
229  * @brief invoke usbcore's usb_hcd_resume_root_hub
230  *
231  * @param void
232  *
233  * @return void \n
234  */
235 static inline   void
236 otg_usbcore_resume_roothub(void)
237 {
238         otg_dbg(OTG_DBG_OTGHCDI_KAL,
239                  "otg_usbcore_resume_roothub \n");
240         usb_hcd_resume_root_hub(g_pUsbHcd);
241 };
242 //-------------------------------------------------------------------------------
243
244 /**
245  * int  otg_usbcore_inc_usb_bandwidth(u32 band_width)
246  *
247  * @brief       increase bandwidth of usb bus
248  *
249  * @param  [in] band_width : bandwidth to be increased
250  *
251  * @return USB_ERR_SUCCESS \n
252  */
253 static  inline  int
254 otg_usbcore_inc_usb_bandwidth(u32 band_width)
255 {
256         otg_dbg(OTG_DBG_OTGHCDI_KAL,
257                 "otg_usbcore_inc_usb_bandwidth \n");
258         hcd_to_bus(g_pUsbHcd)->bandwidth_allocated += band_width;
259         return USB_ERR_SUCCESS;
260 }
261 //-------------------------------------------------------------------------------
262
263 /**
264  * int  otg_usbcore_des_usb_bandwidth(u32 uiBandwidth)
265  *
266  * @brief       decrease bandwidth of usb bus
267  *
268  * @param  [in] band_width : bandwidth to be decreased
269  *
270  * @return USB_ERR_SUCCESS \n
271  */
272 static  inline  int
273 otg_usbcore_des_usb_bandwidth(u32 band_width)
274 {
275         otg_dbg(OTG_DBG_OTGHCDI_KAL,
276                 "otg_usbcore_des_usb_bandwidth \n");
277         hcd_to_bus(g_pUsbHcd)->bandwidth_allocated -= band_width;
278         return USB_ERR_SUCCESS;
279 }
280 //-------------------------------------------------------------------------------
281
282 /**
283  * int          otg_usbcore_inc_periodic_transfer_cnt(u8 transfer_type)
284  *
285  * @brief       increase count of periodic transfer
286  *
287  * @param  [in] transfer_type : type of transfer
288  *
289  * @return USB_ERR_SUCCESS : If success \n
290  *         USB_ERR_FAIL : If call fail \n
291  */
292 static  inline  int
293 otg_usbcore_inc_periodic_transfer_cnt(u8 transfer_type)
294 {
295         otg_dbg(OTG_DBG_OTGHCDI_KAL,
296                 "otg_usbcore_inc_periodic_transfer_cnt \n");
297
298         switch(transfer_type) {
299         case INT_TRANSFER :
300                 hcd_to_bus(g_pUsbHcd)->bandwidth_int_reqs++;
301                 break;
302         case ISOCH_TRANSFER :
303                 hcd_to_bus(g_pUsbHcd)->bandwidth_isoc_reqs++;
304                 break;
305         default:
306                 otg_err(OTG_DBG_OTGHCDI_KAL,
307                         "not proper TransferType for otg_usbcore_inc_periodic_transfer_cnt()\n");
308                 return USB_ERR_FAIL;
309         }
310         return USB_ERR_SUCCESS;
311 }
312 //-------------------------------------------------------------------------------
313
314 /**
315  * int          otg_usbcore_des_periodic_transfer_cnt(u8 transfer_type)
316  *
317  * @brief       decrease count of periodic transfer
318  *
319  * @param  [in] transfer_type : type of transfer
320  *
321  * @return USB_ERR_SUCCESS : If success \n
322  *         USB_ERR_FAIL : If call fail \n
323  */
324 static  inline  int
325 otg_usbcore_des_periodic_transfer_cnt(u8 transfer_type)
326 {
327         otg_dbg(OTG_DBG_OTGHCDI_KAL,
328                 "otg_usbcore_des_periodic_transfer_cnt \n");
329
330         switch(transfer_type) {
331         case INT_TRANSFER :
332                 hcd_to_bus(g_pUsbHcd)->bandwidth_int_reqs--;
333                 break;
334         case ISOCH_TRANSFER :
335                 hcd_to_bus(g_pUsbHcd)->bandwidth_isoc_reqs--;
336                 break;
337         default:
338                 otg_err(OTG_DBG_OTGHCDI_KAL,
339                         "not proper TransferType for otg_usbcore_des_periodic_transfer_cnt()\n");
340                 return USB_ERR_FAIL;
341         }
342         return USB_ERR_SUCCESS;
343 }
344 //-------------------------------------------------------------------------------
345
346 /**
347  * u32 read_reg_32(u32 offset)
348  *
349  * @brief Reads the content of a register.
350  *
351  * @param [in] offset : offset of address of register to read.
352  *
353  * @return contents of the register. \n
354  * @remark call readl()
355  */
356 static  inline  u32 read_reg_32(u32 offset)
357 {
358         volatile unsigned int * reg_addr_p = ctrlr_base_reg_addr(offset);
359
360         return *reg_addr_p;
361         //return readl(reg_addr_p);
362 };
363 //-------------------------------------------------------------------------------
364
365 /**
366  * void write_reg_32( u32 offset, const u32 value)
367  *
368  * @brief Writes a register with a 32 bit value.
369  *
370  * @param [in] offset : offset of address of register to write.
371  * @param [in] value : value to write
372  *
373  * @remark call writel()
374  */
375 static  inline  void write_reg_32( u32 offset, const u32 value)
376 {
377         volatile unsigned int * reg_addr_p = ctrlr_base_reg_addr(offset);
378
379         *reg_addr_p = value;
380         //writel( value, reg_addr_p );
381 };
382 //-------------------------------------------------------------------------------
383
384 /**
385  * void update_reg_32(u32 offset, u32 value)
386  *
387  * @brief logic or operation
388  *
389  * @param [in] offset : offset of address of register to write.
390  * @param [in] value : value to or
391  *
392  */
393 static  inline  void update_reg_32(u32 offset, u32 value)
394 {
395         write_reg_32(offset, (read_reg_32(offset) | value));
396 }
397 //---------------------------------------------------------------------------------------
398
399 /**
400  * void clear_reg_32(u32         offset, u32 value)
401  *
402  * @brief logic not operation
403  *
404  * @param [in] offset : offset of address of register to write.
405  * @param [in] value : value to not
406  *
407  */
408 static  inline  void clear_reg_32(u32    offset, u32 value)
409 {
410         write_reg_32(offset, (read_reg_32(offset) & ~value));
411 }
412 //---------------------------------------------------------------------------------------
413
414
415 #ifdef __cplusplus
416 }
417 #endif
418
419 #endif /* _S3C_OTG_HCDI_KAL_H_ */
420