drivers/usb/gadget/s3c_udc_otg_xfer_dma.c

   1 /* drivers/usb/gadget/s3c_udc_otg_xfer_dma.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * Samsung S3C on-chip full/high speed USB OTG 2.0 device controllers
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #define GINTMSK_INIT    (INT_OUT_EP | INT_IN_EP | INT_RESUME |\
  14                                 INT_ENUMDONE|INT_RESET|INT_SUSPEND)
  15 #define DOEPMSK_INIT    (CTRL_OUT_EP_SETUP_PHASE_DONE | AHB_ERROR | BACK2BACK_SETUP_RECEIVED |\
  16                                 TRANSFER_DONE)
  17 #define DIEPMSK_INIT    (NON_ISO_IN_EP_TIMEOUT|AHB_ERROR|TRANSFER_DONE)
  18 #define GAHBCFG_INIT    (PTXFE_HALF | NPTXFE_HALF | MODE_DMA | BURST_INCR4 |\
  19                                 GBL_INT_UNMASK)
  20
  21 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  22
  23 static u8 clear_feature_num;
  24 static int clear_feature_flag;
  25 static int set_conf_done;
  26
  27 /* Bulk-Only Mass Storage Reset (class-specific request) */
  28 #define GET_MAX_LUN_REQUEST     0xFE
  29 #define BOT_RESET_REQUEST       0xFF
  30
  31 /* TEST MODE in set_feature request */
  32 #define TEST_SELECTOR_MASK      0xFF
  33 #define TEST_PKT_SIZE           53
  34
  35 static u8 test_pkt[TEST_PKT_SIZE] __attribute__((aligned(8))) = {
  36         /* JKJKJKJK x 9 */
  37         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  38         /* JJKKJJKK x 8 */
  39         0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
  40         /* JJJJKKKK x 8 */
  41         0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
  42         /* JJJJJJJKKKKKKK x8 - '1' */
  43         0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
  44         /* '1' + JJJJJJJK x 8 */
  45         0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
  46         /* {JKKKKKKK x 10},JK */
  47         0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
  48 };
  49
  50 void s3c_udc_ep_set_stall(struct s3c_ep *ep);
  51 #if defined (CONFIG_BATTERY_S3C)
  52 extern void s3c_cable_check_status(int flag);
  53
  54 void s3c_udc_cable_connect(struct s3c_udc *dev)
  55 {
  56             s3c_cable_check_status(1);
  57 }
  58
  59 void s3c_udc_cable_disconnect(struct s3c_udc *dev)
  60 {
  61             s3c_cable_check_status(0);
  62 }
  63 #endif
  64 static inline void s3c_udc_ep0_zlp(void)
  65 {
  66         u32 ep_ctrl;
  67
  68         __raw_writel(virt_to_phys(usb_ctrl), S3C_UDC_OTG_DIEPDMA(EP0_CON));
  69         __raw_writel((1<<19 | 0<<0), S3C_UDC_OTG_DIEPTSIZ(EP0_CON));
  70
  71         ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
  72         __raw_writel(ep_ctrl | DEPCTL_EPENA | DEPCTL_CNAK,
  73                 S3C_UDC_OTG_DIEPCTL(EP0_CON));
  74
  75         DEBUG_EP0("%s:EP0 ZLP DIEPCTL0 = 0x%x\n",
  76                 __func__, __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON)));
  77 }
  78
  79 static inline void s3c_udc_pre_setup(void)
  80 {
  81         u32 ep_ctrl;
  82
  83         DEBUG_IN_EP("%s : Prepare Setup packets.\n", __func__);
  84
  85         __raw_writel((3<<29)| (1<<19) | sizeof(struct usb_ctrlrequest),
  86                 S3C_UDC_OTG_DOEPTSIZ(EP0_CON));
  87         __raw_writel(virt_to_phys(usb_ctrl), S3C_UDC_OTG_DOEPDMA(EP0_CON));
  88
  89         ep_ctrl = __raw_readl(S3C_UDC_OTG_DOEPCTL(EP0_CON));
  90         __raw_writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, S3C_UDC_OTG_DOEPCTL(EP0_CON));
  91 }
  92
  93 static int setdma_rx(struct s3c_ep *ep, struct s3c_request *req)
  94 {
  95         u32 *buf, ctrl;
  96         u32 length, pktcnt;
  97         u32 ep_num = ep_index(ep);
  98         struct device *dev = &the_controller->dev->dev;
  99
 100         buf = req->req.buf + req->req.actual;
 101         prefetchw(buf);
 102
 103         length = req->req.length - req->req.actual;
 104
 105         req->req.dma = dma_map_single(dev, buf,
 106                                 length, DMA_FROM_DEVICE);
 107         req->mapped = 1;
 108
 109         if (length == 0)
 110                 pktcnt = 1;
 111         else
 112                 pktcnt = (length - 1)/(ep->ep.maxpacket) + 1;
 113
 114         ctrl =  __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num));
 115
 116         __raw_writel(virt_to_phys(buf), S3C_UDC_OTG_DOEPDMA(ep_num));
 117         __raw_writel((pktcnt<<19) | (length<<0), S3C_UDC_OTG_DOEPTSIZ(ep_num));
 118         __raw_writel(DEPCTL_EPENA | DEPCTL_CNAK | ctrl, S3C_UDC_OTG_DOEPCTL(ep_num));
 119
 120         DEBUG_OUT_EP("%s: EP%d RX DMA start : DOEPDMA = 0x%x,"
 121                         "DOEPTSIZ = 0x%x, DOEPCTL = 0x%x\n"
 122                         "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n",
 123                         __func__, ep_num,
 124                         __raw_readl(S3C_UDC_OTG_DOEPDMA(ep_num)),
 125                         __raw_readl(S3C_UDC_OTG_DOEPTSIZ(ep_num)),
 126                         __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num)),
 127                         buf, pktcnt, length);
 128         return 0;
 129
 130 }
 131
 132 static int setdma_tx(struct s3c_ep *ep, struct s3c_request *req)
 133 {
 134         u32 *buf, ctrl = 0;
 135         u32 length, pktcnt;
 136         u32 ep_num = ep_index(ep);
 137         struct device *dev = &the_controller->dev->dev;
 138
 139         buf = req->req.buf + req->req.actual;
 140         prefetch(buf);
 141         length = req->req.length - req->req.actual;
 142
 143         if (ep_num == EP0_CON)
 144                 length = min(length, (u32)ep_maxpacket(ep));
 145
 146         req->req.actual += length;
 147
 148         req->req.dma = dma_map_single(dev, buf,
 149                         length, DMA_TO_DEVICE);
 150         req->mapped = 1;
 151
 152         if (length == 0)
 153                 pktcnt = 1;
 154         else
 155                 pktcnt = (length - 1)/(ep->ep.maxpacket) + 1;
 156
 157 #ifdef DED_TX_FIFO
 158         /* Write the FIFO number to be used for this endpoint */
 159         ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num));
 160         ctrl &= ~DEPCTL_TXFNUM_MASK;;
 161         ctrl |= (ep_num << DEPCTL_TXFNUM_BIT);
 162         __raw_writel(ctrl , S3C_UDC_OTG_DIEPCTL(ep_num));
 163 #endif
 164
 165         __raw_writel(virt_to_phys(buf), S3C_UDC_OTG_DIEPDMA(ep_num));
 166         __raw_writel((pktcnt<<19)|(length<<0), S3C_UDC_OTG_DIEPTSIZ(ep_num));
 167         ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num));
 168         __raw_writel(DEPCTL_EPENA|DEPCTL_CNAK|ctrl, S3C_UDC_OTG_DIEPCTL(ep_num));
 169
 170 #ifndef DED_TX_FIFO
 171         ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
 172         ctrl = (ctrl & ~(EP_MASK<<DEPCTL_NEXT_EP_BIT)) |
 173                 (ep_num<<DEPCTL_NEXT_EP_BIT);
 174         __raw_writel(ctrl, S3C_UDC_OTG_DIEPCTL(EP0_CON));
 175 #endif
 176
 177         DEBUG_IN_EP("%s:EP%d TX DMA start : DIEPDMA0 = 0x%x,"
 178                         "DIEPTSIZ0 = 0x%x, DIEPCTL0 = 0x%x\n"
 179                         "\tbuf = 0x%p, pktcnt = %d, xfersize = %d\n",
 180                         __func__, ep_num,
 181                         __raw_readl(S3C_UDC_OTG_DIEPDMA(ep_num)),
 182                         __raw_readl(S3C_UDC_OTG_DIEPTSIZ(ep_num)),
 183                         __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num)),
 184                         buf, pktcnt, length);
 185
 186         return length;
 187 }
 188
 189 static void complete_rx(struct s3c_udc *dev, u8 ep_num)
 190 {
 191         struct s3c_ep *ep = &dev->ep[ep_num];
 192         struct s3c_request *req = NULL;
 193         u32 ep_tsr = 0, xfer_size = 0, xfer_length, is_short = 0;
 194
 195         if (list_empty(&ep->queue)) {
 196                 DEBUG_OUT_EP("%s: RX DMA done : NULL REQ on OUT EP-%d\n",
 197                                         __func__, ep_num);
 198                 return;
 199
 200         }
 201
 202         req = list_entry(ep->queue.next, struct s3c_request, queue);
 203
 204         ep_tsr = __raw_readl(S3C_UDC_OTG_DOEPTSIZ(ep_num));
 205
 206         if (ep_num == EP0_CON)
 207                 xfer_size = (ep_tsr & 0x7f);
 208
 209         else
 210                 xfer_size = (ep_tsr & 0x7fff);
 211
 212         __dma_single_cpu_to_dev(req->req.buf, req->req.length, DMA_FROM_DEVICE);
 213         xfer_length = req->req.length - xfer_size;
 214         req->req.actual += min(xfer_length, req->req.length - req->req.actual);
 215         is_short = (xfer_length < ep->ep.maxpacket);
 216
 217         DEBUG_OUT_EP("%s: RX DMA done : ep = %d, rx bytes = %d/%d, "
 218                      "is_short = %d, DOEPTSIZ = 0x%x, remained bytes = %d\n",
 219                         __func__, ep_num, req->req.actual, req->req.length,
 220                         is_short, ep_tsr, xfer_size);
 221
 222         if (is_short || req->req.actual == xfer_length) {
 223                 if (ep_num == EP0_CON && dev->ep0state == DATA_STATE_RECV) {
 224                         DEBUG_OUT_EP("  => Send ZLP\n");
 225                         dev->ep0state = WAIT_FOR_SETUP;
 226                         s3c_udc_ep0_zlp();
 227
 228                 } else {
 229                         done(ep, req, 0);
 230
 231                         if (!list_empty(&ep->queue)) {
 232                                 req = list_entry(ep->queue.next,
 233                                         struct s3c_request, queue);
 234                                 DEBUG_OUT_EP("%s: Next Rx request start...\n",
 235                                          __func__);
 236                                 setdma_rx(ep, req);
 237                         }
 238                 }
 239         }
 240 }
 241
 242 static void complete_tx(struct s3c_udc *dev, u8 ep_num)
 243 {
 244         struct s3c_ep *ep = &dev->ep[ep_num];
 245         struct s3c_request *req;
 246         u32 ep_tsr = 0, xfer_size = 0, xfer_length, is_short = 0;
 247         u32 last;
 248
 249         if (list_empty(&ep->queue)) {
 250                 DEBUG_IN_EP("%s: TX DMA done : NULL REQ on IN EP-%d\n",
 251                                         __func__, ep_num);
 252                 return;
 253
 254         }
 255
 256         req = list_entry(ep->queue.next, struct s3c_request, queue);
 257
 258         if (dev->ep0state == DATA_STATE_XMIT) {
 259                 DEBUG_IN_EP("%s: ep_num = %d, ep0stat == DATA_STATE_XMIT\n",
 260                                         __func__, ep_num);
 261
 262                 last = write_fifo_ep0(ep, req);
 263
 264                 if (last)
 265                         dev->ep0state = WAIT_FOR_SETUP;
 266
 267                 return;
 268         }
 269
 270         ep_tsr = __raw_readl(S3C_UDC_OTG_DIEPTSIZ(ep_num));
 271
 272         if (ep_num == EP0_CON)
 273                 xfer_size = (ep_tsr & 0x7f);
 274         else
 275                 xfer_size = (ep_tsr & 0x7fff);
 276
 277         req->req.actual = req->req.length - xfer_size;
 278         xfer_length = req->req.length - xfer_size;
 279         req->req.actual += min(xfer_length, req->req.length - req->req.actual);
 280         is_short = (xfer_length < ep->ep.maxpacket);
 281
 282         DEBUG_IN_EP("%s: TX DMA done : ep = %d, tx bytes = %d/%d, "
 283                      "is_short = %d, DIEPTSIZ = 0x%x, remained bytes = %d\n",
 284                         __func__, ep_num, req->req.actual, req->req.length,
 285                         is_short, ep_tsr, xfer_size);
 286
 287         if (req->req.actual == req->req.length) {
 288                 /* send ZLP when req.zero is set for Non-ep0 */
 289                 if (ep_num > 0 && req->req.zero) {
 290                         req->req.zero = 0;
 291                         write_fifo_ep0(ep, req);
 292                         return;
 293                 }
 294                 done(ep, req, 0);
 295
 296                 if (!list_empty(&ep->queue)) {
 297                         req = list_entry(ep->queue.next, struct s3c_request,
 298                                 queue);
 299                         DEBUG_IN_EP("%s: Next Tx request start...\n", __func__);
 300                         setdma_tx(ep, req);
 301                 }
 302         }
 303 }
 304 static inline void s3c_udc_check_tx_queue(struct s3c_udc *dev, u8 ep_num)
 305 {
 306         struct s3c_ep *ep = &dev->ep[ep_num];
 307         struct s3c_request *req;
 308
 309         DEBUG_IN_EP("%s: Check queue, ep_num = %d\n", __func__, ep_num);
 310
 311         if (!list_empty(&ep->queue)) {
 312                 req = list_entry(ep->queue.next, struct s3c_request, queue);
 313                 DEBUG_IN_EP("%s: Next Tx request(0x%p) start...\n",
 314                         __func__, req);
 315
 316                 if (ep_is_in(ep))
 317                         setdma_tx(ep, req);
 318                 else
 319                         setdma_rx(ep, req);
 320         } else {
 321                 DEBUG_IN_EP("%s: NULL REQ on IN EP-%d\n", __func__, ep_num);
 322
 323                 return;
 324         }
 325
 326 }
 327
 328 static void process_ep_in_intr(struct s3c_udc *dev)
 329 {
 330         u32 ep_intr, ep_intr_status;
 331         u8 ep_num = 0;
 332
 333         ep_intr = __raw_readl(S3C_UDC_OTG_DAINT);
 334         DEBUG_IN_EP("*** %s: EP In interrupt : DAINT = 0x%x\n",
 335                                 __func__, ep_intr);
 336
 337         ep_intr &= DAINT_MASK;
 338
 339         while (ep_intr) {
 340                 if (ep_intr & 0x1) {
 341                         ep_intr_status = __raw_readl(S3C_UDC_OTG_DIEPINT(ep_num));
 342                         DEBUG_IN_EP("\tEP%d-IN : DIEPINT = 0x%x\n",
 343                                                 ep_num, ep_intr_status);
 344
 345                         /* Interrupt Clear */
 346                         __raw_writel(ep_intr_status, S3C_UDC_OTG_DIEPINT(ep_num));
 347
 348                         if (ep_intr_status & TRANSFER_DONE) {
 349                                 complete_tx(dev, ep_num);
 350
 351                                 if (ep_num == 0) {
 352                                         if (dev->ep0state == WAIT_FOR_SETUP)
 353                                                 s3c_udc_pre_setup();
 354
 355                                         /* continue transfer after
 356                                                 set_clear_halt for DMA mode */
 357                                         if (clear_feature_flag == 1) {
 358                                                 s3c_udc_check_tx_queue(dev,
 359                                                         clear_feature_num);
 360                                                 clear_feature_flag = 0;
 361                                         }
 362                                 }
 363                         }
 364                 }
 365                 ep_num++;
 366                 ep_intr >>= 1;
 367         }
 368
 369 }
 370
 371 static void process_ep_out_intr(struct s3c_udc *dev)
 372 {
 373         u32 ep_intr, ep_intr_status;
 374         u8 ep_num = 0;
 375         u32 ep_ctrl=0;
 376
 377         ep_intr = __raw_readl(S3C_UDC_OTG_DAINT);
 378         DEBUG_OUT_EP("*** %s: EP OUT interrupt : DAINT = 0x%x\n",
 379                                 __func__, ep_intr);
 380
 381         ep_intr = (ep_intr >> DAINT_OUT_BIT) & DAINT_MASK;
 382
 383         while (ep_intr) {
 384                 if (ep_intr & 0x1) {
 385                         ep_intr_status = __raw_readl(S3C_UDC_OTG_DOEPINT(ep_num));
 386                         DEBUG_OUT_EP("\tEP%d-OUT : DOEPINT = 0x%x\n",
 387                                                 ep_num, ep_intr_status);
 388
 389                         /* Interrupt Clear */
 390                         __raw_writel(ep_intr_status, S3C_UDC_OTG_DOEPINT(ep_num));
 391
 392                         if (ep_num == 0) {
 393                                 if (ep_intr_status &
 394                                         CTRL_OUT_EP_SETUP_PHASE_DONE) {
 395                                         DEBUG_OUT_EP("\tSETUP"
 396                                                 "packet(transaction)"
 397                                                 "arrived\n");
 398                                         if (likely((ep_intr_status & BACK2BACK_SETUP_RECEIVED)==0)) {
 399                                                 if(((__raw_readl(S3C_UDC_OTG_DOEPTSIZ(0))>>29)&0x3) < 2) {
 400                                                         /* Got more than 1 setup packets */
 401                                                         /* Get the last valid setup packet (next setup pkt)*/
 402                                                         s3c_udc_pre_setup();
 403                                                         printk(KERN_DEBUG "b2bs\n");
 404                                                         continue;
 405                                                 }
 406                                         }
 407                                         s3c_handle_ep0(dev);
 408                                 }
 409
 410                                 if (ep_intr_status & TRANSFER_DONE) {
 411                                         complete_rx(dev, ep_num);
 412                                         writel((3<<29)|(1 << 19)|sizeof(struct usb_ctrlrequest), S3C_UDC_OTG_DOEPTSIZ(EP0_CON));
 413                                         writel(virt_to_phys(usb_ctrl), S3C_UDC_OTG_DOEPDMA(EP0_CON));
 414
 415                                         ep_ctrl = readl(S3C_UDC_OTG_DOEPCTL(EP0_CON));
 416                                         writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_SNAK, S3C_UDC_OTG_DOEPCTL(EP0_CON));
 417
 418                                 }
 419
 420                         } else {
 421                                 if (ep_intr_status & TRANSFER_DONE)
 422                                         complete_rx(dev, ep_num);
 423
 424                         }
 425                 }
 426                 ep_num++;
 427                 ep_intr >>= 1;
 428         }
 429 }
 430
 431 /*
 432  *      usb client interrupt handler.
 433  */
 434 static irqreturn_t s3c_udc_irq(int irq, void *_dev)
 435 {
 436         struct s3c_udc *dev = _dev;
 437         u32 intr_status;
 438         u32 usb_status, gintmsk;
 439         unsigned long flags;
 440
 441         spin_lock_irqsave(&dev->lock, flags);
 442
 443         intr_status = __raw_readl(S3C_UDC_OTG_GINTSTS);
 444         gintmsk = __raw_readl(S3C_UDC_OTG_GINTMSK);
 445
 446         DEBUG_ISR("\n*** %s : GINTSTS=0x%x(on state %s), GINTMSK :"
 447                         "0x%x, DAINT : 0x%x, DAINTMSK : 0x%x\n",
 448                         __func__, intr_status,
 449                         state_names[dev->ep0state], gintmsk,
 450                         __raw_readl(S3C_UDC_OTG_DAINT), __raw_readl(S3C_UDC_OTG_DAINTMSK));
 451
 452         if (!intr_status) {
 453                 spin_unlock_irqrestore(&dev->lock, flags);
 454                 return IRQ_HANDLED;
 455         }
 456
 457         if (intr_status & INT_ENUMDONE) {
 458                 DEBUG_ISR("\tSpeed Detection interrupt\n");
 459
 460                 __raw_writel(INT_ENUMDONE, S3C_UDC_OTG_GINTSTS);
 461                 usb_status = (__raw_readl(S3C_UDC_OTG_DSTS) & 0x6);
 462
 463                 if (usb_status & (USB_FULL_30_60MHZ | USB_FULL_48MHZ)) {
 464                         DEBUG_ISR("\t\tFull Speed Detection\n");
 465                         set_max_pktsize(dev, USB_SPEED_FULL);
 466
 467                 } else {
 468                         DEBUG_ISR("\t\tHigh Speed Detection : 0x%x\n",
 469                                 usb_status);
 470                         set_max_pktsize(dev, USB_SPEED_HIGH);
 471                 }
 472         }
 473
 474         if (intr_status & INT_EARLY_SUSPEND) {
 475                 DEBUG_ISR("\tEarly suspend interrupt\n");
 476                 __raw_writel(INT_EARLY_SUSPEND, S3C_UDC_OTG_GINTSTS);
 477         }
 478
 479         if (intr_status & INT_SUSPEND) {
 480                 usb_status = __raw_readl(S3C_UDC_OTG_DSTS);
 481                 DEBUG_ISR("\tSuspend interrupt :(DSTS):0x%x\n", usb_status);
 482                 __raw_writel(INT_SUSPEND, S3C_UDC_OTG_GINTSTS);
 483
 484                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 485                     && dev->driver
 486                     && dev->driver->suspend) {
 487
 488                         dev->driver->suspend(&dev->gadget);
 489                 }
 490                 /* report disconnect; the driver is already quiesced */
 491                 if (dev->driver) {
 492                         spin_unlock(&dev->lock);
 493                         dev->driver->disconnect(&dev->gadget);
 494                         spin_lock(&dev->lock);
 495                 }
 496 #if defined (CONFIG_BATTERY_S3C)
 497                 s3c_udc_cable_disconnect(dev);
 498 #endif
 499
 500         }
 501
 502         if (intr_status & INT_RESUME) {
 503                 DEBUG_ISR("\tResume interrupt\n");
 504                 __raw_writel(INT_RESUME, S3C_UDC_OTG_GINTSTS);
 505
 506                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 507                     && dev->driver
 508                     && dev->driver->resume) {
 509
 510                         dev->driver->resume(&dev->gadget);
 511                 }
 512         }
 513
 514         if (intr_status & INT_RESET) {
 515                 usb_status = __raw_readl(S3C_UDC_OTG_GOTGCTL);
 516                 DEBUG_ISR("\tReset interrupt - (GOTGCTL):0x%x\n", usb_status);
 517                 __raw_writel(INT_RESET, S3C_UDC_OTG_GINTSTS);
 518
 519                 set_conf_done = 0;
 520
 521                 if ((usb_status & 0xc0000) == (0x3 << 18)) {
 522                         if (reset_available) {
 523                                 DEBUG_ISR("\t\tOTG core got reset (%d)!!\n",
 524                                         reset_available);
 525                                 reconfig_usbd();
 526                                 dev->ep0state = WAIT_FOR_SETUP;
 527                                 reset_available = 0;
 528                                 s3c_udc_pre_setup();
 529                         } else
 530                                 reset_available = 1;
 531
 532                 } else {
 533                         reset_available = 1;
 534                         DEBUG_ISR("\t\tRESET handling skipped\n");
 535                 }
 536         }
 537
 538         if (intr_status & INT_IN_EP)
 539                 process_ep_in_intr(dev);
 540
 541         if (intr_status & INT_OUT_EP)
 542                 process_ep_out_intr(dev);
 543
 544         spin_unlock_irqrestore(&dev->lock, flags);
 545
 546         return IRQ_HANDLED;
 547 }
 548
 549 /** Queue one request
 550  *  Kickstart transfer if needed
 551  */
 552 static int s3c_queue(struct usb_ep *_ep, struct usb_request *_req,
 553                          gfp_t gfp_flags)
 554 {
 555         struct s3c_request *req;
 556         struct s3c_ep *ep;
 557         struct s3c_udc *dev;
 558         unsigned long flags;
 559         u32 ep_num, gintsts;
 560
 561         req = container_of(_req, struct s3c_request, req);
 562         if (unlikely(!_req || !_req->complete ||
 563                         !_req->buf || !list_empty(&req->queue))) {
 564
 565                 DEBUG("%s: bad params\n", __func__);
 566                 return -EINVAL;
 567         }
 568
 569         ep = container_of(_ep, struct s3c_ep, ep);
 570
 571         if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
 572
 573                 DEBUG("%s: bad ep\n", __func__);
 574                 return -EINVAL;
 575         }
 576
 577         ep_num = ep_index(ep);
 578         dev = ep->dev;
 579         if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 580
 581                 DEBUG("%s: bogus device state %p\n", __func__, dev->driver);
 582                 return -ESHUTDOWN;
 583         }
 584
 585         spin_lock_irqsave(&dev->lock, flags);
 586
 587         _req->status = -EINPROGRESS;
 588         _req->actual = 0;
 589
 590         /* kickstart this i/o queue? */
 591         DEBUG("\n*** %s: %s-%s req = %p, len = %d, buf = %p"
 592                 "Q empty = %d, stopped = %d\n",
 593                 __func__, _ep->name, ep_is_in(ep) ? "in" : "out",
 594                 _req, _req->length, _req->buf,
 595                 list_empty(&ep->queue), ep->stopped);
 596
 597         if (list_empty(&ep->queue) && !ep->stopped) {
 598
 599                 if (ep_num == 0) {
 600                         /* EP0 */
 601                         list_add_tail(&req->queue, &ep->queue);
 602                         s3c_ep0_kick(dev, ep);
 603                         req = 0;
 604
 605                 } else if (ep_is_in(ep)) {
 606                         gintsts = __raw_readl(S3C_UDC_OTG_GINTSTS);
 607                         DEBUG_IN_EP("%s: ep_is_in, S3C_UDC_OTG_GINTSTS=0x%x\n",
 608                                                 __func__, gintsts);
 609
 610                         if (set_conf_done == 1) {
 611                                 setdma_tx(ep, req);
 612                         } else {
 613                                 done(ep, req, 0);
 614                                 DEBUG("%s: Not yet Set_configureation,"
 615                                         "ep_num = %d, req = %p\n",
 616                                         __func__, ep_num, req);
 617                                 req = 0;
 618                         }
 619
 620                 } else {
 621                         gintsts = __raw_readl(S3C_UDC_OTG_GINTSTS);
 622                         DEBUG_OUT_EP("%s: ep_is_out,"
 623                                 "S3C_UDC_OTG_GINTSTS=0x%x\n",
 624                                 __func__, gintsts);
 625
 626                         setdma_rx(ep, req);
 627                 }
 628         }
 629
 630         /* pio or dma irq handler advances the queue. */
 631         if (likely(req != 0))
 632                 list_add_tail(&req->queue, &ep->queue);
 633
 634         spin_unlock_irqrestore(&dev->lock, flags);
 635
 636         return 0;
 637 }
 638
 639 /****************************************************************/
 640 /* End Point 0 related functions                                */
 641 /****************************************************************/
 642
 643 /* return:  0 = still running, 1 = completed, negative = errno */
 644 static int write_fifo_ep0(struct s3c_ep *ep, struct s3c_request *req)
 645 {
 646         u32 max;
 647         unsigned count;
 648         int is_last;
 649
 650         max = ep_maxpacket(ep);
 651
 652         DEBUG_EP0("%s: max = %d\n", __func__, max);
 653
 654         count = setdma_tx(ep, req);
 655
 656         /* last packet is usually short (or a zlp) */
 657         if (likely(count != max))
 658                 is_last = 1;
 659         else {
 660                 if (likely(req->req.length != req->req.actual) || req->req.zero)
 661                         is_last = 0;
 662                 else
 663                         is_last = 1;
 664         }
 665
 666         DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
 667                   ep->ep.name, count,
 668                   is_last ? "/L" : "", req->req.length - req->req.actual, req);
 669
 670         /* requests complete when all IN data is in the FIFO */
 671         if (is_last) {
 672                 ep->dev->ep0state = WAIT_FOR_SETUP;
 673                 return 1;
 674         }
 675
 676         return 0;
 677 }
 678
 679 static inline int s3c_fifo_read(struct s3c_ep *ep, u32 *cp, int max)
 680 {
 681         u32 bytes;
 682
 683         bytes = sizeof(struct usb_ctrlrequest);
 684         __dma_single_dev_to_cpu(usb_ctrl, bytes, DMA_FROM_DEVICE);
 685         DEBUG_EP0("%s: bytes=%d, ep_index=%d\n", __func__, bytes, ep_index(ep));
 686
 687         return bytes;
 688 }
 689
 690 /**
 691  * udc_set_address - set the USB address for this device
 692  * @address:
 693  *
 694  * Called from control endpoint function
 695  * after it decodes a set address setup packet.
 696  */
 697 static void udc_set_address(struct s3c_udc *dev, unsigned char address)
 698 {
 699         u32 ctrl = __raw_readl(S3C_UDC_OTG_DCFG);
 700         __raw_writel(address << 4 | ctrl, S3C_UDC_OTG_DCFG);
 701
 702         s3c_udc_ep0_zlp();
 703
 704         DEBUG_EP0("%s: USB OTG 2.0 Device address=%d, DCFG=0x%x\n",
 705                 __func__, address, __raw_readl(S3C_UDC_OTG_DCFG));
 706
 707         dev->usb_address = address;
 708 }
 709
 710 static inline void s3c_udc_ep0_set_stall(struct s3c_ep *ep)
 711 {
 712         struct s3c_udc *dev;
 713         u32             ep_ctrl = 0;
 714
 715         dev = ep->dev;
 716         ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
 717
 718         /* set the disable and stall bits */
 719         if (ep_ctrl & DEPCTL_EPENA)
 720                 ep_ctrl |= DEPCTL_EPDIS;
 721
 722         ep_ctrl |= DEPCTL_STALL;
 723
 724         __raw_writel(ep_ctrl, S3C_UDC_OTG_DIEPCTL(EP0_CON));
 725
 726         DEBUG_EP0("%s: set ep%d stall, DIEPCTL0 = 0x%x\n",
 727                 __func__, ep_index(ep), __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON)));
 728         /*
 729          * The application can only set this bit, and the core clears it,
 730          * when a SETUP token is received for this endpoint
 731          */
 732         dev->ep0state = WAIT_FOR_SETUP;
 733
 734         s3c_udc_pre_setup();
 735 }
 736
 737 static void s3c_ep0_read(struct s3c_udc *dev)
 738 {
 739         struct s3c_request *req;
 740         struct s3c_ep *ep = &dev->ep[0];
 741         int ret;
 742
 743         if (!list_empty(&ep->queue)) {
 744                 req = list_entry(ep->queue.next, struct s3c_request, queue);
 745
 746         } else {
 747                 DEBUG("%s: ---> BUG\n", __func__);
 748                 BUG();
 749                 return;
 750         }
 751
 752         DEBUG_EP0("%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n",
 753                 __func__, req, req->req.length, req->req.actual);
 754
 755         if (req->req.length == 0) {
 756                 /* zlp for Set_configuration, Set_interface,
 757                  * or Bulk-Only mass storge reset */
 758
 759                 dev->ep0state = WAIT_FOR_SETUP;
 760                 set_conf_done = 1;
 761                 s3c_udc_ep0_zlp();
 762
 763                 DEBUG_EP0("%s: req.length = 0, bRequest = %d\n",
 764                         __func__, usb_ctrl->bRequest);
 765                 return;
 766         }
 767
 768         ret = setdma_rx(ep, req);
 769 }
 770
 771 /*
 772  * DATA_STATE_XMIT
 773  */
 774 static int s3c_ep0_write(struct s3c_udc *dev)
 775 {
 776         struct s3c_request *req;
 777         struct s3c_ep *ep = &dev->ep[0];
 778         int ret, need_zlp = 0;
 779
 780         if (list_empty(&ep->queue))
 781                 req = 0;
 782         else
 783                 req = list_entry(ep->queue.next, struct s3c_request, queue);
 784
 785         if (!req) {
 786                 DEBUG_EP0("%s: NULL REQ\n", __func__);
 787                 return 0;
 788         }
 789
 790         DEBUG_EP0("%s: req = %p, req.length = 0x%x, req.actual = 0x%x\n",
 791                 __func__, req, req->req.length, req->req.actual);
 792
 793         if (req->req.length - req->req.actual == ep0_fifo_size) {
 794                 /* Next write will end with the packet size, */
 795                 /* so we need Zero-length-packet */
 796                 need_zlp = 1;
 797         }
 798
 799         ret = write_fifo_ep0(ep, req);
 800
 801         if ((ret == 1) && !need_zlp) {
 802                 /* Last packet */
 803                 dev->ep0state = WAIT_FOR_SETUP;
 804                 DEBUG_EP0("%s: finished, waiting for status\n", __func__);
 805
 806         } else {
 807                 dev->ep0state = DATA_STATE_XMIT;
 808                 DEBUG_EP0("%s: not finished\n", __func__);
 809         }
 810
 811         if (need_zlp) {
 812                 dev->ep0state = DATA_STATE_NEED_ZLP;
 813                 DEBUG_EP0("%s: Need ZLP!\n", __func__);
 814         }
 815
 816         return 1;
 817 }
 818
 819 u16     g_status __attribute__((aligned(8)));
 820
 821 static int s3c_udc_get_status(struct s3c_udc *dev,
 822                 struct usb_ctrlrequest *crq)
 823 {
 824         u8 ep_num = crq->wIndex & 0x7F;
 825         u32 ep_ctrl;
 826
 827         DEBUG_SETUP("%s: *** USB_REQ_GET_STATUS\n", __func__);
 828
 829         switch (crq->bRequestType & USB_RECIP_MASK) {
 830         case USB_RECIP_INTERFACE:
 831                 g_status = 0;
 832                 DEBUG_SETUP("\tGET_STATUS: USB_RECIP_INTERFACE,"
 833                         "g_stauts = %d\n", g_status);
 834                 break;
 835
 836         case USB_RECIP_DEVICE:
 837                 g_status = 0x1; /* Self powered */
 838                 DEBUG_SETUP("\tGET_STATUS: USB_RECIP_DEVICE,"
 839                         "g_stauts = %d\n", g_status);
 840                 break;
 841
 842         case USB_RECIP_ENDPOINT:
 843                 if (crq->wLength > 2) {
 844                         DEBUG_SETUP("\tGET_STATUS:"
 845                                 "Not support EP or wLength\n");
 846                         return 1;
 847                 }
 848
 849                 g_status = dev->ep[ep_num].stopped;
 850                 DEBUG_SETUP("\tGET_STATUS: USB_RECIP_ENDPOINT,"
 851                         "g_stauts = %d\n", g_status);
 852
 853                 break;
 854
 855         default:
 856                 return 1;
 857         }
 858
 859         __dma_single_cpu_to_dev(&g_status, 2, DMA_TO_DEVICE);
 860
 861         __raw_writel(virt_to_phys(&g_status), S3C_UDC_OTG_DIEPDMA(EP0_CON));
 862         __raw_writel((1<<19)|(2<<0), S3C_UDC_OTG_DIEPTSIZ(EP0_CON));
 863
 864         ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
 865         __raw_writel(ep_ctrl|DEPCTL_EPENA|DEPCTL_CNAK, S3C_UDC_OTG_DIEPCTL(EP0_CON));
 866         dev->ep0state = WAIT_FOR_SETUP;
 867
 868         return 0;
 869 }
 870
 871 static void s3c_udc_set_nak(struct s3c_ep *ep)
 872 {
 873         u8              ep_num;
 874         u32             ep_ctrl = 0;
 875
 876         ep_num = ep_index(ep);
 877         DEBUG("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type);
 878
 879         if (ep_is_in(ep)) {
 880                 ep_ctrl = readl(S3C_UDC_OTG_DIEPCTL(ep_num));
 881                 ep_ctrl |= DEPCTL_SNAK;
 882                 writel(ep_ctrl, S3C_UDC_OTG_DIEPCTL(ep_num));
 883                 DEBUG("%s: set NAK, DIEPCTL%d = 0x%x\n",
 884                         __func__, ep_num, readl(S3C_UDC_OTG_DIEPCTL(ep_num)));
 885         } else {
 886                 ep_ctrl = readl(S3C_UDC_OTG_DOEPCTL(ep_num));
 887                 ep_ctrl |= DEPCTL_SNAK;
 888                 writel(ep_ctrl, S3C_UDC_OTG_DOEPCTL(ep_num));
 889                 DEBUG("%s: set NAK, DOEPCTL%d = 0x%x\n",
 890                         __func__, ep_num, readl(S3C_UDC_OTG_DOEPCTL(ep_num)));
 891         }
 892
 893         return;
 894 }
 895
 896 void s3c_udc_ep_set_stall(struct s3c_ep *ep)
 897 {
 898         u8              ep_num;
 899         u32             ep_ctrl = 0;
 900
 901         ep_num = ep_index(ep);
 902         DEBUG("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type);
 903
 904         if (ep_is_in(ep)) {
 905                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num));
 906
 907                 /* set the disable and stall bits */
 908                 if (ep_ctrl & DEPCTL_EPENA)
 909                         ep_ctrl |= DEPCTL_EPDIS;
 910
 911                 ep_ctrl |= DEPCTL_STALL;
 912
 913                 __raw_writel(ep_ctrl, S3C_UDC_OTG_DIEPCTL(ep_num));
 914                 DEBUG("%s: set stall, DIEPCTL%d = 0x%x\n",
 915                         __func__, ep_num, __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num)));
 916
 917         } else {
 918                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num));
 919
 920                 /* set the stall bit */
 921                 ep_ctrl |= DEPCTL_STALL;
 922
 923                 __raw_writel(ep_ctrl, S3C_UDC_OTG_DOEPCTL(ep_num));
 924                 DEBUG("%s: set stall, DOEPCTL%d = 0x%x\n",
 925                         __func__, ep_num, __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num)));
 926         }
 927
 928         return;
 929 }
 930
 931 void s3c_udc_ep_clear_stall(struct s3c_ep *ep)
 932 {
 933         u8              ep_num;
 934         u32             ep_ctrl = 0;
 935
 936         ep_num = ep_index(ep);
 937         DEBUG("%s: ep_num = %d, ep_type = %d\n", __func__, ep_num, ep->ep_type);
 938
 939         if (ep_is_in(ep)) {
 940                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num));
 941
 942                 /* clear stall bit */
 943                 ep_ctrl &= ~DEPCTL_STALL;
 944
 945                 /*
 946                  * USB Spec 9.4.5: For endpoints using data toggle, regardless
 947                  * of whether an endpoint has the Halt feature set, a
 948                  * ClearFeature(ENDPOINT_HALT) request always results in the
 949                  * data toggle being reinitialized to DATA0.
 950                  */
 951                 if (ep->bmAttributes == USB_ENDPOINT_XFER_INT
 952                     || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) {
 953                         ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */
 954                 }
 955
 956                 __raw_writel(ep_ctrl, S3C_UDC_OTG_DIEPCTL(ep_num));
 957                 DEBUG("%s: cleared stall, DIEPCTL%d = 0x%x\n",
 958                         __func__, ep_num, __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num)));
 959
 960         } else {
 961                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num));
 962
 963                 /* clear stall bit */
 964                 ep_ctrl &= ~DEPCTL_STALL;
 965
 966                 if (ep->bmAttributes == USB_ENDPOINT_XFER_INT
 967                     || ep->bmAttributes == USB_ENDPOINT_XFER_BULK) {
 968                         ep_ctrl |= DEPCTL_SETD0PID; /* DATA0 */
 969                 }
 970
 971                 __raw_writel(ep_ctrl, S3C_UDC_OTG_DOEPCTL(ep_num));
 972                 DEBUG("%s: cleared stall, DOEPCTL%d = 0x%x\n",
 973                         __func__, ep_num, __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num)));
 974         }
 975
 976         return;
 977 }
 978
 979 static int s3c_udc_set_halt(struct usb_ep *_ep, int value)
 980 {
 981         struct s3c_ep   *ep;
 982         struct s3c_udc  *dev;
 983         unsigned long   flags;
 984         u8              ep_num;
 985
 986         ep = container_of(_ep, struct s3c_ep, ep);
 987         ep_num = ep_index(ep);
 988
 989         if (unlikely(!_ep || !ep->desc || ep_num == EP0_CON ||
 990                         ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC)) {
 991                 DEBUG("%s: %s bad ep or descriptor\n", __func__, ep->ep.name);
 992                 return -EINVAL;
 993         }
 994
 995         /* Attempt to halt IN ep will fail if any transfer requests
 996          * are still queue */
 997         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
 998                 DEBUG("%s: %s queue not empty, req = %p\n",
 999                         __func__, ep->ep.name,
1000                         list_entry(ep->queue.next, struct s3c_request, queue));
1001
1002                 return -EAGAIN;
1003         }
1004
1005         dev = ep->dev;
1006         DEBUG("%s: ep_num = %d, value = %d\n", __func__, ep_num, value);
1007
1008         spin_lock_irqsave(&dev->lock, flags);
1009
1010         if (value == 0) {
1011                 ep->stopped = 0;
1012                 s3c_udc_ep_clear_stall(ep);
1013         } else {
1014                 ep->stopped = 1;
1015                 s3c_udc_ep_set_stall(ep);
1016         }
1017
1018         spin_unlock_irqrestore(&dev->lock, flags);
1019
1020         return 0;
1021 }
1022
1023 void s3c_udc_ep_activate(struct s3c_ep *ep)
1024 {
1025         u8 ep_num;
1026         u32 ep_ctrl = 0, daintmsk = 0;
1027
1028         ep_num = ep_index(ep);
1029
1030         /* Read DEPCTLn register */
1031         if (ep_is_in(ep)) {
1032                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num));
1033                 daintmsk = 1 << ep_num;
1034         } else {
1035                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num));
1036                 daintmsk = (1 << ep_num) << DAINT_OUT_BIT;
1037         }
1038
1039         DEBUG("%s: EPCTRL%d = 0x%x, ep_is_in = %d\n",
1040                 __func__, ep_num, ep_ctrl, ep_is_in(ep));
1041
1042         /* If the EP is already active don't change the EP Control
1043          * register. */
1044         if (!(ep_ctrl & DEPCTL_USBACTEP)) {
1045                 ep_ctrl = (ep_ctrl & ~DEPCTL_TYPE_MASK) |
1046                         (ep->bmAttributes << DEPCTL_TYPE_BIT);
1047                 ep_ctrl = (ep_ctrl & ~DEPCTL_MPS_MASK) |
1048                         (ep->ep.maxpacket << DEPCTL_MPS_BIT);
1049                 ep_ctrl |= (DEPCTL_SETD0PID | DEPCTL_USBACTEP);
1050
1051                 if (ep_is_in(ep)) {
1052                         __raw_writel(ep_ctrl, S3C_UDC_OTG_DIEPCTL(ep_num));
1053                         DEBUG("%s: USB Ative EP%d, DIEPCTRL%d = 0x%x\n",
1054                                 __func__, ep_num, ep_num,
1055                                 __raw_readl(S3C_UDC_OTG_DIEPCTL(ep_num)));
1056                 } else {
1057                         __raw_writel(ep_ctrl, S3C_UDC_OTG_DOEPCTL(ep_num));
1058                         DEBUG("%s: USB Ative EP%d, DOEPCTRL%d = 0x%x\n",
1059                                 __func__, ep_num, ep_num,
1060                                 __raw_readl(S3C_UDC_OTG_DOEPCTL(ep_num)));
1061                 }
1062         }
1063
1064         /* Unmask EP Interrtupt */
1065         __raw_writel(__raw_readl(S3C_UDC_OTG_DAINTMSK)|daintmsk, S3C_UDC_OTG_DAINTMSK);
1066         DEBUG("%s: DAINTMSK = 0x%x\n", __func__, __raw_readl(S3C_UDC_OTG_DAINTMSK));
1067
1068 }
1069
1070 static int s3c_udc_clear_feature(struct usb_ep *_ep)
1071 {
1072         struct s3c_ep   *ep;
1073         u8              ep_num;
1074
1075         ep = container_of(_ep, struct s3c_ep, ep);
1076         ep_num = ep_index(ep);
1077
1078         DEBUG_SETUP("%s: ep_num = %d, is_in = %d, clear_feature_flag = %d\n",
1079                 __func__, ep_num, ep_is_in(ep), clear_feature_flag);
1080
1081         if (usb_ctrl->wLength != 0) {
1082                 DEBUG_SETUP("\tCLEAR_FEATURE:"
1083                         "wLength is not zero.....\n");
1084                 return 1;
1085         }
1086
1087         switch (usb_ctrl->bRequestType & USB_RECIP_MASK) {
1088         case USB_RECIP_DEVICE:
1089                 switch (usb_ctrl->wValue) {
1090                 case USB_DEVICE_REMOTE_WAKEUP:
1091                         DEBUG_SETUP("\tCLEAR_FEATURE:"
1092                                 "USB_DEVICE_REMOTE_WAKEUP\n");
1093                         break;
1094
1095                 case USB_DEVICE_TEST_MODE:
1096                         DEBUG_SETUP("\tCLEAR_FEATURE:"
1097                                 "USB_DEVICE_TEST_MODE\n");
1098                         /** @todo Add CLEAR_FEATURE for TEST modes. */
1099                         break;
1100
1101                 /* When a device receives the BAD CLEAR FEATURE request,
1102                    the device has to change its status to STALL.
1103                    This action based on USB2.0 spec. ch9.
1104                    We already talked with S.LSI team about this problem.
1105                    and they also reviewed & agree to adopt following patch.
1106                    (added default case to change STALL status)
1107                    2011.12.02 yongsul96.oh@samsung.com
1108                 */
1109                 default:
1110                         printk(KERN_INFO "\tCLEAR_FEATURE: INVAILD CASE\n");
1111                         s3c_udc_ep0_set_stall(ep);
1112                         return 1;
1113                 }
1114
1115                 s3c_udc_ep0_zlp();
1116                 break;
1117
1118         case USB_RECIP_ENDPOINT:
1119                 DEBUG_SETUP("\tCLEAR_FEATURE: USB_RECIP_ENDPOINT,"
1120                         "wValue = %d\n", usb_ctrl->wValue);
1121
1122                 if (usb_ctrl->wValue == USB_ENDPOINT_HALT) {
1123                         if (ep_num == 0) {
1124                                 s3c_udc_ep0_set_stall(ep);
1125                                 return 0;
1126                         }
1127
1128                         s3c_udc_ep0_zlp();
1129
1130                         s3c_udc_ep_clear_stall(ep);
1131                         s3c_udc_ep_activate(ep);
1132                         ep->stopped = 0;
1133
1134                         clear_feature_num = ep_num;
1135                         clear_feature_flag = 1;
1136                 }
1137                 break;
1138         }
1139
1140         return 0;
1141 }
1142
1143 /* Set into the test mode for Test Mode set_feature request */
1144 static inline void set_test_mode(void)
1145 {
1146         u32 ep_ctrl, dctl;
1147         u8 test_selector = (usb_ctrl->wIndex>>8) & TEST_SELECTOR_MASK;
1148
1149         if (test_selector > 0 && test_selector < 6) {
1150                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
1151
1152                 __raw_writel(1<<19 | 0<<0, S3C_UDC_OTG_DIEPTSIZ(EP0_CON));
1153                 __raw_writel(ep_ctrl | DEPCTL_EPENA | DEPCTL_CNAK
1154                         | EP0_CON<<DEPCTL_NEXT_EP_BIT,
1155                         S3C_UDC_OTG_DIEPCTL(EP0_CON));
1156         }
1157
1158         switch (test_selector) {
1159         case TEST_J_SEL:
1160                 /* some delay is necessary like printk() or udelay() */
1161                 printk(KERN_INFO "Test mode selector in set_feature request is"
1162                         "TEST J\n");
1163
1164                 dctl = __raw_readl(S3C_UDC_OTG_DCTL);
1165                 __raw_writel((dctl & ~(TEST_CONTROL_MASK)) | TEST_J_MODE,
1166                         S3C_UDC_OTG_DCTL);
1167                 break;
1168         case TEST_K_SEL:
1169                 /* some delay is necessary like printk() or udelay() */
1170                 printk(KERN_INFO "Test mode selector in set_feature request is"
1171                         "TEST K\n");
1172
1173                 dctl = __raw_readl(S3C_UDC_OTG_DCTL);
1174                 __raw_writel((dctl&~(TEST_CONTROL_MASK))|TEST_K_MODE,
1175                         S3C_UDC_OTG_DCTL);
1176                 break;
1177         case TEST_SE0_NAK_SEL:
1178                 /* some delay is necessary like printk() or udelay() */
1179                 printk(KERN_INFO "Test mode selector in set_feature request is"
1180                         "TEST SE0 NAK\n");
1181
1182                 dctl = __raw_readl(S3C_UDC_OTG_DCTL);
1183                 __raw_writel((dctl & ~(TEST_CONTROL_MASK)) | TEST_SE0_NAK_MODE,
1184                         S3C_UDC_OTG_DCTL);
1185                 break;
1186         case TEST_PACKET_SEL:
1187                 /* some delay is necessary like printk() or udelay() */
1188                 printk(KERN_INFO "Test mode selector in set_feature request is"
1189                         "TEST PACKET\n");
1190
1191                 __dma_single_cpu_to_dev(test_pkt, TEST_PKT_SIZE, DMA_TO_DEVICE);
1192                 __raw_writel(virt_to_phys(test_pkt), S3C_UDC_OTG_DIEPDMA(EP0_CON));
1193
1194                 ep_ctrl = __raw_readl(S3C_UDC_OTG_DIEPCTL(EP0_CON));
1195
1196                 __raw_writel(1<<19 | TEST_PKT_SIZE<<0, S3C_UDC_OTG_DIEPTSIZ(EP0_CON));
1197                 __raw_writel(ep_ctrl | DEPCTL_EPENA | DEPCTL_CNAK
1198                                 | EP0_CON<<DEPCTL_NEXT_EP_BIT,
1199                                 S3C_UDC_OTG_DIEPCTL(EP0_CON));
1200
1201                 dctl = __raw_readl(S3C_UDC_OTG_DCTL);
1202                 __raw_writel((dctl & ~(TEST_CONTROL_MASK)) | TEST_PACKET_MODE,
1203                                 S3C_UDC_OTG_DCTL);
1204                 break;
1205         case TEST_FORCE_ENABLE_SEL:
1206                 /* some delay is necessary like printk() or udelay() */
1207                 printk(KERN_INFO "Test mode selector in set_feature request is"
1208                                         "TEST FORCE ENABLE\n");
1209
1210                 dctl = __raw_readl(S3C_UDC_OTG_DCTL);
1211                 __raw_writel((dctl & ~(TEST_CONTROL_MASK)) | TEST_FORCE_ENABLE_MODE,
1212                                 S3C_UDC_OTG_DCTL);
1213                 break;
1214         }
1215 }
1216
1217 static int s3c_udc_set_feature(struct usb_ep *_ep)
1218 {
1219         struct s3c_ep   *ep;
1220         u8              ep_num;
1221
1222         ep = container_of(_ep, struct s3c_ep, ep);
1223         ep_num = ep_index(ep);
1224
1225         DEBUG_SETUP("%s: *** USB_REQ_SET_FEATURE,"
1226                         "ep_num = %d\n", __func__, ep_num);
1227
1228         if (usb_ctrl->wLength != 0) {
1229                 DEBUG_SETUP("\tSET_FEATURE: wLength is not zero.....\n");
1230                 return 1;
1231         }
1232
1233         switch (usb_ctrl->bRequestType & USB_RECIP_MASK) {
1234         case USB_RECIP_DEVICE:
1235                 switch (usb_ctrl->wValue) {
1236                 case USB_DEVICE_REMOTE_WAKEUP:
1237                         DEBUG_SETUP("\tSET_FEATURE:"
1238                                                 "USB_DEVICE_REMOTE_WAKEUP\n");
1239                         break;
1240
1241                 case USB_DEVICE_TEST_MODE:
1242                         DEBUG_SETUP("\tSET_FEATURE: USB_DEVICE_TEST_MODE\n");
1243                         set_test_mode();
1244                         break;
1245
1246                 case USB_DEVICE_B_HNP_ENABLE:
1247                         DEBUG_SETUP("\tSET_FEATURE: USB_DEVICE_B_HNP_ENABLE\n");
1248                         break;
1249
1250                 case USB_DEVICE_A_HNP_SUPPORT:
1251                         /* RH port supports HNP */
1252                         DEBUG_SETUP("\tSET_FEATURE:"
1253                                         "USB_DEVICE_A_HNP_SUPPORT\n");
1254                         break;
1255
1256                 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1257                         /* other RH port does */
1258                         DEBUG_SETUP("\tSET_FEATURE:"
1259                                         "USB_DEVICE_A_ALT_HNP_SUPPORT\n");
1260                         break;
1261
1262                 /* When a device receives the BAD SET FEATURE request,
1263                    the device has to change its status to STALL.
1264                    This action based on USB2.0 spec. ch9.
1265                    We already talked with S.LSI team about this problem.
1266                    and they also reviewed & agree to adopt following patch.
1267                    (added default case to change STALL status)
1268                    2011.12.02 yongsul96.oh@samsung.com
1269                  */
1270                 default:
1271                         printk(KERN_INFO "\tSET_FEATURE: INVAILD CASE\n");
1272                         s3c_udc_ep0_set_stall(ep);
1273                         return 1;
1274                 }
1275
1276                 s3c_udc_ep0_zlp();
1277                 return 0;
1278
1279         case USB_RECIP_INTERFACE:
1280                 DEBUG_SETUP("\tSET_FEATURE: USB_RECIP_INTERFACE\n");
1281                 break;
1282
1283         case USB_RECIP_ENDPOINT:
1284                 DEBUG_SETUP("\tSET_FEATURE: USB_RECIP_ENDPOINT\n");
1285                 if (usb_ctrl->wValue == USB_ENDPOINT_HALT) {
1286                         if (ep_num == 0) {
1287                                 s3c_udc_ep0_set_stall(ep);
1288                                 return 0;
1289                         }
1290                         ep->stopped = 1;
1291                         s3c_udc_ep_set_stall(ep);
1292                 }
1293
1294                 s3c_udc_ep0_zlp();
1295                 return 0;
1296         }
1297
1298         return 1;
1299 }
1300
1301 /*
1302  * WAIT_FOR_SETUP (OUT_PKT_RDY)
1303  */
1304 static void s3c_ep0_setup(struct s3c_udc *dev)
1305 {
1306         struct s3c_ep *ep = &dev->ep[0];
1307         int i, bytes, is_in;
1308         u8 ep_num;
1309
1310         /* Nuke all previous transfers */
1311         nuke(ep, -EPROTO);
1312
1313         /* read control req from fifo (8 bytes) */
1314         bytes = s3c_fifo_read(ep, (u32 *)usb_ctrl, 8);
1315
1316         DEBUG_SETUP("%s: bRequestType = 0x%x(%s), bRequest = 0x%x"
1317                         "\twLength = 0x%x, wValue = 0x%x, wIndex= 0x%x\n",
1318                         __func__, usb_ctrl->bRequestType,
1319                         (usb_ctrl->bRequestType & USB_DIR_IN) ? "IN" : "OUT",
1320                         usb_ctrl->bRequest, usb_ctrl->wLength, usb_ctrl->wValue,
1321                         usb_ctrl->wIndex);
1322
1323         if (usb_ctrl->bRequest == GET_MAX_LUN_REQUEST && usb_ctrl->wLength != 1) {
1324                 DEBUG_SETUP("\t%s:GET_MAX_LUN_REQUEST:invalid wLength = %d,"
1325                         "setup returned\n", __func__, usb_ctrl->wLength);
1326
1327                 s3c_udc_ep0_set_stall(ep);
1328                 dev->ep0state = WAIT_FOR_SETUP;
1329
1330                 return;
1331         } else if (usb_ctrl->bRequest ==
1332                         BOT_RESET_REQUEST && usb_ctrl->wLength != 0) {
1333                 /* Bulk-Only *mass storge reset of class-specific request */
1334                 DEBUG_SETUP("\t%s:BOT Rest:invalid wLength = %d,"
1335                         "setup returned\n",
1336                         __func__, usb_ctrl->wLength);
1337
1338                 s3c_udc_ep0_set_stall(ep);
1339                 dev->ep0state = WAIT_FOR_SETUP;
1340
1341                 return;
1342         }
1343
1344         /* Set direction of EP0 */
1345         if (likely(usb_ctrl->bRequestType & USB_DIR_IN)) {
1346                 ep->bEndpointAddress |= USB_DIR_IN;
1347                 is_in = 1;
1348
1349         } else {
1350                 ep->bEndpointAddress &= ~USB_DIR_IN;
1351                 is_in = 0;
1352         }
1353         /* cope with automagic for some standard requests. */
1354         dev->req_std = (usb_ctrl->bRequestType & USB_TYPE_MASK)
1355                                                 == USB_TYPE_STANDARD;
1356         dev->req_config = 0;
1357         dev->req_pending = 1;
1358
1359         /* Handle some SETUP packets ourselves */
1360         switch (usb_ctrl->bRequest) {
1361         case USB_REQ_SET_ADDRESS:
1362         DEBUG_SETUP("%s: *** USB_REQ_SET_ADDRESS (%d)\n",
1363                         __func__, usb_ctrl->wValue);
1364
1365                 if (usb_ctrl->bRequestType
1366                         != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1367                         break;
1368
1369                 udc_set_address(dev, usb_ctrl->wValue);
1370                 return;
1371
1372         case USB_REQ_SET_CONFIGURATION:
1373                 DEBUG_SETUP("============================================\n");
1374                 DEBUG_SETUP("%s: USB_REQ_SET_CONFIGURATION (%d)\n",
1375                                 __func__, usb_ctrl->wValue);
1376
1377                 if (usb_ctrl->bRequestType == USB_RECIP_DEVICE) {
1378                         reset_available = 1;
1379                         dev->req_config = 1;
1380                 }
1381 #if defined (CONFIG_BATTERY_S3C)
1382                 s3c_udc_cable_connect(dev);
1383 #endif
1384                 break;
1385
1386         case USB_REQ_GET_DESCRIPTOR:
1387                 DEBUG_SETUP("%s: *** USB_REQ_GET_DESCRIPTOR\n", __func__);
1388                 break;
1389
1390         case USB_REQ_SET_INTERFACE:
1391                 DEBUG_SETUP("%s: *** USB_REQ_SET_INTERFACE (%d)\n",
1392                                 __func__, usb_ctrl->wValue);
1393
1394                 if (usb_ctrl->bRequestType == USB_RECIP_INTERFACE) {
1395                         reset_available = 1;
1396                         dev->req_config = 1;
1397                 }
1398                 break;
1399
1400         case USB_REQ_GET_CONFIGURATION:
1401                 DEBUG_SETUP("%s: *** USB_REQ_GET_CONFIGURATION\n", __func__);
1402                 break;
1403
1404         case USB_REQ_GET_STATUS:
1405                 if (dev->req_std) {
1406                         if (!s3c_udc_get_status(dev, usb_ctrl))
1407                                 return;
1408
1409                 }
1410                 break;
1411
1412         case USB_REQ_CLEAR_FEATURE:
1413                 ep_num = usb_ctrl->wIndex & 0x7f;
1414
1415                 if (!s3c_udc_clear_feature(&dev->ep[ep_num].ep))
1416                         return;
1417
1418                 break;
1419
1420         case USB_REQ_SET_FEATURE:
1421                 ep_num = usb_ctrl->wIndex & 0x7f;
1422
1423                 if (!s3c_udc_set_feature(&dev->ep[ep_num].ep))
1424                         return;
1425
1426                 break;
1427
1428         default:
1429                 DEBUG_SETUP("%s: *** Default of usb_ctrl->bRequest=0x%x"
1430                         "happened.\n", __func__, usb_ctrl->bRequest);
1431                 break;
1432         }
1433
1434         if (likely(dev->driver)) {
1435                 /* device-2-host (IN) or no data setup command,
1436                  * process immediately */
1437                 DEBUG_SETUP("%s: usb_ctrlrequest will be passed to"
1438                         "fsg_setup()\n", __func__);
1439
1440                 spin_unlock(&dev->lock);
1441                 i = dev->driver->setup(&dev->gadget, usb_ctrl);
1442                 spin_lock(&dev->lock);
1443
1444                 if (i < 0) {
1445                         if (dev->req_config) {
1446                                 DEBUG_SETUP("\tconfig change 0x%02x fail %d?\n",
1447                                         (u32*)usb_ctrl->bRequest, i);
1448                                 return;
1449                         }
1450
1451                         /* setup processing failed, force stall */
1452                         s3c_udc_ep0_set_stall(ep);
1453                         dev->ep0state = WAIT_FOR_SETUP;
1454
1455                         DEBUG_SETUP("\tdev->driver->setup failed (%d),"
1456                                 "bRequest = %d\n",
1457                                 i, usb_ctrl->bRequest);
1458
1459
1460                 } else if (dev->req_pending) {
1461                         dev->req_pending = 0;
1462                         DEBUG_SETUP("\tdev->req_pending...\n");
1463                 }
1464
1465                 DEBUG_SETUP("\tep0state = %s\n", state_names[dev->ep0state]);
1466
1467         }
1468 }
1469
1470 /*
1471  * handle ep0 interrupt
1472  */
1473 static void s3c_handle_ep0(struct s3c_udc *dev)
1474 {
1475         if (dev->ep0state == WAIT_FOR_SETUP) {
1476                 DEBUG_OUT_EP("%s: WAIT_FOR_SETUP\n", __func__);
1477                 s3c_ep0_setup(dev);
1478
1479         } else {
1480                 DEBUG_OUT_EP("%s: strange state!!(state = %s)\n",
1481                         __func__, state_names[dev->ep0state]);
1482         }
1483 }
1484
1485 static void s3c_ep0_kick(struct s3c_udc *dev, struct s3c_ep *ep)
1486 {
1487         DEBUG_EP0("%s: ep_is_in = %d\n", __func__, ep_is_in(ep));
1488         if (ep_is_in(ep)) {
1489                 dev->ep0state = DATA_STATE_XMIT;
1490                 s3c_ep0_write(dev);
1491
1492         } else {
1493                 dev->ep0state = DATA_STATE_RECV;
1494                 s3c_ep0_read(dev);
1495         }
1496 }