drivers/usb/gadget/s3c2410_udc.c

   1 /*
   2  * linux/drivers/usb/gadget/s3c2410_udc.c
   3  *
   4  * Samsung S3C24xx series on-chip full speed USB device controllers
   5  *
   6  * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
   7  *      Additional cleanups by Ben Dooks <ben-linux@fluff.org>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39
  40 #include <linux/debugfs.h>
  41 #include <linux/seq_file.h>
  42
  43 #include <linux/usb.h>
  44 #include <linux/usb/gadget.h>
  45
  46 #include <asm/byteorder.h>
  47 #include <asm/io.h>
  48 #include <asm/irq.h>
  49 #include <asm/system.h>
  50 #include <asm/unaligned.h>
  51 #include <mach/irqs.h>
  52
  53 #include <mach/hardware.h>
  54
  55 #include <plat/regs-udc.h>
  56 #include <plat/udc.h>
  57
  58
  59 #include "s3c2410_udc.h"
  60
  61 #define DRIVER_DESC     "S3C2410 USB Device Controller Gadget"
  62 #define DRIVER_VERSION  "29 Apr 2007"
  63 #define DRIVER_AUTHOR   "Herbert Pötzl <herbert@13thfloor.at>, " \
  64                         "Arnaud Patard <arnaud.patard@rtp-net.org>"
  65
  66 static const char               gadget_name[] = "s3c2410_udc";
  67 static const char               driver_desc[] = DRIVER_DESC;
  68
  69 static struct s3c2410_udc       *the_controller;
  70 static struct clk               *udc_clock;
  71 static struct clk               *usb_bus_clock;
  72 static void __iomem             *base_addr;
  73 static u64                      rsrc_start;
  74 static u64                      rsrc_len;
  75 static struct dentry            *s3c2410_udc_debugfs_root;
  76
  77 static inline u32 udc_read(u32 reg)
  78 {
  79         return readb(base_addr + reg);
  80 }
  81
  82 static inline void udc_write(u32 value, u32 reg)
  83 {
  84         writeb(value, base_addr + reg);
  85 }
  86
  87 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
  88 {
  89         writeb(value, base + reg);
  90 }
  91
  92 static struct s3c2410_udc_mach_info *udc_info;
  93
  94 /*************************** DEBUG FUNCTION ***************************/
  95 #define DEBUG_NORMAL    1
  96 #define DEBUG_VERBOSE   2
  97
  98 #ifdef CONFIG_USB_S3C2410_DEBUG
  99 #define USB_S3C2410_DEBUG_LEVEL 0
 100
 101 static uint32_t s3c2410_ticks = 0;
 102
 103 static int dprintk(int level, const char *fmt, ...)
 104 {
 105         static char printk_buf[1024];
 106         static long prevticks;
 107         static int invocation;
 108         va_list args;
 109         int len;
 110
 111         if (level > USB_S3C2410_DEBUG_LEVEL)
 112                 return 0;
 113
 114         if (s3c2410_ticks != prevticks) {
 115                 prevticks = s3c2410_ticks;
 116                 invocation = 0;
 117         }
 118
 119         len = scnprintf(printk_buf,
 120                         sizeof(printk_buf), "%1lu.%02d USB: ",
 121                         prevticks, invocation++);
 122
 123         va_start(args, fmt);
 124         len = vscnprintf(printk_buf+len,
 125                         sizeof(printk_buf)-len, fmt, args);
 126         va_end(args);
 127
 128         return printk(KERN_DEBUG "%s", printk_buf);
 129 }
 130 #else
 131 static int dprintk(int level, const char *fmt, ...)
 132 {
 133         return 0;
 134 }
 135 #endif
 136 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
 137 {
 138         u32 addr_reg,pwr_reg,ep_int_reg,usb_int_reg;
 139         u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
 140         u32 ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2;
 141         u32 ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2;
 142
 143         addr_reg       = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
 144         pwr_reg        = udc_read(S3C2410_UDC_PWR_REG);
 145         ep_int_reg     = udc_read(S3C2410_UDC_EP_INT_REG);
 146         usb_int_reg    = udc_read(S3C2410_UDC_USB_INT_REG);
 147         ep_int_en_reg  = udc_read(S3C2410_UDC_EP_INT_EN_REG);
 148         usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
 149         udc_write(0, S3C2410_UDC_INDEX_REG);
 150         ep0_csr        = udc_read(S3C2410_UDC_IN_CSR1_REG);
 151         udc_write(1, S3C2410_UDC_INDEX_REG);
 152         ep1_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 153         ep1_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 154         ep1_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 155         ep1_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 156         udc_write(2, S3C2410_UDC_INDEX_REG);
 157         ep2_i_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 158         ep2_i_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 159         ep2_o_csr1     = udc_read(S3C2410_UDC_IN_CSR1_REG);
 160         ep2_o_csr2     = udc_read(S3C2410_UDC_IN_CSR2_REG);
 161
 162         seq_printf(m, "FUNC_ADDR_REG  : 0x%04X\n"
 163                  "PWR_REG        : 0x%04X\n"
 164                  "EP_INT_REG     : 0x%04X\n"
 165                  "USB_INT_REG    : 0x%04X\n"
 166                  "EP_INT_EN_REG  : 0x%04X\n"
 167                  "USB_INT_EN_REG : 0x%04X\n"
 168                  "EP0_CSR        : 0x%04X\n"
 169                  "EP1_I_CSR1     : 0x%04X\n"
 170                  "EP1_I_CSR2     : 0x%04X\n"
 171                  "EP1_O_CSR1     : 0x%04X\n"
 172                  "EP1_O_CSR2     : 0x%04X\n"
 173                  "EP2_I_CSR1     : 0x%04X\n"
 174                  "EP2_I_CSR2     : 0x%04X\n"
 175                  "EP2_O_CSR1     : 0x%04X\n"
 176                  "EP2_O_CSR2     : 0x%04X\n",
 177                         addr_reg,pwr_reg,ep_int_reg,usb_int_reg,
 178                         ep_int_en_reg, usb_int_en_reg, ep0_csr,
 179                         ep1_i_csr1,ep1_i_csr2,ep1_o_csr1,ep1_o_csr2,
 180                         ep2_i_csr1,ep2_i_csr2,ep2_o_csr1,ep2_o_csr2
 181                 );
 182
 183         return 0;
 184 }
 185
 186 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
 187                                          struct file *file)
 188 {
 189         return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
 190 }
 191
 192 static const struct file_operations s3c2410_udc_debugfs_fops = {
 193         .open           = s3c2410_udc_debugfs_fops_open,
 194         .read           = seq_read,
 195         .llseek         = seq_lseek,
 196         .release        = single_release,
 197         .owner          = THIS_MODULE,
 198 };
 199
 200 /* io macros */
 201
 202 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
 203 {
 204         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 205         udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
 206                         S3C2410_UDC_EP0_CSR_REG);
 207 }
 208
 209 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
 210 {
 211         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 212         writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
 213 }
 214
 215 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
 216 {
 217         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 218         udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
 219 }
 220
 221 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
 222 {
 223         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 224         udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
 225 }
 226
 227 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
 228 {
 229         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 230         udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
 231 }
 232
 233 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
 234 {
 235         udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 236         udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
 237 }
 238
 239 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
 240 {
 241         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 242
 243         udc_writeb(base,(S3C2410_UDC_EP0_CSR_SOPKTRDY
 244                                 | S3C2410_UDC_EP0_CSR_DE),
 245                         S3C2410_UDC_EP0_CSR_REG);
 246 }
 247
 248 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
 249 {
 250         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 251         udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
 252                                 | S3C2410_UDC_EP0_CSR_SSE),
 253                         S3C2410_UDC_EP0_CSR_REG);
 254 }
 255
 256 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
 257 {
 258         udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 259         udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
 260                         | S3C2410_UDC_EP0_CSR_DE),
 261                 S3C2410_UDC_EP0_CSR_REG);
 262 }
 263
 264 /*------------------------- I/O ----------------------------------*/
 265
 266 /*
 267  *      s3c2410_udc_done
 268  */
 269 static void s3c2410_udc_done(struct s3c2410_ep *ep,
 270                 struct s3c2410_request *req, int status)
 271 {
 272         unsigned halted = ep->halted;
 273
 274         list_del_init(&req->queue);
 275
 276         if (likely (req->req.status == -EINPROGRESS))
 277                 req->req.status = status;
 278         else
 279                 status = req->req.status;
 280
 281         ep->halted = 1;
 282         req->req.complete(&ep->ep, &req->req);
 283         ep->halted = halted;
 284 }
 285
 286 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
 287                 struct s3c2410_ep *ep, int status)
 288 {
 289         /* Sanity check */
 290         if (&ep->queue == NULL)
 291                 return;
 292
 293         while (!list_empty (&ep->queue)) {
 294                 struct s3c2410_request *req;
 295                 req = list_entry (ep->queue.next, struct s3c2410_request,
 296                                 queue);
 297                 s3c2410_udc_done(ep, req, status);
 298         }
 299 }
 300
 301 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
 302 {
 303         unsigned i;
 304
 305         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
 306          * fifos, and pending transactions mustn't be continued in any case.
 307          */
 308
 309         for (i = 1; i < S3C2410_ENDPOINTS; i++)
 310                 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
 311 }
 312
 313 static inline int s3c2410_udc_fifo_count_out(void)
 314 {
 315         int tmp;
 316
 317         tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
 318         tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
 319         return tmp;
 320 }
 321
 322 /*
 323  *      s3c2410_udc_write_packet
 324  */
 325 static inline int s3c2410_udc_write_packet(int fifo,
 326                 struct s3c2410_request *req,
 327                 unsigned max)
 328 {
 329         unsigned len = min(req->req.length - req->req.actual, max);
 330         u8 *buf = req->req.buf + req->req.actual;
 331
 332         prefetch(buf);
 333
 334         dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
 335                 req->req.actual, req->req.length, len, req->req.actual + len);
 336
 337         req->req.actual += len;
 338
 339         udelay(5);
 340         writesb(base_addr + fifo, buf, len);
 341         return len;
 342 }
 343
 344 /*
 345  *      s3c2410_udc_write_fifo
 346  *
 347  * return:  0 = still running, 1 = completed, negative = errno
 348  */
 349 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
 350                 struct s3c2410_request *req)
 351 {
 352         unsigned        count;
 353         int             is_last;
 354         u32             idx;
 355         int             fifo_reg;
 356         u32             ep_csr;
 357
 358         idx = ep->bEndpointAddress & 0x7F;
 359         switch (idx) {
 360         default:
 361                 idx = 0;
 362         case 0:
 363                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 364                 break;
 365         case 1:
 366                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 367                 break;
 368         case 2:
 369                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 370                 break;
 371         case 3:
 372                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 373                 break;
 374         case 4:
 375                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 376                 break;
 377         }
 378
 379         count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
 380
 381         /* last packet is often short (sometimes a zlp) */
 382         if (count != ep->ep.maxpacket)
 383                 is_last = 1;
 384         else if (req->req.length != req->req.actual || req->req.zero)
 385                 is_last = 0;
 386         else
 387                 is_last = 2;
 388
 389         /* Only ep0 debug messages are interesting */
 390         if (idx == 0)
 391                 dprintk(DEBUG_NORMAL,
 392                         "Written ep%d %d.%d of %d b [last %d,z %d]\n",
 393                         idx, count, req->req.actual, req->req.length,
 394                         is_last, req->req.zero);
 395
 396         if (is_last) {
 397                 /* The order is important. It prevents sending 2 packets
 398                  * at the same time */
 399
 400                 if (idx == 0) {
 401                         /* Reset signal => no need to say 'data sent' */
 402                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 403                                         & S3C2410_UDC_USBINT_RESET))
 404                                 s3c2410_udc_set_ep0_de_in(base_addr);
 405                         ep->dev->ep0state=EP0_IDLE;
 406                 } else {
 407                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 408                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 409                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 410                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 411                                         S3C2410_UDC_IN_CSR1_REG);
 412                 }
 413
 414                 s3c2410_udc_done(ep, req, 0);
 415                 is_last = 1;
 416         } else {
 417                 if (idx == 0) {
 418                         /* Reset signal => no need to say 'data sent' */
 419                         if (! (udc_read(S3C2410_UDC_USB_INT_REG)
 420                                         & S3C2410_UDC_USBINT_RESET))
 421                                 s3c2410_udc_set_ep0_ipr(base_addr);
 422                 } else {
 423                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 424                         ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 425                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 426                         udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
 427                                         S3C2410_UDC_IN_CSR1_REG);
 428                 }
 429         }
 430
 431         return is_last;
 432 }
 433
 434 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
 435                 struct s3c2410_request *req, unsigned avail)
 436 {
 437         unsigned len;
 438
 439         len = min(req->req.length - req->req.actual, avail);
 440         req->req.actual += len;
 441
 442         readsb(fifo + base_addr, buf, len);
 443         return len;
 444 }
 445
 446 /*
 447  * return:  0 = still running, 1 = queue empty, negative = errno
 448  */
 449 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
 450                                  struct s3c2410_request *req)
 451 {
 452         u8              *buf;
 453         u32             ep_csr;
 454         unsigned        bufferspace;
 455         int             is_last=1;
 456         unsigned        avail;
 457         int             fifo_count = 0;
 458         u32             idx;
 459         int             fifo_reg;
 460
 461         idx = ep->bEndpointAddress & 0x7F;
 462
 463         switch (idx) {
 464         default:
 465                 idx = 0;
 466         case 0:
 467                 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
 468                 break;
 469         case 1:
 470                 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
 471                 break;
 472         case 2:
 473                 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
 474                 break;
 475         case 3:
 476                 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
 477                 break;
 478         case 4:
 479                 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
 480                 break;
 481         }
 482
 483         if (!req->req.length)
 484                 return 1;
 485
 486         buf = req->req.buf + req->req.actual;
 487         bufferspace = req->req.length - req->req.actual;
 488         if (!bufferspace) {
 489                 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
 490                 return -1;
 491         }
 492
 493         udc_write(idx, S3C2410_UDC_INDEX_REG);
 494
 495         fifo_count = s3c2410_udc_fifo_count_out();
 496         dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
 497
 498         if (fifo_count > ep->ep.maxpacket)
 499                 avail = ep->ep.maxpacket;
 500         else
 501                 avail = fifo_count;
 502
 503         fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
 504
 505         /* checking this with ep0 is not accurate as we already
 506          * read a control request
 507          **/
 508         if (idx != 0 && fifo_count < ep->ep.maxpacket) {
 509                 is_last = 1;
 510                 /* overflowed this request?  flush extra data */
 511                 if (fifo_count != avail)
 512                         req->req.status = -EOVERFLOW;
 513         } else {
 514                 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
 515         }
 516
 517         udc_write(idx, S3C2410_UDC_INDEX_REG);
 518         fifo_count = s3c2410_udc_fifo_count_out();
 519
 520         /* Only ep0 debug messages are interesting */
 521         if (idx == 0)
 522                 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
 523                         __func__, fifo_count,is_last);
 524
 525         if (is_last) {
 526                 if (idx == 0) {
 527                         s3c2410_udc_set_ep0_de_out(base_addr);
 528                         ep->dev->ep0state = EP0_IDLE;
 529                 } else {
 530                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 531                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 532                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 533                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 534                                         S3C2410_UDC_OUT_CSR1_REG);
 535                 }
 536
 537                 s3c2410_udc_done(ep, req, 0);
 538         } else {
 539                 if (idx == 0) {
 540                         s3c2410_udc_clear_ep0_opr(base_addr);
 541                 } else {
 542                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 543                         ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 544                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 545                         udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
 546                                         S3C2410_UDC_OUT_CSR1_REG);
 547                 }
 548         }
 549
 550         return is_last;
 551 }
 552
 553 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
 554 {
 555         unsigned char *outbuf = (unsigned char*)crq;
 556         int bytes_read = 0;
 557
 558         udc_write(0, S3C2410_UDC_INDEX_REG);
 559
 560         bytes_read = s3c2410_udc_fifo_count_out();
 561
 562         dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
 563
 564         if (bytes_read > sizeof(struct usb_ctrlrequest))
 565                 bytes_read = sizeof(struct usb_ctrlrequest);
 566
 567         readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
 568
 569         dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
 570                 bytes_read, crq->bRequest, crq->bRequestType,
 571                 crq->wValue, crq->wIndex, crq->wLength);
 572
 573         return bytes_read;
 574 }
 575
 576 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
 577                 struct usb_ctrlrequest *crq)
 578 {
 579         u16 status = 0;
 580         u8 ep_num = crq->wIndex & 0x7F;
 581         u8 is_in = crq->wIndex & USB_DIR_IN;
 582
 583         switch (crq->bRequestType & USB_RECIP_MASK) {
 584         case USB_RECIP_INTERFACE:
 585                 break;
 586
 587         case USB_RECIP_DEVICE:
 588                 status = dev->devstatus;
 589                 break;
 590
 591         case USB_RECIP_ENDPOINT:
 592                 if (ep_num > 4 || crq->wLength > 2)
 593                         return 1;
 594
 595                 if (ep_num == 0) {
 596                         udc_write(0, S3C2410_UDC_INDEX_REG);
 597                         status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 598                         status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
 599                 } else {
 600                         udc_write(ep_num, S3C2410_UDC_INDEX_REG);
 601                         if (is_in) {
 602                                 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
 603                                 status = status & S3C2410_UDC_ICSR1_SENDSTL;
 604                         } else {
 605                                 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 606                                 status = status & S3C2410_UDC_OCSR1_SENDSTL;
 607                         }
 608                 }
 609
 610                 status = status ? 1 : 0;
 611                 break;
 612
 613         default:
 614                 return 1;
 615         }
 616
 617         /* Seems to be needed to get it working. ouch :( */
 618         udelay(5);
 619         udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
 620         udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
 621         s3c2410_udc_set_ep0_de_in(base_addr);
 622
 623         return 0;
 624 }
 625 /*------------------------- usb state machine -------------------------------*/
 626 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
 627
 628 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
 629                                         struct s3c2410_ep *ep,
 630                                         struct usb_ctrlrequest *crq,
 631                                         u32 ep0csr)
 632 {
 633         int len, ret, tmp;
 634
 635         /* start control request? */
 636         if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
 637                 return;
 638
 639         s3c2410_udc_nuke(dev, ep, -EPROTO);
 640
 641         len = s3c2410_udc_read_fifo_crq(crq);
 642         if (len != sizeof(*crq)) {
 643                 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
 644                         " wanted %d bytes got %d. Stalling out...\n",
 645                         sizeof(*crq), len);
 646                 s3c2410_udc_set_ep0_ss(base_addr);
 647                 return;
 648         }
 649
 650         dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
 651                 crq->bRequest, crq->bRequestType, crq->wLength);
 652
 653         /* cope with automagic for some standard requests. */
 654         dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
 655                 == USB_TYPE_STANDARD;
 656         dev->req_config = 0;
 657         dev->req_pending = 1;
 658
 659         switch (crq->bRequest) {
 660         case USB_REQ_SET_CONFIGURATION:
 661                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ... \n");
 662
 663                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 664                         dev->req_config = 1;
 665                         s3c2410_udc_set_ep0_de_out(base_addr);
 666                 }
 667                 break;
 668
 669         case USB_REQ_SET_INTERFACE:
 670                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ... \n");
 671
 672                 if (crq->bRequestType == USB_RECIP_INTERFACE) {
 673                         dev->req_config = 1;
 674                         s3c2410_udc_set_ep0_de_out(base_addr);
 675                 }
 676                 break;
 677
 678         case USB_REQ_SET_ADDRESS:
 679                 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ... \n");
 680
 681                 if (crq->bRequestType == USB_RECIP_DEVICE) {
 682                         tmp = crq->wValue & 0x7F;
 683                         dev->address = tmp;
 684                         udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
 685                                         S3C2410_UDC_FUNC_ADDR_REG);
 686                         s3c2410_udc_set_ep0_de_out(base_addr);
 687                         return;
 688                 }
 689                 break;
 690
 691         case USB_REQ_GET_STATUS:
 692                 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ... \n");
 693                 s3c2410_udc_clear_ep0_opr(base_addr);
 694
 695                 if (dev->req_std) {
 696                         if (!s3c2410_udc_get_status(dev, crq)) {
 697                                 return;
 698                         }
 699                 }
 700                 break;
 701
 702         case USB_REQ_CLEAR_FEATURE:
 703                 s3c2410_udc_clear_ep0_opr(base_addr);
 704
 705                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 706                         break;
 707
 708                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 709                         break;
 710
 711                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
 712                 s3c2410_udc_set_ep0_de_out(base_addr);
 713                 return;
 714
 715         case USB_REQ_SET_FEATURE:
 716                 s3c2410_udc_clear_ep0_opr(base_addr);
 717
 718                 if (crq->bRequestType != USB_RECIP_ENDPOINT)
 719                         break;
 720
 721                 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
 722                         break;
 723
 724                 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
 725                 s3c2410_udc_set_ep0_de_out(base_addr);
 726                 return;
 727
 728         default:
 729                 s3c2410_udc_clear_ep0_opr(base_addr);
 730                 break;
 731         }
 732
 733         if (crq->bRequestType & USB_DIR_IN)
 734                 dev->ep0state = EP0_IN_DATA_PHASE;
 735         else
 736                 dev->ep0state = EP0_OUT_DATA_PHASE;
 737
 738         if (!dev->driver)
 739                 return;
 740
 741         /* deliver the request to the gadget driver */
 742         ret = dev->driver->setup(&dev->gadget, crq);
 743         if (ret < 0) {
 744                 if (dev->req_config) {
 745                         dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
 746                                 crq->bRequest, ret);
 747                         return;
 748                 }
 749
 750                 if (ret == -EOPNOTSUPP)
 751                         dprintk(DEBUG_NORMAL, "Operation not supported\n");
 752                 else
 753                         dprintk(DEBUG_NORMAL,
 754                                 "dev->driver->setup failed. (%d)\n", ret);
 755
 756                 udelay(5);
 757                 s3c2410_udc_set_ep0_ss(base_addr);
 758                 s3c2410_udc_set_ep0_de_out(base_addr);
 759                 dev->ep0state = EP0_IDLE;
 760                 /* deferred i/o == no response yet */
 761         } else if (dev->req_pending) {
 762                 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
 763                 dev->req_pending=0;
 764         }
 765
 766         dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
 767 }
 768
 769 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
 770 {
 771         u32                     ep0csr;
 772         struct s3c2410_ep       *ep = &dev->ep[0];
 773         struct s3c2410_request  *req;
 774         struct usb_ctrlrequest  crq;
 775
 776         if (list_empty(&ep->queue))
 777                 req = NULL;
 778         else
 779                 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
 780
 781         /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
 782          * S3C2410_UDC_EP0_CSR_REG when index is zero */
 783
 784         udc_write(0, S3C2410_UDC_INDEX_REG);
 785         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 786
 787         dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
 788                 ep0csr, ep0states[dev->ep0state]);
 789
 790         /* clear stall status */
 791         if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
 792                 s3c2410_udc_nuke(dev, ep, -EPIPE);
 793                 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
 794                 s3c2410_udc_clear_ep0_sst(base_addr);
 795                 dev->ep0state = EP0_IDLE;
 796                 return;
 797         }
 798
 799         /* clear setup end */
 800         if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
 801                 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
 802                 s3c2410_udc_nuke(dev, ep, 0);
 803                 s3c2410_udc_clear_ep0_se(base_addr);
 804                 dev->ep0state = EP0_IDLE;
 805         }
 806
 807         switch (dev->ep0state) {
 808         case EP0_IDLE:
 809                 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
 810                 break;
 811
 812         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
 813                 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
 814                 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req) {
 815                         s3c2410_udc_write_fifo(ep, req);
 816                 }
 817                 break;
 818
 819         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
 820                 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
 821                 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req ) {
 822                         s3c2410_udc_read_fifo(ep,req);
 823                 }
 824                 break;
 825
 826         case EP0_END_XFER:
 827                 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
 828                 dev->ep0state = EP0_IDLE;
 829                 break;
 830
 831         case EP0_STALL:
 832                 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
 833                 dev->ep0state = EP0_IDLE;
 834                 break;
 835         }
 836 }
 837
 838 /*
 839  *      handle_ep - Manage I/O endpoints
 840  */
 841
 842 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
 843 {
 844         struct s3c2410_request  *req;
 845         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
 846         u32                     ep_csr1;
 847         u32                     idx;
 848
 849         if (likely (!list_empty(&ep->queue)))
 850                 req = list_entry(ep->queue.next,
 851                                 struct s3c2410_request, queue);
 852         else
 853                 req = NULL;
 854
 855         idx = ep->bEndpointAddress & 0x7F;
 856
 857         if (is_in) {
 858                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 859                 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
 860                 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
 861                         idx, ep_csr1, req ? 1 : 0);
 862
 863                 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
 864                         dprintk(DEBUG_VERBOSE, "st\n");
 865                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 866                         udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
 867                                         S3C2410_UDC_IN_CSR1_REG);
 868                         return;
 869                 }
 870
 871                 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req) {
 872                         s3c2410_udc_write_fifo(ep,req);
 873                 }
 874         } else {
 875                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 876                 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
 877                 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
 878
 879                 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
 880                         udc_write(idx, S3C2410_UDC_INDEX_REG);
 881                         udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
 882                                         S3C2410_UDC_OUT_CSR1_REG);
 883                         return;
 884                 }
 885
 886                 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req) {
 887                         s3c2410_udc_read_fifo(ep,req);
 888                 }
 889         }
 890 }
 891
 892 #include <mach/regs-irq.h>
 893
 894 /*
 895  *      s3c2410_udc_irq - interrupt handler
 896  */
 897 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
 898 {
 899         struct s3c2410_udc *dev = _dev;
 900         int usb_status;
 901         int usbd_status;
 902         int pwr_reg;
 903         int ep0csr;
 904         int i;
 905         u32 idx;
 906         unsigned long flags;
 907
 908         spin_lock_irqsave(&dev->lock, flags);
 909
 910         /* Driver connected ? */
 911         if (!dev->driver) {
 912                 /* Clear interrupts */
 913                 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
 914                                 S3C2410_UDC_USB_INT_REG);
 915                 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
 916                                 S3C2410_UDC_EP_INT_REG);
 917         }
 918
 919         /* Save index */
 920         idx = udc_read(S3C2410_UDC_INDEX_REG);
 921
 922         /* Read status registers */
 923         usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
 924         usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
 925         pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
 926
 927         udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
 928         ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
 929
 930         dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
 931                 usb_status, usbd_status, pwr_reg, ep0csr);
 932
 933         /*
 934          * Now, handle interrupts. There's two types :
 935          * - Reset, Resume, Suspend coming -> usb_int_reg
 936          * - EP -> ep_int_reg
 937          */
 938
 939         /* RESET */
 940         if (usb_status & S3C2410_UDC_USBINT_RESET) {
 941                 /* two kind of reset :
 942                  * - reset start -> pwr reg = 8
 943                  * - reset end   -> pwr reg = 0
 944                  **/
 945                 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
 946                         ep0csr, pwr_reg);
 947
 948                 dev->gadget.speed = USB_SPEED_UNKNOWN;
 949                 udc_write(0x00, S3C2410_UDC_INDEX_REG);
 950                 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
 951                                 S3C2410_UDC_MAXP_REG);
 952                 dev->address = 0;
 953
 954                 dev->ep0state = EP0_IDLE;
 955                 dev->gadget.speed = USB_SPEED_FULL;
 956
 957                 /* clear interrupt */
 958                 udc_write(S3C2410_UDC_USBINT_RESET,
 959                                 S3C2410_UDC_USB_INT_REG);
 960
 961                 udc_write(idx, S3C2410_UDC_INDEX_REG);
 962                 spin_unlock_irqrestore(&dev->lock, flags);
 963                 return IRQ_HANDLED;
 964         }
 965
 966         /* RESUME */
 967         if (usb_status & S3C2410_UDC_USBINT_RESUME) {
 968                 dprintk(DEBUG_NORMAL, "USB resume\n");
 969
 970                 /* clear interrupt */
 971                 udc_write(S3C2410_UDC_USBINT_RESUME,
 972                                 S3C2410_UDC_USB_INT_REG);
 973
 974                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 975                                 && dev->driver
 976                                 && dev->driver->resume)
 977                         dev->driver->resume(&dev->gadget);
 978         }
 979
 980         /* SUSPEND */
 981         if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
 982                 dprintk(DEBUG_NORMAL, "USB suspend\n");
 983
 984                 /* clear interrupt */
 985                 udc_write(S3C2410_UDC_USBINT_SUSPEND,
 986                                 S3C2410_UDC_USB_INT_REG);
 987
 988                 if (dev->gadget.speed != USB_SPEED_UNKNOWN
 989                                 && dev->driver
 990                                 && dev->driver->suspend)
 991                         dev->driver->suspend(&dev->gadget);
 992
 993                 dev->ep0state = EP0_IDLE;
 994         }
 995
 996         /* EP */
 997         /* control traffic */
 998         /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
 999          * generate an interrupt
1000          */
1001         if (usbd_status & S3C2410_UDC_INT_EP0) {
1002                 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
1003                 /* Clear the interrupt bit by setting it to 1 */
1004                 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
1005                 s3c2410_udc_handle_ep0(dev);
1006         }
1007
1008         /* endpoint data transfers */
1009         for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1010                 u32 tmp = 1 << i;
1011                 if (usbd_status & tmp) {
1012                         dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1013
1014                         /* Clear the interrupt bit by setting it to 1 */
1015                         udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1016                         s3c2410_udc_handle_ep(&dev->ep[i]);
1017                 }
1018         }
1019
1020         dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1021
1022         /* Restore old index */
1023         udc_write(idx, S3C2410_UDC_INDEX_REG);
1024
1025         spin_unlock_irqrestore(&dev->lock, flags);
1026
1027         return IRQ_HANDLED;
1028 }
1029 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1030
1031 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1032 {
1033         return container_of(ep, struct s3c2410_ep, ep);
1034 }
1035
1036 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1037 {
1038         return container_of(gadget, struct s3c2410_udc, gadget);
1039 }
1040
1041 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1042 {
1043         return container_of(req, struct s3c2410_request, req);
1044 }
1045
1046 /*
1047  *      s3c2410_udc_ep_enable
1048  */
1049 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1050                                  const struct usb_endpoint_descriptor *desc)
1051 {
1052         struct s3c2410_udc      *dev;
1053         struct s3c2410_ep       *ep;
1054         u32                     max, tmp;
1055         unsigned long           flags;
1056         u32                     csr1,csr2;
1057         u32                     int_en_reg;
1058
1059         ep = to_s3c2410_ep(_ep);
1060
1061         if (!_ep || !desc || ep->desc
1062                         || _ep->name == ep0name
1063                         || desc->bDescriptorType != USB_DT_ENDPOINT)
1064                 return -EINVAL;
1065
1066         dev = ep->dev;
1067         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1068                 return -ESHUTDOWN;
1069
1070         max = le16_to_cpu(desc->wMaxPacketSize) & 0x1fff;
1071
1072         local_irq_save (flags);
1073         _ep->maxpacket = max & 0x7ff;
1074         ep->desc = desc;
1075         ep->halted = 0;
1076         ep->bEndpointAddress = desc->bEndpointAddress;
1077
1078         /* set max packet */
1079         udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1080         udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1081
1082         /* set type, direction, address; reset fifo counters */
1083         if (desc->bEndpointAddress & USB_DIR_IN) {
1084                 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1085                 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1086
1087                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1088                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1089                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1090                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1091         } else {
1092                 /* don't flush in fifo or it will cause endpoint interrupt */
1093                 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1094                 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1095
1096                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1097                 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1098                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1099                 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1100
1101                 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1102                 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1103
1104                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1105                 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1106                 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1107                 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1108         }
1109
1110         /* enable irqs */
1111         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1112         udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1113
1114         /* print some debug message */
1115         tmp = desc->bEndpointAddress;
1116         dprintk (DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1117                  _ep->name,ep->num, tmp,
1118                  desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1119
1120         local_irq_restore (flags);
1121         s3c2410_udc_set_halt(_ep, 0);
1122
1123         return 0;
1124 }
1125
1126 /*
1127  * s3c2410_udc_ep_disable
1128  */
1129 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1130 {
1131         struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1132         unsigned long flags;
1133         u32 int_en_reg;
1134
1135         if (!_ep || !ep->desc) {
1136                 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1137                         _ep ? ep->ep.name : NULL);
1138                 return -EINVAL;
1139         }
1140
1141         local_irq_save(flags);
1142
1143         dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1144
1145         ep->desc = NULL;
1146         ep->halted = 1;
1147
1148         s3c2410_udc_nuke (ep->dev, ep, -ESHUTDOWN);
1149
1150         /* disable irqs */
1151         int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1152         udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1153
1154         local_irq_restore(flags);
1155
1156         dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1157
1158         return 0;
1159 }
1160
1161 /*
1162  * s3c2410_udc_alloc_request
1163  */
1164 static struct usb_request *
1165 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1166 {
1167         struct s3c2410_request *req;
1168
1169         dprintk(DEBUG_VERBOSE,"%s(%p,%d)\n", __func__, _ep, mem_flags);
1170
1171         if (!_ep)
1172                 return NULL;
1173
1174         req = kzalloc (sizeof(struct s3c2410_request), mem_flags);
1175         if (!req)
1176                 return NULL;
1177
1178         INIT_LIST_HEAD (&req->queue);
1179         return &req->req;
1180 }
1181
1182 /*
1183  * s3c2410_udc_free_request
1184  */
1185 static void
1186 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1187 {
1188         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1189         struct s3c2410_request  *req = to_s3c2410_req(_req);
1190
1191         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1192
1193         if (!ep || !_req || (!ep->desc && _ep->name != ep0name))
1194                 return;
1195
1196         WARN_ON (!list_empty (&req->queue));
1197         kfree(req);
1198 }
1199
1200 /*
1201  *      s3c2410_udc_queue
1202  */
1203 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1204                 gfp_t gfp_flags)
1205 {
1206         struct s3c2410_request  *req = to_s3c2410_req(_req);
1207         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1208         struct s3c2410_udc      *dev;
1209         u32                     ep_csr = 0;
1210         int                     fifo_count = 0;
1211         unsigned long           flags;
1212
1213         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1214                 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1215                 return -EINVAL;
1216         }
1217
1218         dev = ep->dev;
1219         if (unlikely (!dev->driver
1220                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1221                 return -ESHUTDOWN;
1222         }
1223
1224         local_irq_save (flags);
1225
1226         if (unlikely(!_req || !_req->complete
1227                         || !_req->buf || !list_empty(&req->queue))) {
1228                 if (!_req)
1229                         dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1230                 else {
1231                         dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1232                                 __func__, !_req->complete,!_req->buf,
1233                                 !list_empty(&req->queue));
1234                 }
1235
1236                 local_irq_restore(flags);
1237                 return -EINVAL;
1238         }
1239
1240         _req->status = -EINPROGRESS;
1241         _req->actual = 0;
1242
1243         dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1244                  __func__, ep->bEndpointAddress, _req->length);
1245
1246         if (ep->bEndpointAddress) {
1247                 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1248
1249                 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1250                                 ? S3C2410_UDC_IN_CSR1_REG
1251                                 : S3C2410_UDC_OUT_CSR1_REG);
1252                 fifo_count = s3c2410_udc_fifo_count_out();
1253         } else {
1254                 udc_write(0, S3C2410_UDC_INDEX_REG);
1255                 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1256                 fifo_count = s3c2410_udc_fifo_count_out();
1257         }
1258
1259         /* kickstart this i/o queue? */
1260         if (list_empty(&ep->queue) && !ep->halted) {
1261                 if (ep->bEndpointAddress == 0 /* ep0 */) {
1262                         switch (dev->ep0state) {
1263                         case EP0_IN_DATA_PHASE:
1264                                 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1265                                                 && s3c2410_udc_write_fifo(ep,
1266                                                         req)) {
1267                                         dev->ep0state = EP0_IDLE;
1268                                         req = NULL;
1269                                 }
1270                                 break;
1271
1272                         case EP0_OUT_DATA_PHASE:
1273                                 if ((!_req->length)
1274                                         || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1275                                                 && s3c2410_udc_read_fifo(ep,
1276                                                         req))) {
1277                                         dev->ep0state = EP0_IDLE;
1278                                         req = NULL;
1279                                 }
1280                                 break;
1281
1282                         default:
1283                                 local_irq_restore(flags);
1284                                 return -EL2HLT;
1285                         }
1286                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1287                                 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1288                                 && s3c2410_udc_write_fifo(ep, req)) {
1289                         req = NULL;
1290                 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1291                                 && fifo_count
1292                                 && s3c2410_udc_read_fifo(ep, req)) {
1293                         req = NULL;
1294                 }
1295         }
1296
1297         /* pio or dma irq handler advances the queue. */
1298         if (likely (req != 0))
1299                 list_add_tail(&req->queue, &ep->queue);
1300
1301         local_irq_restore(flags);
1302
1303         dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1304         return 0;
1305 }
1306
1307 /*
1308  *      s3c2410_udc_dequeue
1309  */
1310 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1311 {
1312         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1313         struct s3c2410_udc      *udc;
1314         int                     retval = -EINVAL;
1315         unsigned long           flags;
1316         struct s3c2410_request  *req = NULL;
1317
1318         dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1319
1320         if (!the_controller->driver)
1321                 return -ESHUTDOWN;
1322
1323         if (!_ep || !_req)
1324                 return retval;
1325
1326         udc = to_s3c2410_udc(ep->gadget);
1327
1328         local_irq_save (flags);
1329
1330         list_for_each_entry (req, &ep->queue, queue) {
1331                 if (&req->req == _req) {
1332                         list_del_init (&req->queue);
1333                         _req->status = -ECONNRESET;
1334                         retval = 0;
1335                         break;
1336                 }
1337         }
1338
1339         if (retval == 0) {
1340                 dprintk(DEBUG_VERBOSE,
1341                         "dequeued req %p from %s, len %d buf %p\n",
1342                         req, _ep->name, _req->length, _req->buf);
1343
1344                 s3c2410_udc_done(ep, req, -ECONNRESET);
1345         }
1346
1347         local_irq_restore (flags);
1348         return retval;
1349 }
1350
1351 /*
1352  * s3c2410_udc_set_halt
1353  */
1354 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1355 {
1356         struct s3c2410_ep       *ep = to_s3c2410_ep(_ep);
1357         u32                     ep_csr = 0;
1358         unsigned long           flags;
1359         u32                     idx;
1360
1361         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1362                 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1363                 return -EINVAL;
1364         }
1365
1366         local_irq_save (flags);
1367
1368         idx = ep->bEndpointAddress & 0x7F;
1369
1370         if (idx == 0) {
1371                 s3c2410_udc_set_ep0_ss(base_addr);
1372                 s3c2410_udc_set_ep0_de_out(base_addr);
1373         } else {
1374                 udc_write(idx, S3C2410_UDC_INDEX_REG);
1375                 ep_csr = udc_read((ep->bEndpointAddress &USB_DIR_IN)
1376                                 ? S3C2410_UDC_IN_CSR1_REG
1377                                 : S3C2410_UDC_OUT_CSR1_REG);
1378
1379                 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1380                         if (value)
1381                                 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1382                                         S3C2410_UDC_IN_CSR1_REG);
1383                         else {
1384                                 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1385                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1386                                 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1387                                 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1388                         }
1389                 } else {
1390                         if (value)
1391                                 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1392                                         S3C2410_UDC_OUT_CSR1_REG);
1393                         else {
1394                                 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1395                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1396                                 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1397                                 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1398                         }
1399                 }
1400         }
1401
1402         ep->halted = value ? 1 : 0;
1403         local_irq_restore (flags);
1404
1405         return 0;
1406 }
1407
1408 static const struct usb_ep_ops s3c2410_ep_ops = {
1409         .enable         = s3c2410_udc_ep_enable,
1410         .disable        = s3c2410_udc_ep_disable,
1411
1412         .alloc_request  = s3c2410_udc_alloc_request,
1413         .free_request   = s3c2410_udc_free_request,
1414
1415         .queue          = s3c2410_udc_queue,
1416         .dequeue        = s3c2410_udc_dequeue,
1417
1418         .set_halt       = s3c2410_udc_set_halt,
1419 };
1420
1421 /*------------------------- usb_gadget_ops ----------------------------------*/
1422
1423 /*
1424  *      s3c2410_udc_get_frame
1425  */
1426 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1427 {
1428         int tmp;
1429
1430         dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1431
1432         tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1433         tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1434         return tmp;
1435 }
1436
1437 /*
1438  *      s3c2410_udc_wakeup
1439  */
1440 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1441 {
1442         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1443         return 0;
1444 }
1445
1446 /*
1447  *      s3c2410_udc_set_selfpowered
1448  */
1449 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1450 {
1451         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1452
1453         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1454
1455         if (value)
1456                 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1457         else
1458                 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1459
1460         return 0;
1461 }
1462
1463 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1464 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1465
1466 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1467 {
1468         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1469
1470         if (udc_info && udc_info->udc_command) {
1471                 if (is_on)
1472                         s3c2410_udc_enable(udc);
1473                 else {
1474                         if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1475                                 if (udc->driver && udc->driver->disconnect)
1476                                         udc->driver->disconnect(&udc->gadget);
1477
1478                         }
1479                         s3c2410_udc_disable(udc);
1480                 }
1481         }
1482         else
1483                 return -EOPNOTSUPP;
1484
1485         return 0;
1486 }
1487
1488 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1489 {
1490         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1491
1492         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1493
1494         udc->vbus = (is_active != 0);
1495         s3c2410_udc_set_pullup(udc, is_active);
1496         return 0;
1497 }
1498
1499 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1500 {
1501         struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1502
1503         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1504
1505         s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1506         return 0;
1507 }
1508
1509 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1510 {
1511         struct s3c2410_udc      *dev = _dev;
1512         unsigned int            value;
1513
1514         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1515
1516         value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1517         if (udc_info->vbus_pin_inverted)
1518                 value = !value;
1519
1520         if (value != dev->vbus)
1521                 s3c2410_udc_vbus_session(&dev->gadget, value);
1522
1523         return IRQ_HANDLED;
1524 }
1525
1526 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1527 {
1528         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1529
1530         if (udc_info && udc_info->vbus_draw) {
1531                 udc_info->vbus_draw(ma);
1532                 return 0;
1533         }
1534
1535         return -ENOTSUPP;
1536 }
1537
1538 static const struct usb_gadget_ops s3c2410_ops = {
1539         .get_frame              = s3c2410_udc_get_frame,
1540         .wakeup                 = s3c2410_udc_wakeup,
1541         .set_selfpowered        = s3c2410_udc_set_selfpowered,
1542         .pullup                 = s3c2410_udc_pullup,
1543         .vbus_session           = s3c2410_udc_vbus_session,
1544         .vbus_draw              = s3c2410_vbus_draw,
1545 };
1546
1547 /*------------------------- gadget driver handling---------------------------*/
1548 /*
1549  * s3c2410_udc_disable
1550  */
1551 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1552 {
1553         dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1554
1555         /* Disable all interrupts */
1556         udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1557         udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1558
1559         /* Clear the interrupt registers */
1560         udc_write(S3C2410_UDC_USBINT_RESET
1561                                 | S3C2410_UDC_USBINT_RESUME
1562                                 | S3C2410_UDC_USBINT_SUSPEND,
1563                         S3C2410_UDC_USB_INT_REG);
1564
1565         udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1566
1567         /* Good bye, cruel world */
1568         if (udc_info && udc_info->udc_command)
1569                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1570
1571         /* Set speed to unknown */
1572         dev->gadget.speed = USB_SPEED_UNKNOWN;
1573 }
1574
1575 /*
1576  * s3c2410_udc_reinit
1577  */
1578 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1579 {
1580         u32 i;
1581
1582         /* device/ep0 records init */
1583         INIT_LIST_HEAD (&dev->gadget.ep_list);
1584         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1585         dev->ep0state = EP0_IDLE;
1586
1587         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1588                 struct s3c2410_ep *ep = &dev->ep[i];
1589
1590                 if (i != 0)
1591                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1592
1593                 ep->dev = dev;
1594                 ep->desc = NULL;
1595                 ep->halted = 0;
1596                 INIT_LIST_HEAD (&ep->queue);
1597         }
1598 }
1599
1600 /*
1601  * s3c2410_udc_enable
1602  */
1603 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1604 {
1605         int i;
1606
1607         dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1608
1609         /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1610         dev->gadget.speed = USB_SPEED_FULL;
1611
1612         /* Set MAXP for all endpoints */
1613         for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1614                 udc_write(i, S3C2410_UDC_INDEX_REG);
1615                 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1616                                 S3C2410_UDC_MAXP_REG);
1617         }
1618
1619         /* Set default power state */
1620         udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1621
1622         /* Enable reset and suspend interrupt interrupts */
1623         udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1624                         S3C2410_UDC_USB_INT_EN_REG);
1625
1626         /* Enable ep0 interrupt */
1627         udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1628
1629         /* time to say "hello, world" */
1630         if (udc_info && udc_info->udc_command)
1631                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1632 }
1633
1634 /*
1635  *      usb_gadget_register_driver
1636  */
1637 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1638 {
1639         struct s3c2410_udc *udc = the_controller;
1640         int             retval;
1641
1642         dprintk(DEBUG_NORMAL, "usb_gadget_register_driver() '%s'\n",
1643                 driver->driver.name);
1644
1645         /* Sanity checks */
1646         if (!udc)
1647                 return -ENODEV;
1648
1649         if (udc->driver)
1650                 return -EBUSY;
1651
1652         if (!driver->bind || !driver->setup
1653                         || driver->speed < USB_SPEED_FULL) {
1654                 printk(KERN_ERR "Invalid driver: bind %p setup %p speed %d\n",
1655                         driver->bind, driver->setup, driver->speed);
1656                 return -EINVAL;
1657         }
1658 #if defined(MODULE)
1659         if (!driver->unbind) {
1660                 printk(KERN_ERR "Invalid driver: no unbind method\n");
1661                 return -EINVAL;
1662         }
1663 #endif
1664
1665         /* Hook the driver */
1666         udc->driver = driver;
1667         udc->gadget.dev.driver = &driver->driver;
1668
1669         /* Bind the driver */
1670         if ((retval = device_add(&udc->gadget.dev)) != 0) {
1671                 printk(KERN_ERR "Error in device_add() : %d\n",retval);
1672                 goto register_error;
1673         }
1674
1675         dprintk(DEBUG_NORMAL, "binding gadget driver '%s'\n",
1676                 driver->driver.name);
1677
1678         if ((retval = driver->bind (&udc->gadget)) != 0) {
1679                 device_del(&udc->gadget.dev);
1680                 goto register_error;
1681         }
1682
1683         /* Enable udc */
1684         s3c2410_udc_enable(udc);
1685
1686         return 0;
1687
1688 register_error:
1689         udc->driver = NULL;
1690         udc->gadget.dev.driver = NULL;
1691         return retval;
1692 }
1693
1694 /*
1695  *      usb_gadget_unregister_driver
1696  */
1697 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1698 {
1699         struct s3c2410_udc *udc = the_controller;
1700
1701         if (!udc)
1702                 return -ENODEV;
1703
1704         if (!driver || driver != udc->driver || !driver->unbind)
1705                 return -EINVAL;
1706
1707         dprintk(DEBUG_NORMAL, "usb_gadget_unregister_driver() '%s'\n",
1708                 driver->driver.name);
1709
1710         /* report disconnect */
1711         if (driver->disconnect)
1712                 driver->disconnect(&udc->gadget);
1713
1714         driver->unbind(&udc->gadget);
1715
1716         device_del(&udc->gadget.dev);
1717         udc->driver = NULL;
1718
1719         /* Disable udc */
1720         s3c2410_udc_disable(udc);
1721
1722         return 0;
1723 }
1724
1725 /*---------------------------------------------------------------------------*/
1726 static struct s3c2410_udc memory = {
1727         .gadget = {
1728                 .ops            = &s3c2410_ops,
1729                 .ep0            = &memory.ep[0].ep,
1730                 .name           = gadget_name,
1731                 .dev = {
1732                         .init_name      = "gadget",
1733                 },
1734         },
1735
1736         /* control endpoint */
1737         .ep[0] = {
1738                 .num            = 0,
1739                 .ep = {
1740                         .name           = ep0name,
1741                         .ops            = &s3c2410_ep_ops,
1742                         .maxpacket      = EP0_FIFO_SIZE,
1743                 },
1744                 .dev            = &memory,
1745         },
1746
1747         /* first group of endpoints */
1748         .ep[1] = {
1749                 .num            = 1,
1750                 .ep = {
1751                         .name           = "ep1-bulk",
1752                         .ops            = &s3c2410_ep_ops,
1753                         .maxpacket      = EP_FIFO_SIZE,
1754                 },
1755                 .dev            = &memory,
1756                 .fifo_size      = EP_FIFO_SIZE,
1757                 .bEndpointAddress = 1,
1758                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1759         },
1760         .ep[2] = {
1761                 .num            = 2,
1762                 .ep = {
1763                         .name           = "ep2-bulk",
1764                         .ops            = &s3c2410_ep_ops,
1765                         .maxpacket      = EP_FIFO_SIZE,
1766                 },
1767                 .dev            = &memory,
1768                 .fifo_size      = EP_FIFO_SIZE,
1769                 .bEndpointAddress = 2,
1770                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1771         },
1772         .ep[3] = {
1773                 .num            = 3,
1774                 .ep = {
1775                         .name           = "ep3-bulk",
1776                         .ops            = &s3c2410_ep_ops,
1777                         .maxpacket      = EP_FIFO_SIZE,
1778                 },
1779                 .dev            = &memory,
1780                 .fifo_size      = EP_FIFO_SIZE,
1781                 .bEndpointAddress = 3,
1782                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1783         },
1784         .ep[4] = {
1785                 .num            = 4,
1786                 .ep = {
1787                         .name           = "ep4-bulk",
1788                         .ops            = &s3c2410_ep_ops,
1789                         .maxpacket      = EP_FIFO_SIZE,
1790                 },
1791                 .dev            = &memory,
1792                 .fifo_size      = EP_FIFO_SIZE,
1793                 .bEndpointAddress = 4,
1794                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1795         }
1796
1797 };
1798
1799 /*
1800  *      probe - binds to the platform device
1801  */
1802 static int s3c2410_udc_probe(struct platform_device *pdev)
1803 {
1804         struct s3c2410_udc *udc = &memory;
1805         struct device *dev = &pdev->dev;
1806         int retval;
1807         int irq;
1808
1809         dev_dbg(dev, "%s()\n", __func__);
1810
1811         usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1812         if (IS_ERR(usb_bus_clock)) {
1813                 dev_err(dev, "failed to get usb bus clock source\n");
1814                 return PTR_ERR(usb_bus_clock);
1815         }
1816
1817         clk_enable(usb_bus_clock);
1818
1819         udc_clock = clk_get(NULL, "usb-device");
1820         if (IS_ERR(udc_clock)) {
1821                 dev_err(dev, "failed to get udc clock source\n");
1822                 return PTR_ERR(udc_clock);
1823         }
1824
1825         clk_enable(udc_clock);
1826
1827         mdelay(10);
1828
1829         dev_dbg(dev, "got and enabled clocks\n");
1830
1831         if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1832                 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1833                 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1834                 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1835                 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1836                 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1837         }
1838
1839         spin_lock_init (&udc->lock);
1840         udc_info = pdev->dev.platform_data;
1841
1842         rsrc_start = S3C2410_PA_USBDEV;
1843         rsrc_len   = S3C24XX_SZ_USBDEV;
1844
1845         if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1846                 return -EBUSY;
1847
1848         base_addr = ioremap(rsrc_start, rsrc_len);
1849         if (!base_addr) {
1850                 retval = -ENOMEM;
1851                 goto err_mem;
1852         }
1853
1854         device_initialize(&udc->gadget.dev);
1855         udc->gadget.dev.parent = &pdev->dev;
1856         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1857
1858         the_controller = udc;
1859         platform_set_drvdata(pdev, udc);
1860
1861         s3c2410_udc_disable(udc);
1862         s3c2410_udc_reinit(udc);
1863
1864         /* irq setup after old hardware state is cleaned up */
1865         retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1866                              IRQF_DISABLED, gadget_name, udc);
1867
1868         if (retval != 0) {
1869                 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1870                 retval = -EBUSY;
1871                 goto err_map;
1872         }
1873
1874         dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1875
1876         if (udc_info && udc_info->vbus_pin > 0) {
1877                 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1878                 if (retval < 0) {
1879                         dev_err(dev, "cannot claim vbus pin\n");
1880                         goto err_int;
1881                 }
1882
1883                 irq = gpio_to_irq(udc_info->vbus_pin);
1884                 if (irq < 0) {
1885                         dev_err(dev, "no irq for gpio vbus pin\n");
1886                         goto err_gpio_claim;
1887                 }
1888
1889                 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1890                                      IRQF_DISABLED | IRQF_TRIGGER_RISING
1891                                      | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1892                                      gadget_name, udc);
1893
1894                 if (retval != 0) {
1895                         dev_err(dev, "can't get vbus irq %d, err %d\n",
1896                                 irq, retval);
1897                         retval = -EBUSY;
1898                         goto err_gpio_claim;
1899                 }
1900
1901                 dev_dbg(dev, "got irq %i\n", irq);
1902         } else {
1903                 udc->vbus = 1;
1904         }
1905
1906         if (s3c2410_udc_debugfs_root) {
1907                 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1908                                 s3c2410_udc_debugfs_root,
1909                                 udc, &s3c2410_udc_debugfs_fops);
1910                 if (!udc->regs_info)
1911                         dev_warn(dev, "debugfs file creation failed\n");
1912         }
1913
1914         dev_dbg(dev, "probe ok\n");
1915
1916         return 0;
1917
1918 err_gpio_claim:
1919         if (udc_info && udc_info->vbus_pin > 0)
1920                 gpio_free(udc_info->vbus_pin);
1921 err_int:
1922         free_irq(IRQ_USBD, udc);
1923 err_map:
1924         iounmap(base_addr);
1925 err_mem:
1926         release_mem_region(rsrc_start, rsrc_len);
1927
1928         return retval;
1929 }
1930
1931 /*
1932  *      s3c2410_udc_remove
1933  */
1934 static int s3c2410_udc_remove(struct platform_device *pdev)
1935 {
1936         struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1937         unsigned int irq;
1938
1939         dev_dbg(&pdev->dev, "%s()\n", __func__);
1940         if (udc->driver)
1941                 return -EBUSY;
1942
1943         debugfs_remove(udc->regs_info);
1944
1945         if (udc_info && udc_info->vbus_pin > 0) {
1946                 irq = gpio_to_irq(udc_info->vbus_pin);
1947                 free_irq(irq, udc);
1948         }
1949
1950         free_irq(IRQ_USBD, udc);
1951
1952         iounmap(base_addr);
1953         release_mem_region(rsrc_start, rsrc_len);
1954
1955         platform_set_drvdata(pdev, NULL);
1956
1957         if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1958                 clk_disable(udc_clock);
1959                 clk_put(udc_clock);
1960                 udc_clock = NULL;
1961         }
1962
1963         if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1964                 clk_disable(usb_bus_clock);
1965                 clk_put(usb_bus_clock);
1966                 usb_bus_clock = NULL;
1967         }
1968
1969         dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1970         return 0;
1971 }
1972
1973 #ifdef CONFIG_PM
1974 static int s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1975 {
1976         if (udc_info && udc_info->udc_command)
1977                 udc_info->udc_command(S3C2410_UDC_P_DISABLE);
1978
1979         return 0;
1980 }
1981
1982 static int s3c2410_udc_resume(struct platform_device *pdev)
1983 {
1984         if (udc_info && udc_info->udc_command)
1985                 udc_info->udc_command(S3C2410_UDC_P_ENABLE);
1986
1987         return 0;
1988 }
1989 #else
1990 #define s3c2410_udc_suspend     NULL
1991 #define s3c2410_udc_resume      NULL
1992 #endif
1993
1994 static struct platform_driver udc_driver_2410 = {
1995         .driver         = {
1996                 .name   = "s3c2410-usbgadget",
1997                 .owner  = THIS_MODULE,
1998         },
1999         .probe          = s3c2410_udc_probe,
2000         .remove         = s3c2410_udc_remove,
2001         .suspend        = s3c2410_udc_suspend,
2002         .resume         = s3c2410_udc_resume,
2003 };
2004
2005 static struct platform_driver udc_driver_2440 = {
2006         .driver         = {
2007                 .name   = "s3c2440-usbgadget",
2008                 .owner  = THIS_MODULE,
2009         },
2010         .probe          = s3c2410_udc_probe,
2011         .remove         = s3c2410_udc_remove,
2012         .suspend        = s3c2410_udc_suspend,
2013         .resume         = s3c2410_udc_resume,
2014 };
2015
2016 static int __init udc_init(void)
2017 {
2018         int retval;
2019
2020         dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2021
2022         s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2023         if (IS_ERR(s3c2410_udc_debugfs_root)) {
2024                 printk(KERN_ERR "%s: debugfs dir creation failed %ld\n",
2025                         gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2026                 s3c2410_udc_debugfs_root = NULL;
2027         }
2028
2029         retval = platform_driver_register(&udc_driver_2410);
2030         if (retval)
2031                 goto err;
2032
2033         retval = platform_driver_register(&udc_driver_2440);
2034         if (retval)
2035                 goto err;
2036
2037         return 0;
2038
2039 err:
2040         debugfs_remove(s3c2410_udc_debugfs_root);
2041         return retval;
2042 }
2043
2044 static void __exit udc_exit(void)
2045 {
2046         platform_driver_unregister(&udc_driver_2410);
2047         platform_driver_unregister(&udc_driver_2440);
2048         debugfs_remove(s3c2410_udc_debugfs_root);
2049 }
2050
2051 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2052 EXPORT_SYMBOL(usb_gadget_register_driver);
2053
2054 module_init(udc_init);
2055 module_exit(udc_exit);
2056
2057 MODULE_AUTHOR(DRIVER_AUTHOR);
2058 MODULE_DESCRIPTION(DRIVER_DESC);
2059 MODULE_VERSION(DRIVER_VERSION);
2060 MODULE_LICENSE("GPL");
2061 MODULE_ALIAS("platform:s3c2410-usbgadget");
2062 MODULE_ALIAS("platform:s3c2440-usbgadget");