upload tizen1.0 source
[kernel/linux-2.6.36.git] / drivers / media / video / s5p-mfc / s5p_mfc_enc.c
1 /*
2  * linux/drivers/media/video/s5p-mfc/s5p_mfc_enc.c
3  *
4  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5  *              http://www.samsung.com/
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/io.h>
14 #include <linux/sched.h>
15 #include <linux/clk.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/platform_device.h>
19 #include <linux/version.h>
20 #include <linux/workqueue.h>
21 #include <linux/videodev2.h>
22 #include <media/videobuf2-core.h>
23
24 #include "regs-mfc.h"
25
26 #include "s5p_mfc_opr.h"
27 #include "s5p_mfc_intr.h"
28 #include "s5p_mfc_mem.h"
29 #include "s5p_mfc_debug.h"
30 #include "s5p_mfc_reg.h"
31 #include "s5p_mfc_enc.h"
32 #include "s5p_mfc_common.h"
33
34 #define DEF_SRC_FMT     1
35 #define DEF_DST_FMT     2
36
37 static struct s5p_mfc_fmt formats[] = {
38         {
39                 .name = "4:2:0 2 Planes 64x32 Tiles",
40                 .fourcc = V4L2_PIX_FMT_NV12MT,
41                 .codec_mode = MFC_FORMATS_NO_CODEC,
42                 .type = MFC_FMT_RAW,
43                 .num_planes = 2,
44         },
45         {
46                 .name = "4:2:0 2 Planes",
47                 .fourcc = V4L2_PIX_FMT_NV12M,
48                 .codec_mode = MFC_FORMATS_NO_CODEC,
49                 .type = MFC_FMT_RAW,
50                 .num_planes = 2,
51         },
52         {
53                 .name = "H264 Encoded Stream",
54                 .fourcc = V4L2_PIX_FMT_H264,
55                 .codec_mode = S5P_FIMV_CODEC_H264_ENC,
56                 .type = MFC_FMT_ENC,
57                 .num_planes = 1,
58         },
59         {
60                 .name = "MPEG4 Encoded Stream",
61                 .fourcc = V4L2_PIX_FMT_MPEG4,
62                 .codec_mode = S5P_FIMV_CODEC_MPEG4_ENC,
63                 .type = MFC_FMT_ENC,
64                 .num_planes = 1,
65         },
66         {
67                 .name = "H264 Encoded Stream",
68                 .fourcc = V4L2_PIX_FMT_H263,
69                 .codec_mode = S5P_FIMV_CODEC_H263_ENC,
70                 .type = MFC_FMT_ENC,
71                 .num_planes = 1,
72         },
73 };
74
75 #define NUM_FORMATS ARRAY_SIZE(formats)
76
77 static struct s5p_mfc_fmt *find_format(struct v4l2_format *f, unsigned int t)
78 {
79         unsigned int i;
80
81         for (i = 0; i < NUM_FORMATS; i++) {
82                 if (formats[i].fourcc == f->fmt.pix_mp.pixelformat &&
83                     formats[i].type == t)
84                         return (struct s5p_mfc_fmt *)&formats[i];
85         }
86
87         return NULL;
88 }
89
90 static struct v4l2_queryctrl controls[] = {
91         {
92                 .id = V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE,
93                 .type = V4L2_CTRL_TYPE_INTEGER,
94                 .name = "The period of intra frame",
95                 .minimum = 0,
96                 .maximum = (1 << 16) - 1,
97                 .step = 1,
98                 .default_value = 0,
99         },
100         {
101                 .id = V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MODE,
102                 .type = V4L2_CTRL_TYPE_INTEGER,
103                 .name = "The slice partitioning method",
104                 .minimum = 0,
105                 .maximum = 3,
106                 .step = 1,
107                 .default_value = 0,
108         },
109         {
110                 .id = V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MB,
111                 .type = V4L2_CTRL_TYPE_INTEGER,
112                 .name = "The number of MB in a slice",
113                 .minimum = 1,
114                 .maximum = (1 << 16) - 1,
115                 .step = 1,
116                 .default_value = 1,
117         },
118         {
119                 .id = V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_BIT,
120                 .type = V4L2_CTRL_TYPE_INTEGER,
121                 .name = "The maximum bits per slices",
122                 .minimum = 1900,
123                 .maximum = (1 << 30) - 1,
124                 .step = 1,
125                 .default_value = 1900,
126         },
127         {
128                 .id = V4L2_CID_CODEC_MFC5X_ENC_INTRA_REFRESH_MB,
129                 .type = V4L2_CTRL_TYPE_INTEGER,
130                 .name = "The number of intra refresh MBs",
131                 .minimum = 0,
132                 .maximum = (1 << 16) - 1,
133                 .step = 1,
134                 .default_value = 0,
135         },
136         {
137                 .id = V4L2_CID_CODEC_MFC5X_ENC_PAD_CTRL_ENABLE,
138                 .type = V4L2_CTRL_TYPE_BOOLEAN,
139                 .name = "Padding control enable",
140                 .minimum = 0,
141                 .maximum = 1,
142                 .step = 1,
143                 .default_value = 0,
144         },
145         {
146                 .id = V4L2_CID_CODEC_MFC5X_ENC_PAD_LUMA_VALUE,
147                 .type = V4L2_CTRL_TYPE_INTEGER,
148                 .name = "Y image's padding value",
149                 .minimum = 0,
150                 .maximum = 255,
151                 .step = 1,
152                 .default_value = 0,
153         },
154         {
155                 .id = V4L2_CID_CODEC_MFC5X_ENC_PAD_CB_VALUE,
156                 .type = V4L2_CTRL_TYPE_INTEGER,
157                 .name = "Cb image's padding value",
158                 .minimum = 0,
159                 .maximum = 255,
160                 .step = 1,
161                 .default_value = 0,
162         },
163         {
164                 .id = V4L2_CID_CODEC_MFC5X_ENC_PAD_CR_VALUE,
165                 .type = V4L2_CTRL_TYPE_INTEGER,
166                 .name = "Cr image's padding value",
167                 .minimum = 0,
168                 .maximum = 255,
169                 .step = 1,
170                 .default_value = 0,
171         },
172         {
173                 .id = V4L2_CID_CODEC_MFC5X_ENC_RC_FRAME_ENABLE,
174                 .type = V4L2_CTRL_TYPE_BOOLEAN,
175                 .name = "Frame level rate control enable",
176                 .minimum = 0,
177                 .maximum = 1,
178                 .step = 1,
179                 .default_value = 0,
180         },
181         {
182                 .id = V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE,
183                 .type = V4L2_CTRL_TYPE_INTEGER,
184                 .name = "Target bit rate rate-control",
185                 .minimum = 1,
186                 .maximum = (1 << 30) - 1,
187                 .step = 1,
188                 .default_value = 1,
189         },
190         {
191                 .id = V4L2_CID_CODEC_MFC5X_ENC_RC_REACTION_COEFF,
192                 .type = V4L2_CTRL_TYPE_INTEGER,
193                 .name = "Rate control reaction coeff.",
194                 .minimum = 1,
195                 .maximum = (1 << 16) - 1,
196                 .step = 1,
197                 .default_value = 1,
198         },
199         {
200                 .id = V4L2_CID_CODEC_MFC5X_ENC_STREAM_SIZE,
201                 .type = V4L2_CTRL_TYPE_INTEGER,
202                 .name = "Encoded stream size",
203                 .minimum = 0,
204                 .maximum = (1 << 30) - 1,
205                 .step = 1,
206                 .default_value = 0,
207                 .flags = V4L2_CTRL_FLAG_READ_ONLY,
208         },
209         {
210                 .id = V4L2_CID_CODEC_MFC5X_ENC_FRAME_COUNT,
211                 .type = V4L2_CTRL_TYPE_INTEGER,
212                 .name = "Encoded frame count",
213                 .minimum = 0,
214                 .maximum = (1 << 30) - 1,
215                 .step = 1,
216                 .default_value = 0,
217                 .flags = V4L2_CTRL_FLAG_READ_ONLY,
218         },
219         {
220                 .id = V4L2_CID_CODEC_MFC5X_ENC_FRAME_TYPE,
221                 .type = V4L2_CTRL_TYPE_INTEGER,
222                 .name = "Encoded frame type",
223                 .minimum = 0,
224                 .maximum = 5,
225                 .step = 1,
226                 .default_value = 0,
227                 .flags = V4L2_CTRL_FLAG_READ_ONLY,
228         },
229         {
230                 .id = V4L2_CID_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE,
231                 .type = V4L2_CTRL_TYPE_INTEGER,
232                 .name = "Force frame type",
233                 .minimum = 1,
234                 .maximum = 2,
235                 .step = 1,
236                 .default_value = 1,
237         },
238         {
239                 .id = V4L2_CID_CODEC_MFC5X_ENC_VBV_BUF_SIZE,
240                 .type = V4L2_CTRL_TYPE_INTEGER,
241                 .name = "VBV buffer size (1Kbits)",
242                 .minimum = 0,
243                 .maximum = (1 << 16) - 1,
244                 .step = 1,
245                 .default_value = 0,
246         },
247         {
248                 .id = V4L2_CID_CODEC_MFC5X_ENC_SEQ_HDR_MODE,
249                 .type = V4L2_CTRL_TYPE_INTEGER,
250                 .name = "Sequence header mode",
251                 .minimum = 0,
252                 .maximum = 1,
253                 .step = 1,
254                 .default_value = 0,
255         },
256         {
257                 .id = V4L2_CID_CODEC_MFC5X_ENC_FRAME_SKIP_MODE,
258                 .type = V4L2_CTRL_TYPE_INTEGER,
259                 .name = "Frame skip enable",
260                 .minimum = 0,
261                 .maximum = 2,
262                 .step = 1,
263                 .default_value = 0,
264         },
265         {
266                 .id = V4L2_CID_CODEC_MFC5X_ENC_RC_FIXED_TARGET_BIT,
267                 .type = V4L2_CTRL_TYPE_BOOLEAN,
268                 .name = "Fixed target bit enable",
269                 .minimum = 0,
270                 .maximum = 1,
271                 .step = 1,
272                 .default_value = 0,
273         },
274         {
275                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_B_FRAMES,
276                 .type = V4L2_CTRL_TYPE_INTEGER,
277                 .name = "The number of B frames",
278                 .minimum = 0,
279                 .maximum = 2,
280                 .step = 1,
281                 .default_value = 0,
282         },
283         {
284                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_PROFILE,
285                 .type = V4L2_CTRL_TYPE_INTEGER,
286                 .name = "H264 profile",
287                 .minimum = 0,
288                 .maximum = 2,
289                 .step = 1,
290                 .default_value = 0,
291         },
292         {
293                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_LEVEL,
294                 .type = V4L2_CTRL_TYPE_INTEGER,
295                 .name = "H264 level",
296                 .minimum = 9,
297                 .maximum = 40,
298                 .step = 1,
299                 .default_value = 9,
300         },
301         {
302                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_INTERLACE,
303                 .type = V4L2_CTRL_TYPE_BOOLEAN,
304                 .name = "H264 interface mode",
305                 .minimum = 0,
306                 .maximum = 1,
307                 .step = 1,
308                 .default_value = 0,
309         },
310         {
311                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_MODE,
312                 .type = V4L2_CTRL_TYPE_INTEGER,
313                 .name = "H264 loop filter mode",
314                 .minimum = 0,
315                 .maximum = 2,
316                 .step = 1,
317                 .default_value = 0,
318         },
319         {
320                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ALPHA,
321                 .type = V4L2_CTRL_TYPE_INTEGER,
322                 .name = "H264 loop filter alpha offset",
323                 .minimum = -6,
324                 .maximum = 6,
325                 .step = 1,
326                 .default_value = 0,
327         },
328         {
329                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_BETA,
330                 .type = V4L2_CTRL_TYPE_INTEGER,
331                 .name = "H264 loop filter beta offset",
332                 .minimum = -6,
333                 .maximum = 6,
334                 .step = 1,
335                 .default_value = 0,
336         },
337         {
338                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_ENTROPY_MODE,
339                 .type = V4L2_CTRL_TYPE_INTEGER,
340                 .name = "H264 entorpy mode",
341                 .minimum = 0,
342                 .maximum = 1,
343                 .step = 1,
344                 .default_value = 0,
345         },
346         {
347                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_MAX_REF_PIC,
348                 .type = V4L2_CTRL_TYPE_INTEGER,
349                 .name = "The max number of ref. picture",
350                 .minimum = 1,
351                 .maximum = 2,
352                 .step = 1,
353                 .default_value = 2,
354         },
355         {
356                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_NUM_REF_PIC_4P,
357                 .type = V4L2_CTRL_TYPE_INTEGER,
358                 .name = "The number of ref. picture of P",
359                 .minimum = 1,
360                 .maximum = 2,
361                 .step = 1,
362                 .default_value = 1,
363         },
364         {
365                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_8X8_TRANSFORM,
366                 .type = V4L2_CTRL_TYPE_BOOLEAN,
367                 .name = "H264 8x8 transform enable",
368                 .minimum = 0,
369                 .maximum = 1,
370                 .step = 1,
371                 .default_value = 0,
372         },
373         {
374                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ENABLE,
375                 .type = V4L2_CTRL_TYPE_BOOLEAN,
376                 .name = "H264 MB level rate control",
377                 .minimum = 0,
378                 .maximum = 1,
379                 .step = 1,
380                 .default_value = 0,
381         },
382         {
383                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE,
384                 .type = V4L2_CTRL_TYPE_INTEGER,
385                 .name = "Frame rate",
386                 .minimum = 1,
387                 .maximum = (1 << 30) - 1,
388                 .step = 1,
389                 .default_value = 1,
390         },
391         {
392                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_QP,
393                 .type = V4L2_CTRL_TYPE_INTEGER,
394                 .name = "Frame QP value",
395                 .minimum = 0,
396                 .maximum = 51,
397                 .step = 1,
398                 .default_value = 1,
399         },
400         {
401                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MIN_QP,
402                 .type = V4L2_CTRL_TYPE_INTEGER,
403                 .name = "Minimum QP value",
404                 .minimum = 0,
405                 .maximum = 51,
406                 .step = 1,
407                 .default_value = 1,
408         },
409         {
410                 /* FIXME: MAX_QP must be greater than or equal to MIN_QP */
411                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MAX_QP,
412                 .type = V4L2_CTRL_TYPE_INTEGER,
413                 .name = "Maximum QP value",
414                 .minimum = 0,
415                 .maximum = 51,
416                 .step = 1,
417                 .default_value = 1,
418         },
419         {
420                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_DARK,
421                 .type = V4L2_CTRL_TYPE_BOOLEAN,
422                 .name = "H264 dark region adaptive",
423                 .minimum = 0,
424                 .maximum = 1,
425                 .step = 1,
426                 .default_value = 0,
427         },
428         {
429                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_SMOOTH,
430                 .type = V4L2_CTRL_TYPE_BOOLEAN,
431                 .name = "H264 smooth region adaptive",
432                 .minimum = 0,
433                 .maximum = 1,
434                 .step = 1,
435                 .default_value = 0,
436         },
437         {
438                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_STATIC,
439                 .type = V4L2_CTRL_TYPE_BOOLEAN,
440                 .name = "H264 static region adaptive",
441                 .minimum = 0,
442                 .maximum = 1,
443                 .step = 1,
444                 .default_value = 0,
445         },
446         {
447                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ACTIVITY,
448                 .type = V4L2_CTRL_TYPE_BOOLEAN,
449                 .name = "H264 MB activity adaptive",
450                 .minimum = 0,
451                 .maximum = 1,
452                 .step = 1,
453                 .default_value = 0,
454         },
455         {
456                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_P_FRAME_QP,
457                 .type = V4L2_CTRL_TYPE_INTEGER,
458                 .name = "P frame QP value",
459                 .minimum = 0,
460                 .maximum = 51,
461                 .step = 1,
462                 .default_value = 1,
463         },
464         {
465                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_RC_B_FRAME_QP,
466                 .type = V4L2_CTRL_TYPE_INTEGER,
467                 .name = "B frame QP value",
468                 .minimum = 0,
469                 .maximum = 51,
470                 .step = 1,
471                 .default_value = 1,
472         },
473         {
474                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_ENABLE,
475                 .type = V4L2_CTRL_TYPE_BOOLEAN,
476                 .name = "Aspect ratio VUI enable",
477                 .minimum = 0,
478                 .maximum = 1,
479                 .step = 1,
480                 .default_value = 0,
481         },
482         {
483                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_IDC,
484                 .type = V4L2_CTRL_TYPE_INTEGER,
485                 .name = "VUI aspect ratio IDC",
486                 .minimum = 0,
487                 .maximum = 255,
488                 .step = 1,
489                 .default_value = 0,
490         },
491         {
492                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_WIDTH,
493                 .type = V4L2_CTRL_TYPE_INTEGER,
494                 .name = "Horizontal size of SAR",
495                 .minimum = 0,
496                 .maximum = (1 << 16) - 1,
497                 .step = 1,
498                 .default_value = 0,
499         },
500         {
501                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_HEIGHT,
502                 .type = V4L2_CTRL_TYPE_INTEGER,
503                 .name = "Vertical size of SAR",
504                 .minimum = 0,
505                 .maximum = (1 << 16) - 1,
506                 .step = 1,
507                 .default_value = 0,
508         },
509         {
510                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_OPEN_GOP,
511                 .type = V4L2_CTRL_TYPE_BOOLEAN,
512                 .name = "Open GOP enable (I-picture)",
513                 .minimum = 0,
514                 .maximum = 1,
515                 .step = 1,
516                 .default_value = 0,
517         },
518         {
519                 .id = V4L2_CID_CODEC_MFC5X_ENC_H264_I_PERIOD,
520                 .type = V4L2_CTRL_TYPE_INTEGER,
521                 .name = "H264 I period",
522                 .minimum = 0,
523                 .maximum = (1 << 16) - 1,
524                 .step = 1,
525                 .default_value = 0,
526         },
527         {
528                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_B_FRAMES,
529                 .type = V4L2_CTRL_TYPE_INTEGER,
530                 .name = "The number of B frames",
531                 .minimum = 0,
532                 .maximum = 2,
533                 .step = 1,
534                 .default_value = 0,
535         },
536         {
537                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_PROFILE,
538                 .type = V4L2_CTRL_TYPE_INTEGER,
539                 .name = "MPEG4 profile",
540                 .minimum = 0,
541                 .maximum = 1,
542                 .step = 1,
543                 .default_value = 0,
544         },
545         {
546                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_LEVEL,
547                 .type = V4L2_CTRL_TYPE_INTEGER,
548                 .name = "MPEG4 level",
549                 .minimum = 0,
550                 .maximum = (1 << 16) - 1,
551                 .step = 1,
552                 .default_value = 0,
553         },
554         {
555                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_FRAME_QP,
556                 .type = V4L2_CTRL_TYPE_INTEGER,
557                 .name = "Frame QP value",
558                 .minimum = 1,
559                 .maximum = 31,
560                 .step = 1,
561                 .default_value = 1,
562         },
563         {
564                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MIN_QP,
565                 .type = V4L2_CTRL_TYPE_INTEGER,
566                 .name = "Minimum QP value",
567                 .minimum = 1,
568                 .maximum = 31,
569                 .step = 1,
570                 .default_value = 1,
571         },
572         {
573                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MAX_QP,
574                 .type = V4L2_CTRL_TYPE_INTEGER,
575                 .name = "Minimum QP value",
576                 .minimum = 1,
577                 .maximum = 31,
578                 .step = 1,
579                 .default_value = 1,
580         },
581         {
582                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_QUARTER_PIXEL,
583                 .type = V4L2_CTRL_TYPE_BOOLEAN,
584                 .name = "Quarter pixel search enable",
585                 .minimum = 0,
586                 .maximum = 1,
587                 .step = 1,
588                 .default_value = 0,
589         },
590         {
591                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_P_FRAME_QP,
592                 .type = V4L2_CTRL_TYPE_INTEGER,
593                 .name = "P frame QP value",
594                 .minimum = 1,
595                 .maximum = 31,
596                 .step = 1,
597                 .default_value = 1,
598         },
599         {
600                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_B_FRAME_QP,
601                 .type = V4L2_CTRL_TYPE_INTEGER,
602                 .name = "B frame QP value",
603                 .minimum = 1,
604                 .maximum = 31,
605                 .step = 1,
606                 .default_value = 1,
607         },
608         {
609                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_TIME_RES,
610                 .type = V4L2_CTRL_TYPE_INTEGER,
611                 .name = "MPEG4 vop time resolution",
612                 .minimum = 0,
613                 .maximum = (1 << 15) - 1,
614                 .step = 1,
615                 .default_value = 0,
616         },
617         {
618                 .id = V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_FRM_DELTA,
619                 .type = V4L2_CTRL_TYPE_INTEGER,
620                 .name = "MPEG4 frame delta",
621                 .minimum = 1,
622                 .maximum = (1 << 16) - 1,
623                 .step = 1,
624                 .default_value = 1,
625         },
626         {
627                 .id = V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_RATE,
628                 .type = V4L2_CTRL_TYPE_INTEGER,
629                 .name = "Frame rate",
630                 .minimum = 1,
631                 .maximum = (1 << 30) - 1,
632                 .step = 1,
633                 .default_value = 1,
634         },
635         {
636                 .id = V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_QP,
637                 .type = V4L2_CTRL_TYPE_INTEGER,
638                 .name = "Frame QP value",
639                 .minimum = 1,
640                 .maximum = 31,
641                 .step = 1,
642                 .default_value = 1,
643         },
644         {
645                 .id = V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MIN_QP,
646                 .type = V4L2_CTRL_TYPE_INTEGER,
647                 .name = "Minimum QP value",
648                 .minimum = 1,
649                 .maximum = 31,
650                 .step = 1,
651                 .default_value = 1,
652         },
653         {
654                 .id = V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MAX_QP,
655                 .type = V4L2_CTRL_TYPE_INTEGER,
656                 .name = "Minimum QP value",
657                 .minimum = 1,
658                 .maximum = 31,
659                 .step = 1,
660                 .default_value = 1,
661         },
662         {
663                 .id = V4L2_CID_CODEC_MFC5X_ENC_H263_RC_P_FRAME_QP,
664                 .type = V4L2_CTRL_TYPE_INTEGER,
665                 .name = "P frame QP value",
666                 .minimum = 1,
667                 .maximum = 31,
668                 .step = 1,
669                 .default_value = 1,
670         },
671 };
672
673 #define NUM_CTRLS ARRAY_SIZE(controls)
674
675 static struct v4l2_queryctrl *get_ctrl(int id)
676 {
677         int i;
678
679         for (i = 0; i < NUM_CTRLS; ++i)
680                 if (id == controls[i].id)
681                         return &controls[i];
682         return NULL;
683 }
684
685 static int check_ctrl_val(struct s5p_mfc_ctx *ctx, struct v4l2_control *ctrl)
686 {
687         struct s5p_mfc_dev *dev = ctx->dev;
688         struct v4l2_queryctrl *c;
689
690         c = get_ctrl(ctrl->id);
691         if (!c)
692                 return -EINVAL;
693         if (ctrl->value < c->minimum || ctrl->value > c->maximum
694             || (c->step != 0 && ctrl->value % c->step != 0)) {
695                 v4l2_err(&dev->v4l2_dev, "Invalid control value\n");
696                 return -ERANGE;
697         }
698         return 0;
699 }
700
701 static int s5p_mfc_ctx_ready(struct s5p_mfc_ctx *ctx)
702 {
703         mfc_debug(2, "src=%d, dst=%d, state=%d\n",
704                   ctx->src_queue_cnt, ctx->dst_queue_cnt, ctx->state);
705
706         /* context is ready to make header */
707         if (ctx->state == MFCINST_GOT_INST && ctx->dst_queue_cnt >= 1)
708                 return 1;
709         /* context is ready to encode a frame */
710         if (ctx->state == MFCINST_RUNNING &&
711                 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
712                 return 1;
713         /* context is ready to encode remain frames */
714         if (ctx->state == MFCINST_FINISHING &&
715                 ctx->src_queue_cnt >= 1 && ctx->dst_queue_cnt >= 1)
716                 return 1;
717
718         mfc_debug(2, "ctx is not ready.\n");
719
720         return 0;
721 }
722
723 static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
724 {
725         struct s5p_mfc_buf *mb_entry;
726         unsigned long mb_y_addr, mb_c_addr;
727
728         /* move buffers in ref queue to src queue */
729         while (!list_empty(&ctx->ref_queue)) {
730                 mb_entry = list_entry((&ctx->ref_queue)->next, struct s5p_mfc_buf, list);
731
732                 mb_y_addr = mfc_plane_cookie(mb_entry->b, 0);
733                 mb_c_addr = mfc_plane_cookie(mb_entry->b, 1);
734
735                 mfc_debug(2, "enc ref y addr: 0x%08lx", mb_y_addr);
736                 mfc_debug(2, "enc ref c addr: 0x%08lx", mb_c_addr);
737
738                 list_del(&mb_entry->list);
739                 ctx->ref_queue_cnt--;
740
741                 list_add_tail(&mb_entry->list, &ctx->src_queue);
742                 ctx->src_queue_cnt++;
743         }
744
745         mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
746                   ctx->src_queue_cnt, ctx->ref_queue_cnt);
747
748         INIT_LIST_HEAD(&ctx->ref_queue);
749         ctx->ref_queue_cnt = 0;
750 }
751
752 static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
753 {
754         struct s5p_mfc_dev *dev = ctx->dev;
755         struct s5p_mfc_buf *dst_mb;
756         unsigned long dst_addr;
757         unsigned int dst_size;
758         unsigned long flags;
759
760         spin_lock_irqsave(&dev->irqlock, flags);
761
762         dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
763         dst_addr = mfc_plane_cookie(dst_mb->b, 0);
764         dst_size = vb2_plane_size(dst_mb->b, 0);
765         s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
766
767         spin_unlock_irqrestore(&dev->irqlock, flags);
768
769         return 0;
770 }
771
772 static int enc_post_seq_start(struct s5p_mfc_ctx *ctx)
773 {
774         struct s5p_mfc_dev *dev = ctx->dev;
775         struct s5p_mfc_enc_params *p = &ctx->enc_params;
776         struct s5p_mfc_buf *dst_mb;
777         unsigned long flags;
778
779         mfc_debug(2, "seq header size: %d", s5p_mfc_get_enc_strm_size());
780
781         if (p->seq_hdr_mode == V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ) {
782                 spin_lock_irqsave(&dev->irqlock, flags);
783
784                 dst_mb = list_entry(ctx->dst_queue.next,
785                                 struct s5p_mfc_buf, list);
786                 list_del(&dst_mb->list);
787                 ctx->dst_queue_cnt--;
788
789                 vb2_set_plane_payload(dst_mb->b, 0, s5p_mfc_get_enc_strm_size());
790                 vb2_buffer_done(dst_mb->b, VB2_BUF_STATE_DONE);
791
792                 spin_unlock_irqrestore(&dev->irqlock, flags);
793         }
794
795         ctx->state = MFCINST_RUNNING;
796
797         if (s5p_mfc_ctx_ready(ctx)) {
798                 spin_lock_irqsave(&dev->condlock, flags);
799                 set_bit(ctx->num, &dev->ctx_work_bits);
800                 spin_unlock_irqrestore(&dev->condlock, flags);
801         }
802
803         s5p_mfc_try_run(dev);
804
805         return 0;
806 }
807
808 static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
809 {
810         struct s5p_mfc_dev *dev = ctx->dev;
811         struct s5p_mfc_buf *dst_mb;
812         struct s5p_mfc_buf *src_mb;
813         unsigned long flags;
814         unsigned long src_y_addr, src_c_addr, dst_addr;
815         unsigned int dst_size;
816
817         spin_lock_irqsave(&dev->irqlock, flags);
818
819         src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
820         src_y_addr = mfc_plane_cookie(src_mb->b, 0);
821         src_c_addr = mfc_plane_cookie(src_mb->b, 1);
822         s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
823
824         spin_unlock_irqrestore(&dev->irqlock, flags);
825
826         mfc_debug(2, "enc src y addr: 0x%08lx", src_y_addr);
827         mfc_debug(2, "enc src c addr: 0x%08lx", src_c_addr);
828
829         spin_lock_irqsave(&dev->irqlock, flags);
830
831         dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
832         dst_addr = mfc_plane_cookie(dst_mb->b, 0);
833         dst_size = vb2_plane_size(dst_mb->b, 0);
834         s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
835
836         spin_unlock_irqrestore(&dev->irqlock, flags);
837
838         mfc_debug(2, "enc dst addr: 0x%08lx", dst_addr);
839
840         return 0;
841 }
842
843 static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
844 {
845         struct s5p_mfc_dev *dev = ctx->dev;
846         struct s5p_mfc_buf *mb_entry;
847         unsigned long enc_y_addr, enc_c_addr;
848         unsigned long mb_y_addr, mb_c_addr;
849         int slice_type;
850         unsigned int strm_size;
851         unsigned long flags;
852
853         slice_type = s5p_mfc_get_enc_slice_type();
854         strm_size = s5p_mfc_get_enc_strm_size();
855
856         mfc_debug(2, "encoded slice type: %d", slice_type);
857         mfc_debug(2, "encoded stream size: %d", strm_size);
858         mfc_debug(2, "display order: %d",
859                   s5p_mfc_read_reg(S5P_FIMV_ENC_SI_PIC_CNT));
860
861         /* FIXME: set it to dest buffer not context */
862         /* set encoded frame type */
863         ctx->frame_type = slice_type;
864
865         spin_lock_irqsave(&dev->irqlock, flags);
866
867         if (slice_type >= 0) {
868                 s5p_mfc_get_enc_frame_buffer(ctx, &enc_y_addr, &enc_c_addr);
869
870                 mfc_debug(2, "encoded y addr: 0x%08lx", enc_y_addr);
871                 mfc_debug(2, "encoded c addr: 0x%08lx", enc_c_addr);
872
873                 list_for_each_entry(mb_entry, &ctx->src_queue, list) {
874                         mb_y_addr = mfc_plane_cookie(mb_entry->b, 0);
875                         mb_c_addr = mfc_plane_cookie(mb_entry->b, 1);
876
877                         mfc_debug(2, "enc src y addr: 0x%08lx", mb_y_addr);
878                         mfc_debug(2, "enc src c addr: 0x%08lx", mb_c_addr);
879
880                         if ((enc_y_addr == mb_y_addr) && (enc_c_addr == mb_c_addr)) {
881                                 list_del(&mb_entry->list);
882                                 ctx->src_queue_cnt--;
883
884                                 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
885                                 break;
886                         }
887                 }
888
889                 list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
890                         mb_y_addr = mfc_plane_cookie(mb_entry->b, 0);
891                         mb_c_addr = mfc_plane_cookie(mb_entry->b, 1);
892
893                         mfc_debug(2, "enc ref y addr: 0x%08lx", mb_y_addr);
894                         mfc_debug(2, "enc ref c addr: 0x%08lx", mb_c_addr);
895
896                         if ((enc_y_addr == mb_y_addr) && (enc_c_addr == mb_c_addr)) {
897                                 list_del(&mb_entry->list);
898                                 ctx->ref_queue_cnt--;
899
900                                 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
901                                 break;
902                         }
903                 }
904         }
905
906         if ((ctx->src_queue_cnt > 0) && (ctx->state == MFCINST_RUNNING)) {
907                 mb_entry = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
908
909                 if (mb_entry->used) {
910                         list_del(&mb_entry->list);
911                         ctx->src_queue_cnt--;
912
913                         list_add_tail(&mb_entry->list, &ctx->ref_queue);
914                         ctx->ref_queue_cnt++;
915                 }
916
917                 mfc_debug(2, "enc src count: %d, enc ref count: %d\n",
918                           ctx->src_queue_cnt, ctx->ref_queue_cnt);
919         }
920
921         if (strm_size > 0) {
922                 /* at least one more dest. buffers exist always  */
923                 mb_entry = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
924                 list_del(&mb_entry->list);
925                 ctx->dst_queue_cnt--;
926                 vb2_set_plane_payload(mb_entry->b, 0, strm_size);
927                 vb2_buffer_done(mb_entry->b, VB2_BUF_STATE_DONE);
928         }
929
930         spin_unlock_irqrestore(&dev->irqlock, flags);
931
932         if ((ctx->src_queue_cnt == 0) || (ctx->dst_queue_cnt == 0))
933         /*
934                 clear_work_bit(ctx);
935         */
936         {
937                 spin_lock(&dev->condlock);
938                 clear_bit(ctx->num, &dev->ctx_work_bits);
939                 spin_unlock(&dev->condlock);
940         }
941
942         return 0;
943 }
944
945 static struct s5p_mfc_codec_ops encoder_codec_ops = {
946         .pre_seq_start          = enc_pre_seq_start,
947         .post_seq_start         = enc_post_seq_start,
948         .pre_frame_start        = enc_pre_frame_start,
949         .post_frame_start       = enc_post_frame_start,
950 };
951
952 /* Query capabilities of the device */
953 static int vidioc_querycap(struct file *file, void *priv,
954                            struct v4l2_capability *cap)
955 {
956         struct s5p_mfc_dev *dev = video_drvdata(file);
957
958         strncpy(cap->driver, dev->plat_dev->name, sizeof(cap->driver) - 1);
959         strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1);
960         cap->bus_info[0] = 0;
961         cap->version = KERNEL_VERSION(1, 0, 0);
962         cap->capabilities = V4L2_CAP_VIDEO_CAPTURE
963                           | V4L2_CAP_VIDEO_OUTPUT
964                           | V4L2_CAP_STREAMING;
965
966         return 0;
967 }
968
969 static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, bool mplane, bool out)
970 {
971         struct s5p_mfc_fmt *fmt;
972         int i, j = 0;
973
974         for (i = 0; i < ARRAY_SIZE(formats); ++i) {
975                 if (mplane && formats[i].num_planes == 1)
976                         continue;
977                 else if (!mplane && formats[i].num_planes > 1)
978                         continue;
979                 if (out && formats[i].type != MFC_FMT_RAW)
980                         continue;
981                 else if (!out && formats[i].type != MFC_FMT_ENC)
982                         continue;
983
984                 if (j == f->index) {
985                         fmt = &formats[i];
986                         strlcpy(f->description, fmt->name,
987                                 sizeof(f->description));
988                         f->pixelformat = fmt->fourcc;
989
990                         return 0;
991                 }
992
993                 ++j;
994         }
995
996         return -EINVAL;
997 }
998
999 static int vidioc_enum_fmt_vid_cap(struct file *file, void *pirv,
1000                                    struct v4l2_fmtdesc *f)
1001 {
1002         return vidioc_enum_fmt(f, false, false);
1003 }
1004
1005 static int vidioc_enum_fmt_vid_cap_mplane(struct file *file, void *pirv,
1006                                           struct v4l2_fmtdesc *f)
1007 {
1008         return vidioc_enum_fmt(f, true, false);
1009 }
1010
1011 static int vidioc_enum_fmt_vid_out(struct file *file, void *prov,
1012                                    struct v4l2_fmtdesc *f)
1013 {
1014         return vidioc_enum_fmt(f, false, true);
1015 }
1016
1017 static int vidioc_enum_fmt_vid_out_mplane(struct file *file, void *prov,
1018                                           struct v4l2_fmtdesc *f)
1019 {
1020         return vidioc_enum_fmt(f, true, true);
1021 }
1022
1023 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
1024 {
1025         struct s5p_mfc_ctx *ctx = priv;
1026         struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1027
1028         mfc_debug_enter();
1029
1030         mfc_debug(2, "f->type = %d ctx->state = %d\n", f->type, ctx->state);
1031
1032         if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1033                 /* This is run on output (encoder dest) */
1034                 pix_fmt_mp->width = 0;
1035                 pix_fmt_mp->height = 0;
1036                 pix_fmt_mp->field = V4L2_FIELD_NONE;
1037                 pix_fmt_mp->pixelformat = ctx->dst_fmt->fourcc;
1038                 pix_fmt_mp->num_planes = ctx->dst_fmt->num_planes;
1039
1040                 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->enc_dst_buf_size;
1041                 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->enc_dst_buf_size;
1042         } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1043                 /* This is run on capture (encoder src) */
1044                 pix_fmt_mp->width = ctx->img_width;
1045                 pix_fmt_mp->height = ctx->img_height;
1046                 /* FIXME: interlace */
1047                 pix_fmt_mp->field = V4L2_FIELD_NONE;
1048                 pix_fmt_mp->pixelformat = ctx->src_fmt->fourcc;
1049                 pix_fmt_mp->num_planes = ctx->src_fmt->num_planes;
1050
1051                 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1052                 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1053                 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1054                 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1055         } else {
1056                 mfc_err("invalid buf type\n");
1057                 return -EINVAL;
1058         }
1059
1060         mfc_debug_leave();
1061
1062         return 0;
1063 }
1064
1065 static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
1066 {
1067         struct s5p_mfc_fmt *fmt;
1068         struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1069
1070         if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1071                 fmt = find_format(f, MFC_FMT_ENC);
1072                 if (!fmt) {
1073                         mfc_err("failed to try output format\n");
1074                         return -EINVAL;
1075                 }
1076
1077                 if (pix_fmt_mp->plane_fmt[0].sizeimage == 0) {
1078                         mfc_err("must be set encoding output size\n");
1079                         return -EINVAL;
1080                 }
1081
1082                 pix_fmt_mp->plane_fmt[0].bytesperline =
1083                         pix_fmt_mp->plane_fmt[0].sizeimage;
1084         } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1085                 fmt = find_format(f, MFC_FMT_RAW);
1086                 if (!fmt) {
1087                         mfc_err("failed to try output format\n");
1088                         return -EINVAL;
1089                 }
1090
1091                 if (fmt->num_planes != pix_fmt_mp->num_planes) {
1092                         mfc_err("failed to try output format\n");
1093                         return -EINVAL;
1094                 }
1095
1096                 /* FIXME: check below items */
1097                 /*
1098                 pix_fmt_mp->height;
1099                 pix_fmt_mp->width;
1100
1101                 pix_fmt_mp->plane_fmt[0].bytesperline;  - buf_width
1102                 pix_fmt_mp->plane_fmt[0].sizeimage;     - luma
1103                 pix_fmt_mp->plane_fmt[1].bytesperline;  - buf_width
1104                 pix_fmt_mp->plane_fmt[1].sizeimage;     - chroma
1105                 */
1106         } else {
1107                 mfc_err("invalid buf type\n");
1108                 return -EINVAL;
1109         }
1110
1111         return 0;
1112 }
1113
1114 static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
1115 {
1116         struct s5p_mfc_dev *dev = video_drvdata(file);
1117         struct s5p_mfc_ctx *ctx = priv;
1118         struct s5p_mfc_fmt *fmt;
1119         struct v4l2_pix_format_mplane *pix_fmt_mp = &f->fmt.pix_mp;
1120         unsigned long flags;
1121         int ret = 0;
1122
1123         mfc_debug_enter();
1124
1125         ret = vidioc_try_fmt(file, priv, f);
1126         if (ret)
1127                 return ret;
1128
1129         if (ctx->vq_src.streaming || ctx->vq_dst.streaming) {
1130                 v4l2_err(&dev->v4l2_dev, "%s queue busy\n", __func__);
1131                 ret = -EBUSY;
1132                 goto out;
1133         }
1134
1135         if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1136                 fmt = find_format(f, MFC_FMT_ENC);
1137                 if (!fmt) {
1138                         mfc_err("failed to set capture format\n");
1139                         return -EINVAL;
1140                 }
1141                 ctx->state = MFCINST_INIT;
1142
1143                 ctx->dst_fmt = fmt;
1144                 ctx->codec_mode = ctx->dst_fmt->codec_mode;
1145                 mfc_debug(2, "codec number: %d\n", ctx->dst_fmt->codec_mode);
1146
1147                 /* CHKME: 2KB aligned, multiple of 4KB - it may be ok with SDVMM */
1148                 ctx->enc_dst_buf_size = pix_fmt_mp->plane_fmt[0].sizeimage;
1149                 pix_fmt_mp->plane_fmt[0].bytesperline = 0;
1150
1151                 ctx->dst_bufs_cnt = 0;
1152                 ctx->capture_state = QUEUE_FREE;
1153
1154                 s5p_mfc_alloc_instance_buffer(ctx);
1155
1156                 spin_lock_irqsave(&dev->condlock, flags);
1157                 set_bit(ctx->num, &dev->ctx_work_bits);
1158                 spin_unlock_irqrestore(&dev->condlock, flags);
1159
1160                 s5p_mfc_clean_ctx_int_flags(ctx);
1161                 s5p_mfc_try_run(dev);
1162                 if (s5p_mfc_wait_for_done_ctx(ctx, \
1163                                 S5P_FIMV_R2H_CMD_OPEN_INSTANCE_RET, 1)) {
1164                         /* Error or timeout */
1165                         mfc_err("Error getting instance from hardware.\n");
1166                         s5p_mfc_release_instance_buffer(ctx);
1167                         ret = -EIO;
1168                         goto out;
1169                 }
1170                 mfc_debug(2, "Got instance number: %d\n", ctx->inst_no);
1171         } else if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1172                 fmt = find_format(f, MFC_FMT_RAW);
1173                 if (!fmt) {
1174                         mfc_err("failed to set output format\n");
1175                         return -EINVAL;
1176                 }
1177
1178                 if (fmt->num_planes != pix_fmt_mp->num_planes) {
1179                         mfc_err("failed to set output format\n");
1180                         ret = -EINVAL;
1181                         goto out;
1182                 }
1183
1184                 /* FIXME: Can be change source format in encoding? */
1185                 ctx->src_fmt = fmt;
1186                 ctx->img_width = pix_fmt_mp->width;
1187                 ctx->img_height = pix_fmt_mp->height;
1188
1189                 mfc_debug(2, "codec number: %d\n", ctx->src_fmt->codec_mode);
1190                 mfc_debug(2, "fmt - w: %d, h: %d, ctx - w: %d, h: %d\n",
1191                         pix_fmt_mp->width, pix_fmt_mp->height,
1192                         ctx->img_width, ctx->img_height);
1193
1194                 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12M) {
1195                         ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN);
1196
1197                         ctx->luma_size = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN)
1198                                 * ALIGN(ctx->img_height, S5P_FIMV_NV12M_LVALIGN);
1199                         ctx->chroma_size = ALIGN(ctx->img_width, S5P_FIMV_NV12M_HALIGN)
1200                                 * ALIGN((ctx->img_height >> 1), S5P_FIMV_NV12M_CVALIGN);
1201
1202                         ctx->luma_size = ALIGN(ctx->luma_size, S5P_FIMV_NV12M_SALIGN);
1203                         ctx->chroma_size = ALIGN(ctx->chroma_size, S5P_FIMV_NV12M_SALIGN);
1204                 } else if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_NV12MT) {
1205                         ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN);
1206
1207                         ctx->luma_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN)
1208                                 * ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN);
1209                         ctx->chroma_size = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN)
1210                                 * ALIGN((ctx->img_height >> 1), S5P_FIMV_NV12MT_VALIGN);
1211
1212                         ctx->luma_size = ALIGN(ctx->luma_size, S5P_FIMV_NV12MT_SALIGN);
1213                         ctx->chroma_size = ALIGN(ctx->chroma_size, S5P_FIMV_NV12MT_SALIGN);
1214                 }
1215
1216                 ctx->src_bufs_cnt = 0;
1217                 ctx->output_state = QUEUE_FREE;
1218
1219                 pix_fmt_mp->plane_fmt[0].bytesperline = ctx->buf_width;
1220                 pix_fmt_mp->plane_fmt[0].sizeimage = ctx->luma_size;
1221                 pix_fmt_mp->plane_fmt[1].bytesperline = ctx->buf_width;
1222                 pix_fmt_mp->plane_fmt[1].sizeimage = ctx->chroma_size;
1223         } else {
1224                 mfc_err("invalid buf type\n");
1225                 return -EINVAL;
1226         }
1227 out:
1228         mfc_debug_leave();
1229         return ret;
1230 }
1231
1232 static int vidioc_reqbufs(struct file *file, void *priv,
1233                                           struct v4l2_requestbuffers *reqbufs)
1234 {
1235         struct s5p_mfc_ctx *ctx = priv;
1236         int ret = 0;
1237
1238         mfc_debug_enter();
1239
1240         mfc_debug(2, "type: %d\n", reqbufs->memory);
1241
1242         /* if memory is not mmp or userptr return error */
1243         if ((reqbufs->memory != V4L2_MEMORY_MMAP) &&
1244                 (reqbufs->memory != V4L2_MEMORY_USERPTR))
1245                 return -EINVAL;
1246
1247         if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1248                 /* RMVME: s5p_mfc_buf_negotiate() ctx state checked */
1249                 /*
1250                 if (ctx->state != MFCINST_GOT_INST) {
1251                         mfc_err("invalid context state: %d\n", ctx->state);
1252                         return -EINVAL;
1253                 }
1254                 */
1255
1256                 if (ctx->capture_state != QUEUE_FREE) {
1257                         mfc_err("invalid capture state: %d\n", ctx->capture_state);
1258                         return -EINVAL;
1259                 }
1260
1261                 ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1262                 if (ret != 0) {
1263                         mfc_err("error in vb2_reqbufs() for E(D)\n");
1264                         return ret;
1265                 }
1266                 ctx->capture_state = QUEUE_BUFS_REQUESTED;
1267
1268                 ret = s5p_mfc_alloc_codec_buffers(ctx);
1269                 if (ret) {
1270                         mfc_err("Failed to allocate encoding buffers.\n");
1271                         reqbufs->count = 0;
1272                         ret = vb2_reqbufs(&ctx->vq_dst, reqbufs);
1273                         return -ENOMEM;
1274                 }
1275         } else if (reqbufs->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1276                 if (ctx->output_state != QUEUE_FREE) {
1277                         mfc_err("invalid output state: %d\n", ctx->output_state);
1278                         return -EINVAL;
1279                 }
1280
1281                 ret = vb2_reqbufs(&ctx->vq_src, reqbufs);
1282                 if (ret != 0) {
1283                         mfc_err("error in vb2_reqbufs() for E(S)\n");
1284                         return ret;
1285                 }
1286                 ctx->output_state = QUEUE_BUFS_REQUESTED;
1287         } else {
1288                 mfc_err("invalid buf type\n");
1289                 return -EINVAL;
1290         }
1291
1292         mfc_debug(2, "--\n");
1293
1294         return ret;
1295 }
1296
1297 static int vidioc_querybuf(struct file *file, void *priv,
1298                                                    struct v4l2_buffer *buf)
1299 {
1300         struct s5p_mfc_ctx *ctx = priv;
1301         int ret = 0;
1302
1303         mfc_debug_enter();
1304
1305         mfc_debug(2, "type: %d\n", buf->memory);
1306
1307         /* if memory is not mmp or userptr return error */
1308         if ((buf->memory != V4L2_MEMORY_MMAP) &&
1309                 (buf->memory != V4L2_MEMORY_USERPTR))
1310                 return -EINVAL;
1311
1312         mfc_debug(2, "state: %d, buf->type: %d\n", ctx->state, buf->type);
1313
1314         if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1315                 if (ctx->state != MFCINST_GOT_INST) {
1316                         mfc_err("invalid context state: %d\n", ctx->state);
1317                         return -EINVAL;
1318                 }
1319
1320                 /*
1321                 if (ctx->capture_state != QUEUE_BUFS_REQUESTED) {
1322                         mfc_err("invalid capture state: %d\n", ctx->capture_state);
1323                         return -EINVAL;
1324                 }
1325                 */
1326
1327                 ret = vb2_querybuf(&ctx->vq_dst, buf);
1328                 if (ret != 0) {
1329                         mfc_err("error in vb2_querybuf() for E(D)\n");
1330                         return ret;
1331                 }
1332                 buf->m.planes[0].m.mem_offset += DST_QUEUE_OFF_BASE;
1333
1334                 /*
1335                 ctx->capture_state = QUEUE_BUFS_QUERIED;
1336                 */
1337         } else if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1338                 /* FIXME: check context state */
1339                 /*
1340                 if (ctx->output_state != QUEUE_BUFS_REQUESTED) {
1341                         mfc_err("invalid output state: %d\n", ctx->output_state);
1342                         return -EINVAL;
1343                 }
1344                 */
1345
1346                 ret = vb2_querybuf(&ctx->vq_src, buf);
1347                 if (ret != 0) {
1348                         mfc_err("error in vb2_querybuf() for E(S)\n");
1349                         return ret;
1350                 }
1351
1352                 /*
1353                 ctx->output_state = QUEUE_BUFS_QUERIED;
1354                 */
1355         } else {
1356                 mfc_err("invalid buf type\n");
1357                 return -EINVAL;
1358         }
1359
1360         mfc_debug_leave();
1361
1362         return ret;
1363 }
1364
1365 /* Queue a buffer */
1366 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1367 {
1368         struct s5p_mfc_ctx *ctx = priv;
1369
1370         mfc_debug_enter();
1371         mfc_debug(2, "Enqueued buf: %d (type = %d)\n", buf->index, buf->type);
1372         if (ctx->state == MFCINST_ERROR) {
1373                 mfc_err("Call on QBUF after unrecoverable error.\n");
1374                 return -EIO;
1375         }
1376         if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1377                 return vb2_qbuf(&ctx->vq_src, buf);
1378         else
1379                 return vb2_qbuf(&ctx->vq_dst, buf);
1380         mfc_debug_leave();
1381         return -EINVAL;
1382 }
1383
1384 /* Dequeue a buffer */
1385 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
1386 {
1387         struct s5p_mfc_ctx *ctx = priv;
1388         int ret;
1389
1390         mfc_debug_enter();
1391         mfc_debug(2, "Addr: %p %p %p Type: %d\n", &ctx->vq_src, buf, buf->m.planes,
1392                                                                 buf->type);
1393         if (ctx->state == MFCINST_ERROR) {
1394                 mfc_err("Call on DQBUF after unrecoverable error.\n");
1395                 return -EIO;
1396         }
1397         if (buf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1398                 ret = vb2_dqbuf(&ctx->vq_src, buf, file->f_flags & O_NONBLOCK);
1399         else
1400                 ret = vb2_dqbuf(&ctx->vq_dst, buf, file->f_flags & O_NONBLOCK);
1401         mfc_debug_leave();
1402         return ret;
1403 }
1404
1405 /* Stream on */
1406 static int vidioc_streamon(struct file *file, void *priv,
1407                            enum v4l2_buf_type type)
1408 {
1409         struct s5p_mfc_ctx *ctx = priv;
1410         int ret = -EINVAL;
1411
1412         mfc_debug_enter();
1413         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1414                 ret = vb2_streamon(&ctx->vq_src, type);
1415         else
1416                 ret = vb2_streamon(&ctx->vq_dst, type);
1417         mfc_debug(2, "ctx->src_queue_cnt = %d ctx->state = %d "
1418                   "ctx->dst_queue_cnt = %d ctx->dpb_count = %d\n",
1419                   ctx->src_queue_cnt, ctx->state, ctx->dst_queue_cnt,
1420                   ctx->dpb_count);
1421         mfc_debug_leave();
1422         return ret;
1423 }
1424
1425 /* Stream off, which equals to a pause */
1426 static int vidioc_streamoff(struct file *file, void *priv,
1427                             enum v4l2_buf_type type)
1428 {
1429         struct s5p_mfc_ctx *ctx = priv;
1430         int ret;
1431
1432         mfc_debug_enter();
1433         ret = -EINVAL;
1434         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE)
1435                 ret = vb2_streamoff(&ctx->vq_src, type);
1436         else
1437                 ret = vb2_streamoff(&ctx->vq_dst, type);
1438         mfc_debug_leave();
1439         return ret;
1440 }
1441
1442 /* Query a ctrl */
1443 static int vidioc_queryctrl(struct file *file, void *priv,
1444                             struct v4l2_queryctrl *qc)
1445 {
1446         struct v4l2_queryctrl *c;
1447
1448         c = get_ctrl(qc->id);
1449         if (!c)
1450                 return -EINVAL;
1451         *qc = *c;
1452         return 0;
1453 }
1454
1455 static int get_ctrl_val(struct s5p_mfc_ctx *ctx, struct v4l2_control *ctrl)
1456 {
1457         int ret = 0;
1458         struct s5p_mfc_dev *dev = ctx->dev;
1459
1460         switch (ctrl->id) {
1461         case V4L2_CID_CODEC_MFC5X_ENC_STREAM_SIZE:
1462                 ctrl->value = ctx->enc_dst_buf_size;
1463                 break;
1464         case V4L2_CID_CODEC_MFC5X_ENC_FRAME_COUNT:
1465                 ctrl->value = ctx->frame_count;
1466                 break;
1467         case V4L2_CID_CODEC_MFC5X_ENC_FRAME_TYPE:
1468                 ctrl->value = ctx->frame_type;
1469                 break;
1470         default:
1471                 v4l2_err(&dev->v4l2_dev, "Invalid control\n");
1472                 ret = -EINVAL;
1473         }
1474
1475         return ret;
1476 }
1477
1478 static int vidioc_g_ctrl(struct file *file, void *priv,
1479                          struct v4l2_control *ctrl)
1480 {
1481         struct s5p_mfc_ctx *ctx = priv;
1482         int ret = 0;
1483
1484         ret = get_ctrl_val(ctx, ctrl);
1485         if (ret != 0)
1486                 return ret;
1487
1488         return ret;
1489 }
1490
1491 static int set_ctrl_val(struct s5p_mfc_ctx *ctx, struct v4l2_control *ctrl)
1492 {
1493         struct s5p_mfc_dev *dev = ctx->dev;
1494         struct s5p_mfc_enc_params *p = &ctx->enc_params;
1495         int ret = 0;
1496
1497         switch (ctrl->id) {
1498         case V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE:
1499                 p->gop_size = ctrl->value;
1500                 break;
1501         case V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MODE:
1502                 p->slice_mode = ctrl->value;
1503                 break;
1504         case V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MB:
1505                 p->slice_mb = ctrl->value;
1506                 break;
1507         case V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_BIT:
1508                 p->slice_bit = ctrl->value;
1509                 break;
1510         case V4L2_CID_CODEC_MFC5X_ENC_INTRA_REFRESH_MB:
1511                 p->intra_refresh_mb = ctrl->value;
1512                 break;
1513         case V4L2_CID_CODEC_MFC5X_ENC_PAD_CTRL_ENABLE:
1514                 p->pad = ctrl->value;
1515                 break;
1516         case V4L2_CID_CODEC_MFC5X_ENC_PAD_LUMA_VALUE:
1517                 p->pad_luma = ctrl->value;
1518                 break;
1519         case V4L2_CID_CODEC_MFC5X_ENC_PAD_CB_VALUE:
1520                 p->pad_cb = ctrl->value;
1521                 break;
1522         case V4L2_CID_CODEC_MFC5X_ENC_PAD_CR_VALUE:
1523                 p->pad_cr = ctrl->value;
1524                 break;
1525         case V4L2_CID_CODEC_MFC5X_ENC_RC_FRAME_ENABLE:
1526                 p->rc_frame = ctrl->value;
1527                 break;
1528         case V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE:
1529                 p->rc_bitrate = ctrl->value;
1530                 break;
1531         case V4L2_CID_CODEC_MFC5X_ENC_RC_REACTION_COEFF:
1532                 p->rc_reaction_coeff = ctrl->value;
1533                 break;
1534         case V4L2_CID_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE:
1535                 ctx->force_frame_type = ctrl->value;
1536                 break;
1537         case V4L2_CID_CODEC_MFC5X_ENC_VBV_BUF_SIZE:
1538                 p->vbv_buf_size = ctrl->value;
1539                 break;
1540         case V4L2_CID_CODEC_MFC5X_ENC_SEQ_HDR_MODE:
1541                 p->seq_hdr_mode = ctrl->value;
1542                 break;
1543         case V4L2_CID_CODEC_MFC5X_ENC_FRAME_SKIP_MODE:
1544                 p->frame_skip_mode = ctrl->value;
1545                 break;
1546         case V4L2_CID_CODEC_MFC5X_ENC_RC_FIXED_TARGET_BIT:
1547                 p->fixed_target_bit = ctrl->value;
1548                 break;
1549         case V4L2_CID_CODEC_MFC5X_ENC_H264_B_FRAMES:
1550                 p->codec.h264.num_b_frame = ctrl->value;
1551                 break;
1552         case V4L2_CID_CODEC_MFC5X_ENC_H264_PROFILE:
1553                 p->codec.h264.profile = ctrl->value;
1554                 break;
1555         case V4L2_CID_CODEC_MFC5X_ENC_H264_LEVEL:
1556                 p->codec.h264.level = ctrl->value;
1557                 break;
1558         case V4L2_CID_CODEC_MFC5X_ENC_H264_INTERLACE:
1559                 p->codec.h264.interlace = ctrl->value;
1560                 break;
1561         case V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_MODE:
1562                 p->codec.h264.loop_filter_mode = ctrl->value;
1563                 break;
1564         case V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ALPHA:
1565                 p->codec.h264.loop_filter_alpha = ctrl->value;
1566                 break;
1567         case V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_BETA:
1568                 p->codec.h264.loop_filter_beta = ctrl->value;
1569                 break;
1570         case V4L2_CID_CODEC_MFC5X_ENC_H264_ENTROPY_MODE:
1571                 p->codec.h264.entropy_mode = ctrl->value;
1572                 break;
1573         case V4L2_CID_CODEC_MFC5X_ENC_H264_MAX_REF_PIC:
1574                 p->codec.h264.max_ref_pic = ctrl->value;
1575                 break;
1576         case V4L2_CID_CODEC_MFC5X_ENC_H264_NUM_REF_PIC_4P:
1577                 p->codec.h264.num_ref_pic_4p = ctrl->value;
1578                 break;
1579         case V4L2_CID_CODEC_MFC5X_ENC_H264_8X8_TRANSFORM:
1580                 p->codec.h264._8x8_transform = ctrl->value;
1581                 break;
1582         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ENABLE:
1583                 p->codec.h264.rc_mb = ctrl->value;
1584                 break;
1585         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE:
1586                 p->codec.h264.rc_framerate = ctrl->value;
1587                 break;
1588         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_QP:
1589                 p->codec.h264.rc_frame_qp = ctrl->value;
1590                 break;
1591         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MIN_QP:
1592                 p->codec.h264.rc_min_qp = ctrl->value;
1593                 break;
1594         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MAX_QP:
1595                 p->codec.h264.rc_max_qp = ctrl->value;
1596                 break;
1597         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_DARK:
1598                 p->codec.h264.rc_mb_dark = ctrl->value;
1599                 break;
1600         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_SMOOTH:
1601                 p->codec.h264.rc_mb_smooth = ctrl->value;
1602                 break;
1603         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_STATIC:
1604                 p->codec.h264.rc_mb_static = ctrl->value;
1605                 break;
1606         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ACTIVITY:
1607                 p->codec.h264.rc_mb_activity = ctrl->value;
1608                 break;
1609         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_P_FRAME_QP:
1610                 p->codec.h264.rc_p_frame_qp = ctrl->value;
1611                 break;
1612         case V4L2_CID_CODEC_MFC5X_ENC_H264_RC_B_FRAME_QP:
1613                 p->codec.h264.rc_b_frame_qp = ctrl->value;
1614                 break;
1615         case V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_ENABLE:
1616                 p->codec.h264.ar_vui = ctrl->value;
1617                 break;
1618         case V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_IDC:
1619                 p->codec.h264.ar_vui_idc = ctrl->value;
1620                 break;
1621         case V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_WIDTH:
1622                 p->codec.h264.ext_sar_width = ctrl->value;
1623                 break;
1624         case V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_HEIGHT:
1625                 p->codec.h264.ext_sar_height = ctrl->value;
1626                 break;
1627         case V4L2_CID_CODEC_MFC5X_ENC_H264_OPEN_GOP:
1628                 p->codec.h264.open_gop = ctrl->value;
1629                 break;
1630         case V4L2_CID_CODEC_MFC5X_ENC_H264_I_PERIOD:
1631                 p->codec.h264.open_gop_size = ctrl->value;
1632                 break;
1633         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_B_FRAMES:
1634                 p->codec.mpeg4.num_b_frame = ctrl->value;
1635                 break;
1636         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_PROFILE:
1637                 p->codec.mpeg4.profile = ctrl->value;
1638                 break;
1639         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_LEVEL:
1640                 p->codec.mpeg4.level = ctrl->value;
1641                 break;
1642         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_FRAME_QP:
1643                 p->codec.mpeg4.rc_frame_qp = ctrl->value;
1644                 break;
1645         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MIN_QP:
1646                 p->codec.mpeg4.rc_min_qp = ctrl->value;
1647                 break;
1648         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MAX_QP:
1649                 p->codec.mpeg4.rc_max_qp = ctrl->value;
1650                 break;
1651         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_QUARTER_PIXEL:
1652                 p->codec.mpeg4.quarter_pixel = ctrl->value;
1653                 break;
1654         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_P_FRAME_QP:
1655                 p->codec.mpeg4.rc_p_frame_qp = ctrl->value;
1656                 break;
1657         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_B_FRAME_QP:
1658                 p->codec.mpeg4.rc_b_frame_qp = ctrl->value;
1659                 break;
1660         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_TIME_RES:
1661                 p->codec.mpeg4.vop_time_res = ctrl->value;
1662                 break;
1663         case V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_FRM_DELTA:
1664                 p->codec.mpeg4.vop_frm_delta = ctrl->value;
1665                 break;
1666         case V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_RATE:
1667                 p->codec.mpeg4.rc_framerate = ctrl->value;
1668                 break;
1669         case V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_QP:
1670                 p->codec.mpeg4.rc_frame_qp = ctrl->value;
1671                 break;
1672         case V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MIN_QP:
1673                 p->codec.mpeg4.rc_min_qp = ctrl->value;
1674                 break;
1675         case V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MAX_QP:
1676                 p->codec.mpeg4.rc_max_qp = ctrl->value;
1677                 break;
1678         case V4L2_CID_CODEC_MFC5X_ENC_H263_RC_P_FRAME_QP:
1679                 p->codec.mpeg4.rc_p_frame_qp = ctrl->value;
1680                 break;
1681         default:
1682                 v4l2_err(&dev->v4l2_dev, "Invalid control\n");
1683                 ret = -EINVAL;
1684         }
1685
1686         return ret;
1687 }
1688
1689 static int vidioc_s_ctrl(struct file *file, void *priv,
1690                          struct v4l2_control *ctrl)
1691 {
1692         struct s5p_mfc_ctx *ctx = priv;
1693         int ret = 0;
1694         /*
1695         int stream_on;
1696         */
1697
1698         /*
1699         if (s5p_mfc_get_node_type(file) != MFCNODE_ENCODER)
1700                 return -EINVAL;
1701         */
1702
1703         /* FIXME:
1704         stream_on = ctx->vq_src.streaming || ctx->vq_dst.streaming;
1705         */
1706
1707         ret = check_ctrl_val(ctx, ctrl);
1708         if (ret != 0)
1709                 return ret;
1710
1711         ret = set_ctrl_val(ctx, ctrl);
1712         if (ret != 0)
1713                 return ret;
1714
1715         return ret;
1716 }
1717
1718 static int vidioc_g_ext_ctrls(struct file *file, void *priv,
1719                               struct v4l2_ext_controls *f)
1720 {
1721         struct s5p_mfc_ctx *ctx = priv;
1722         struct v4l2_ext_control *ext_ctrl;
1723         struct v4l2_control ctrl;
1724         int i;
1725         int ret = 0;
1726
1727         /*
1728         if (s5p_mfc_get_node_type(file) != MFCNODE_ENCODER)
1729                 return -EINVAL;
1730         */
1731
1732         if (f->ctrl_class != V4L2_CTRL_CLASS_CODEC)
1733                 return -EINVAL;
1734
1735         for (i = 0; i < f->count; i++) {
1736                 ext_ctrl = (f->controls + i);
1737
1738                 ctrl.id = ext_ctrl->id;
1739
1740                 ret = get_ctrl_val(ctx, &ctrl);
1741                 if (ret == 0) {
1742                         ext_ctrl->value = ctrl.value;
1743                 } else {
1744                         f->error_idx = i;
1745                         break;
1746                 }
1747
1748                 mfc_debug(2, "[%d] id: 0x%08x, value: %d", i, ext_ctrl->id, ext_ctrl->value);
1749         }
1750
1751         return ret;
1752 }
1753
1754 static int vidioc_s_ext_ctrls(struct file *file, void *priv,
1755                                 struct v4l2_ext_controls *f)
1756 {
1757         struct s5p_mfc_ctx *ctx = priv;
1758         struct v4l2_ext_control *ext_ctrl;
1759         struct v4l2_control ctrl;
1760         int i;
1761         int ret = 0;
1762
1763         /*
1764         if (s5p_mfc_get_node_type(file) != MFCNODE_ENCODER)
1765                 return -EINVAL;
1766         */
1767
1768         if (f->ctrl_class != V4L2_CTRL_CLASS_CODEC)
1769                 return -EINVAL;
1770
1771         for (i = 0; i < f->count; i++) {
1772                 ext_ctrl = (f->controls + i);
1773
1774                 ctrl.id = ext_ctrl->id;
1775                 ctrl.value = ext_ctrl->value;
1776
1777                 ret = check_ctrl_val(ctx, &ctrl);
1778                 if (ret != 0) {
1779                         f->error_idx = i;
1780                         break;
1781                 }
1782
1783                 ret = set_ctrl_val(ctx, &ctrl);
1784                 if (ret != 0) {
1785                         f->error_idx = i;
1786                         break;
1787                 }
1788
1789                 mfc_debug(2, "[%d] id: 0x%08x, value: %d", i, ext_ctrl->id, ext_ctrl->value);
1790         }
1791
1792         return ret;
1793 }
1794
1795 static int vidioc_try_ext_ctrls(struct file *file, void *priv,
1796                                 struct v4l2_ext_controls *f)
1797 {
1798         struct s5p_mfc_ctx *ctx = priv;
1799         struct v4l2_ext_control *ext_ctrl;
1800         struct v4l2_control ctrl;
1801         int i;
1802         int ret = 0;
1803
1804         /*
1805         if (s5p_mfc_get_node_type(file) != MFCNODE_ENCODER)
1806                 return -EINVAL;
1807         */
1808
1809         if (f->ctrl_class != V4L2_CTRL_CLASS_CODEC)
1810                 return -EINVAL;
1811
1812         for (i = 0; i < f->count; i++) {
1813                 ext_ctrl = (f->controls + i);
1814
1815                 ctrl.id = ext_ctrl->id;
1816                 ctrl.value = ext_ctrl->value;
1817
1818                 ret = check_ctrl_val(ctx, &ctrl);
1819                 if (ret != 0) {
1820                         f->error_idx = i;
1821                         break;
1822                 }
1823
1824                 mfc_debug(2, "[%d] id: 0x%08x, value: %d", i, ext_ctrl->id, ext_ctrl->value);
1825         }
1826
1827         return ret;
1828 }
1829
1830 static const struct v4l2_ioctl_ops s5p_mfc_enc_ioctl_ops = {
1831         .vidioc_querycap = vidioc_querycap,
1832         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1833         .vidioc_enum_fmt_vid_cap_mplane = vidioc_enum_fmt_vid_cap_mplane,
1834         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1835         .vidioc_enum_fmt_vid_out_mplane = vidioc_enum_fmt_vid_out_mplane,
1836         .vidioc_g_fmt_vid_cap_mplane = vidioc_g_fmt,
1837         .vidioc_g_fmt_vid_out_mplane = vidioc_g_fmt,
1838         .vidioc_try_fmt_vid_cap_mplane = vidioc_try_fmt,
1839         .vidioc_try_fmt_vid_out_mplane = vidioc_try_fmt,
1840         .vidioc_s_fmt_vid_cap_mplane = vidioc_s_fmt,
1841         .vidioc_s_fmt_vid_out_mplane = vidioc_s_fmt,
1842         .vidioc_reqbufs = vidioc_reqbufs,
1843         .vidioc_querybuf = vidioc_querybuf,
1844         .vidioc_qbuf = vidioc_qbuf,
1845         .vidioc_dqbuf = vidioc_dqbuf,
1846         .vidioc_streamon = vidioc_streamon,
1847         .vidioc_streamoff = vidioc_streamoff,
1848         .vidioc_queryctrl = vidioc_queryctrl,
1849         .vidioc_g_ctrl = vidioc_g_ctrl,
1850         .vidioc_s_ctrl = vidioc_s_ctrl,
1851         .vidioc_g_ext_ctrls = vidioc_g_ext_ctrls,
1852         .vidioc_s_ext_ctrls = vidioc_s_ext_ctrls,
1853         .vidioc_try_ext_ctrls = vidioc_try_ext_ctrls,
1854 };
1855
1856 static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
1857 {
1858         int i;
1859
1860         if (!fmt)
1861                 return -EINVAL;
1862
1863         if (fmt->num_planes != vb->num_planes) {
1864                 mfc_err("invalid plane number for the format\n");
1865                 return -EINVAL;
1866         }
1867
1868         for (i = 0; i < fmt->num_planes; i++) {
1869                 if (!mfc_plane_cookie(vb, i)) {
1870                         mfc_err("failed to get plane cookie\n");
1871                         return -EINVAL;
1872                 }
1873
1874                 mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08lx",
1875                                 vb->v4l2_buf.index, i,
1876                                 mfc_plane_cookie(vb, i));
1877         }
1878
1879         return 0;
1880 }
1881
1882 static int s5p_mfc_queue_setup(struct vb2_queue *vq,
1883                                unsigned int *buf_count, unsigned int *plane_count,
1884                                unsigned long psize[], void *allocators[])
1885 {
1886         struct s5p_mfc_ctx *ctx = vq->drv_priv;
1887         int i;
1888
1889         mfc_debug_enter();
1890
1891         if (ctx->state != MFCINST_GOT_INST) {
1892                 mfc_err("inavlid state: %d\n", ctx->state);
1893                 return -EINVAL;
1894         }
1895
1896         if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1897                 if (ctx->dst_fmt)
1898                         *plane_count = ctx->dst_fmt->num_planes;
1899                 else
1900                         *plane_count = MFC_ENC_CAP_PLANE_COUNT;
1901
1902                 if (*buf_count < 1)
1903                         *buf_count = 1;
1904                 if (*buf_count > MFC_MAX_BUFFERS)
1905                         *buf_count = MFC_MAX_BUFFERS;
1906
1907                 psize[0] = ctx->enc_dst_buf_size;
1908                 allocators[0] = ctx->dev->alloc_ctx[MFC_CMA_BANK1_ALLOC_CTX];
1909         } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1910                 if (ctx->src_fmt)
1911                         *plane_count = ctx->src_fmt->num_planes;
1912                 else
1913                         *plane_count = MFC_ENC_OUT_PLANE_COUNT;
1914
1915                 if (*buf_count < 1)
1916                         *buf_count = 1;
1917                 if (*buf_count > MFC_MAX_BUFFERS)
1918                         *buf_count = MFC_MAX_BUFFERS;
1919
1920                 psize[0] = ctx->luma_size;
1921                 psize[1] = ctx->chroma_size;
1922                 allocators[0] = ctx->dev->alloc_ctx[MFC_CMA_BANK2_ALLOC_CTX];
1923                 allocators[1] = ctx->dev->alloc_ctx[MFC_CMA_BANK2_ALLOC_CTX];
1924
1925         } else {
1926                 mfc_err("inavlid queue type: %d\n", vq->type);
1927                 return -EINVAL;
1928         }
1929
1930         mfc_debug(2, "buf_count: %d, plane_count: %d\n", *buf_count, *plane_count);
1931         for (i = 0; i < *plane_count; i++)
1932                 mfc_debug(2, "plane[%d] size=%lu\n", i, psize[i]);
1933
1934         mfc_debug_leave();
1935
1936         return 0;
1937 }
1938
1939 static void s5p_mfc_unlock(struct vb2_queue *q)
1940 {
1941         struct s5p_mfc_ctx *ctx = q->drv_priv;
1942         struct s5p_mfc_dev *dev = ctx->dev;
1943
1944         mutex_unlock(&dev->mfc_mutex);
1945 }
1946
1947 static void s5p_mfc_lock(struct vb2_queue *q)
1948 {
1949         struct s5p_mfc_ctx *ctx = q->drv_priv;
1950         struct s5p_mfc_dev *dev = ctx->dev;
1951
1952         mutex_lock(&dev->mfc_mutex);
1953 }
1954
1955 static int s5p_mfc_buf_init(struct vb2_buffer *vb)
1956 {
1957         struct vb2_queue *vq = vb->vb2_queue;
1958         struct s5p_mfc_ctx *ctx = vq->drv_priv;
1959         unsigned int i;
1960         int ret;
1961
1962         mfc_debug_enter();
1963
1964         if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
1965                 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
1966                 if (ret < 0)
1967                         return ret;
1968
1969                 i = vb->v4l2_buf.index;
1970                 ctx->dst_bufs[i].b = vb;
1971                 ctx->dst_bufs[i].cookie.stream = mfc_plane_cookie(vb, 0);
1972                 ctx->dst_bufs_cnt++;
1973         } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
1974                 ret = check_vb_with_fmt(ctx->src_fmt, vb);
1975                 if (ret < 0)
1976                         return ret;
1977
1978                 i = vb->v4l2_buf.index;
1979                 ctx->src_bufs[i].b = vb;
1980                 ctx->src_bufs[i].cookie.raw.luma = mfc_plane_cookie(vb, 0);
1981                 ctx->src_bufs[i].cookie.raw.chroma = mfc_plane_cookie(vb, 1);
1982                 ctx->src_bufs_cnt++;
1983         } else {
1984                 mfc_err("inavlid queue type: %d\n", vq->type);
1985                 return -EINVAL;
1986         }
1987
1988         mfc_debug_leave();
1989
1990         return 0;
1991 }
1992
1993 static int s5p_mfc_buf_prepare(struct vb2_buffer *vb)
1994 {
1995         struct vb2_queue *vq = vb->vb2_queue;
1996         struct s5p_mfc_ctx *ctx = vq->drv_priv;
1997         int ret;
1998
1999         mfc_debug_enter();
2000
2001         if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
2002                 ret = check_vb_with_fmt(ctx->dst_fmt, vb);
2003                 if (ret < 0)
2004                         return ret;
2005
2006                 mfc_debug(2, "plane size: %ld, dst size: %d\n",
2007                         vb2_plane_size(vb, 0), ctx->enc_dst_buf_size);
2008
2009                 if (vb2_plane_size(vb, 0) < ctx->enc_dst_buf_size) {
2010                         mfc_err("plane size is too small for capture\n");
2011                         return -EINVAL;
2012                 }
2013         } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
2014                 ret = check_vb_with_fmt(ctx->src_fmt, vb);
2015                 if (ret < 0)
2016                         return ret;
2017
2018                 mfc_debug(2, "plane size: %ld, luma size: %d\n",
2019                         vb2_plane_size(vb, 0), ctx->luma_size);
2020                 mfc_debug(2, "plane size: %ld, chroma size: %d\n",
2021                         vb2_plane_size(vb, 1), ctx->chroma_size);
2022
2023                 if (vb2_plane_size(vb, 0) < ctx->luma_size ||
2024                     vb2_plane_size(vb, 1) < ctx->chroma_size) {
2025                         mfc_err("plane size is too small for output\n");
2026                         return -EINVAL;
2027                 }
2028         } else {
2029                 mfc_err("inavlid queue type: %d\n", vq->type);
2030                 return -EINVAL;
2031         }
2032
2033         mfc_debug_leave();
2034
2035         return 0;
2036 }
2037
2038 static int s5p_mfc_start_streaming(struct vb2_queue *q)
2039 {
2040         struct s5p_mfc_ctx *ctx = q->drv_priv;
2041         struct s5p_mfc_dev *dev = ctx->dev;
2042         unsigned long flags;
2043
2044         /* If context is ready then dev = work->data;schedule it to run */
2045         if (s5p_mfc_ctx_ready(ctx)) {
2046                 spin_lock_irqsave(&dev->condlock, flags);
2047                 set_bit(ctx->num, &dev->ctx_work_bits);
2048                 spin_unlock_irqrestore(&dev->condlock, flags);
2049         }
2050
2051         s5p_mfc_try_run(dev);
2052
2053         return 0;
2054 }
2055
2056 static int s5p_mfc_stop_streaming(struct vb2_queue *q)
2057 {
2058         unsigned long flags;
2059         struct s5p_mfc_ctx *ctx = q->drv_priv;
2060         struct s5p_mfc_dev *dev = ctx->dev;
2061
2062         if ((ctx->state == MFCINST_FINISHING ||
2063                 ctx->state ==  MFCINST_RUNNING) &&
2064                 dev->curr_ctx == ctx->num && dev->hw_lock) {
2065                 ctx->state = MFCINST_ABORT;
2066                 s5p_mfc_wait_for_done_ctx(ctx, S5P_FIMV_R2H_CMD_FRAME_DONE_RET,
2067                                           0);
2068         }
2069
2070         ctx->state = MFCINST_FINISHED;
2071
2072         spin_lock_irqsave(&dev->irqlock, flags);
2073
2074         if (q->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
2075                 s5p_mfc_cleanup_queue(&ctx->dst_queue, &ctx->vq_dst);
2076                 INIT_LIST_HEAD(&ctx->dst_queue);
2077                 ctx->dst_queue_cnt = 0;
2078         }
2079
2080         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
2081                 cleanup_ref_queue(ctx);
2082
2083                 s5p_mfc_cleanup_queue(&ctx->src_queue, &ctx->vq_src);
2084                 INIT_LIST_HEAD(&ctx->src_queue);
2085                 ctx->src_queue_cnt = 0;
2086         }
2087
2088         spin_unlock_irqrestore(&dev->irqlock, flags);
2089
2090         return 0;
2091 }
2092
2093 static void s5p_mfc_buf_queue(struct vb2_buffer *vb)
2094 {
2095         struct vb2_queue *vq = vb->vb2_queue;
2096         struct s5p_mfc_ctx *ctx = vq->drv_priv;
2097         struct s5p_mfc_dev *dev = ctx->dev;
2098         unsigned long flags;
2099         struct s5p_mfc_buf *mfc_buf;
2100
2101         mfc_debug_enter();
2102
2103         if (vq->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
2104                 mfc_buf = &ctx->dst_bufs[vb->v4l2_buf.index];
2105                 mfc_buf->used = 0;
2106                 mfc_debug(2, "dst queue: %p\n", &ctx->dst_queue);
2107                 mfc_debug(2, "adding to dst: %p (%08lx, %08x)\n", vb,
2108                         mfc_plane_cookie(vb, 0),
2109                         ctx->dst_bufs[vb->v4l2_buf.index].cookie.stream);
2110
2111                 /* Mark destination as available for use by MFC */
2112                 spin_lock_irqsave(&dev->irqlock, flags);
2113                 list_add_tail(&mfc_buf->list, &ctx->dst_queue);
2114                 ctx->dst_queue_cnt++;
2115                 spin_unlock_irqrestore(&dev->irqlock, flags);
2116         } else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
2117                 mfc_buf = &ctx->src_bufs[vb->v4l2_buf.index];
2118                 mfc_buf->used = 0;
2119                 mfc_debug(2, "src queue: %p\n", &ctx->src_queue);
2120                 mfc_debug(2, "adding to src: %p (%08lx, %08lx, %08x, %08x)\n", vb,
2121                         mfc_plane_cookie(vb, 0),
2122                         mfc_plane_cookie(vb, 1),
2123                         ctx->src_bufs[vb->v4l2_buf.index].cookie.raw.luma,
2124                         ctx->src_bufs[vb->v4l2_buf.index].cookie.raw.chroma);
2125
2126                 spin_lock_irqsave(&dev->irqlock, flags);
2127
2128                 if (vb->v4l2_planes[0].bytesused == 0) {
2129                         mfc_debug(1, "change state to FINISHING\n");
2130                         ctx->state = MFCINST_FINISHING;
2131
2132                         vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
2133
2134                         cleanup_ref_queue(ctx);
2135                 } else {
2136                         list_add_tail(&mfc_buf->list, &ctx->src_queue);
2137                         ctx->src_queue_cnt++;
2138                 }
2139
2140                 spin_unlock_irqrestore(&dev->irqlock, flags);
2141         } else {
2142                 mfc_err("unsupported buffer type (%d)\n", vq->type);
2143         }
2144
2145         if (s5p_mfc_ctx_ready(ctx)) {
2146                 spin_lock_irqsave(&dev->condlock, flags);
2147                 set_bit(ctx->num, &dev->ctx_work_bits);
2148                 spin_unlock_irqrestore(&dev->condlock, flags);
2149         }
2150         s5p_mfc_try_run(dev);
2151
2152         mfc_debug_leave();
2153 }
2154
2155 static struct vb2_ops s5p_mfc_enc_qops = {
2156         .queue_setup    = s5p_mfc_queue_setup,
2157         .wait_prepare   = s5p_mfc_unlock,
2158         .wait_finish    = s5p_mfc_lock,
2159         .buf_init       = s5p_mfc_buf_init,
2160         .buf_prepare    = s5p_mfc_buf_prepare,
2161         .start_streaming= s5p_mfc_start_streaming,
2162         .stop_streaming = s5p_mfc_stop_streaming,
2163         .buf_queue      = s5p_mfc_buf_queue,
2164 };
2165
2166 struct s5p_mfc_codec_ops *get_enc_codec_ops(void)
2167 {
2168         return &encoder_codec_ops;
2169 }
2170
2171 struct vb2_ops *get_enc_queue_ops(void)
2172 {
2173         return &s5p_mfc_enc_qops;
2174 }
2175
2176 const struct v4l2_ioctl_ops *get_enc_v4l2_ioctl_ops(void)
2177 {
2178         return &s5p_mfc_enc_ioctl_ops;
2179 }
2180
2181 struct s5p_mfc_fmt *get_enc_def_fmt(bool src)
2182 {
2183         if (src)
2184                 return &formats[DEF_SRC_FMT];
2185         else
2186                 return &formats[DEF_DST_FMT];
2187 }
2188