arch/sh/kernel/cpu/sh2a/fpu.c

   1 /*
   2  * Save/restore floating point context for signal handlers.
   3  *
   4  * Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  *
  10  * FIXME! These routines can be optimized in big endian case.
  11  */
  12 #include <linux/sched.h>
  13 #include <linux/signal.h>
  14 #include <asm/processor.h>
  15 #include <asm/io.h>
  16 #include <asm/fpu.h>
  17
  18 /* The PR (precision) bit in the FP Status Register must be clear when
  19  * an frchg instruction is executed, otherwise the instruction is undefined.
  20  * Executing frchg with PR set causes a trap on some SH4 implementations.
  21  */
  22
  23 #define FPSCR_RCHG 0x00000000
  24
  25
  26 /*
  27  * Save FPU registers onto task structure.
  28  */
  29 void save_fpu(struct task_struct *tsk)
  30 {
  31         unsigned long dummy;
  32
  33         enable_fpu();
  34         asm volatile("sts.l     fpul, @-%0\n\t"
  35                      "sts.l     fpscr, @-%0\n\t"
  36                      "fmov.s    fr15, @-%0\n\t"
  37                      "fmov.s    fr14, @-%0\n\t"
  38                      "fmov.s    fr13, @-%0\n\t"
  39                      "fmov.s    fr12, @-%0\n\t"
  40                      "fmov.s    fr11, @-%0\n\t"
  41                      "fmov.s    fr10, @-%0\n\t"
  42                      "fmov.s    fr9, @-%0\n\t"
  43                      "fmov.s    fr8, @-%0\n\t"
  44                      "fmov.s    fr7, @-%0\n\t"
  45                      "fmov.s    fr6, @-%0\n\t"
  46                      "fmov.s    fr5, @-%0\n\t"
  47                      "fmov.s    fr4, @-%0\n\t"
  48                      "fmov.s    fr3, @-%0\n\t"
  49                      "fmov.s    fr2, @-%0\n\t"
  50                      "fmov.s    fr1, @-%0\n\t"
  51                      "fmov.s    fr0, @-%0\n\t"
  52                      "lds       %3, fpscr\n\t"
  53                      : "=r" (dummy)
  54                      : "0" ((char *)(&tsk->thread.xstate->hardfpu.status)),
  55                        "r" (FPSCR_RCHG),
  56                        "r" (FPSCR_INIT)
  57                      : "memory");
  58
  59         disable_fpu();
  60 }
  61
  62 void restore_fpu(struct task_struct *tsk)
  63 {
  64         unsigned long dummy;
  65
  66         enable_fpu();
  67         asm volatile("fmov.s    @%0+, fr0\n\t"
  68                      "fmov.s    @%0+, fr1\n\t"
  69                      "fmov.s    @%0+, fr2\n\t"
  70                      "fmov.s    @%0+, fr3\n\t"
  71                      "fmov.s    @%0+, fr4\n\t"
  72                      "fmov.s    @%0+, fr5\n\t"
  73                      "fmov.s    @%0+, fr6\n\t"
  74                      "fmov.s    @%0+, fr7\n\t"
  75                      "fmov.s    @%0+, fr8\n\t"
  76                      "fmov.s    @%0+, fr9\n\t"
  77                      "fmov.s    @%0+, fr10\n\t"
  78                      "fmov.s    @%0+, fr11\n\t"
  79                      "fmov.s    @%0+, fr12\n\t"
  80                      "fmov.s    @%0+, fr13\n\t"
  81                      "fmov.s    @%0+, fr14\n\t"
  82                      "fmov.s    @%0+, fr15\n\t"
  83                      "lds.l     @%0+, fpscr\n\t"
  84                      "lds.l     @%0+, fpul\n\t"
  85                      : "=r" (dummy)
  86                      : "0" (tsk->thread.xstate), "r" (FPSCR_RCHG)
  87                      : "memory");
  88         disable_fpu();
  89 }
  90
  91 /*
  92  *      Emulate arithmetic ops on denormalized number for some FPU insns.
  93  */
  94
  95 /* denormalized float * float */
  96 static int denormal_mulf(int hx, int hy)
  97 {
  98         unsigned int ix, iy;
  99         unsigned long long m, n;
 100         int exp, w;
 101
 102         ix = hx & 0x7fffffff;
 103         iy = hy & 0x7fffffff;
 104         if (iy < 0x00800000 || ix == 0)
 105                 return ((hx ^ hy) & 0x80000000);
 106
 107         exp = (iy & 0x7f800000) >> 23;
 108         ix &= 0x007fffff;
 109         iy = (iy & 0x007fffff) | 0x00800000;
 110         m = (unsigned long long)ix * iy;
 111         n = m;
 112         w = -1;
 113         while (n) { n >>= 1; w++; }
 114
 115         /* FIXME: use guard bits */
 116         exp += w - 126 - 46;
 117         if (exp > 0)
 118                 ix = ((int) (m >> (w - 23)) & 0x007fffff) | (exp << 23);
 119         else if (exp + 22 >= 0)
 120                 ix = (int) (m >> (w - 22 - exp)) & 0x007fffff;
 121         else
 122                 ix = 0;
 123
 124         ix |= (hx ^ hy) & 0x80000000;
 125         return ix;
 126 }
 127
 128 /* denormalized double * double */
 129 static void mult64(unsigned long long x, unsigned long long y,
 130                 unsigned long long *highp, unsigned long long *lowp)
 131 {
 132         unsigned long long sub0, sub1, sub2, sub3;
 133         unsigned long long high, low;
 134
 135         sub0 = (x >> 32) * (unsigned long) (y >> 32);
 136         sub1 = (x & 0xffffffffLL) * (unsigned long) (y >> 32);
 137         sub2 = (x >> 32) * (unsigned long) (y & 0xffffffffLL);
 138         sub3 = (x & 0xffffffffLL) * (unsigned long) (y & 0xffffffffLL);
 139         low = sub3;
 140         high = 0LL;
 141         sub3 += (sub1 << 32);
 142         if (low > sub3)
 143                 high++;
 144         low = sub3;
 145         sub3 += (sub2 << 32);
 146         if (low > sub3)
 147                 high++;
 148         low = sub3;
 149         high += (sub1 >> 32) + (sub2 >> 32);
 150         high += sub0;
 151         *lowp = low;
 152         *highp = high;
 153 }
 154
 155 static inline long long rshift64(unsigned long long mh,
 156                 unsigned long long ml, int n)
 157 {
 158         if (n >= 64)
 159                 return mh >> (n - 64);
 160         return (mh << (64 - n)) | (ml >> n);
 161 }
 162
 163 static long long denormal_muld(long long hx, long long hy)
 164 {
 165         unsigned long long ix, iy;
 166         unsigned long long mh, ml, nh, nl;
 167         int exp, w;
 168
 169         ix = hx & 0x7fffffffffffffffLL;
 170         iy = hy & 0x7fffffffffffffffLL;
 171         if (iy < 0x0010000000000000LL || ix == 0)
 172                 return ((hx ^ hy) & 0x8000000000000000LL);
 173
 174         exp = (iy & 0x7ff0000000000000LL) >> 52;
 175         ix &= 0x000fffffffffffffLL;
 176         iy = (iy & 0x000fffffffffffffLL) | 0x0010000000000000LL;
 177         mult64(ix, iy, &mh, &ml);
 178         nh = mh;
 179         nl = ml;
 180         w = -1;
 181         if (nh) {
 182                 while (nh) { nh >>= 1; w++;}
 183                 w += 64;
 184         } else
 185                 while (nl) { nl >>= 1; w++;}
 186
 187         /* FIXME: use guard bits */
 188         exp += w - 1022 - 52 * 2;
 189         if (exp > 0)
 190                 ix = (rshift64(mh, ml, w - 52) & 0x000fffffffffffffLL)
 191                         | ((long long)exp << 52);
 192         else if (exp + 51 >= 0)
 193                 ix = rshift64(mh, ml, w - 51 - exp) & 0x000fffffffffffffLL;
 194         else
 195                 ix = 0;
 196
 197         ix |= (hx ^ hy) & 0x8000000000000000LL;
 198         return ix;
 199 }
 200
 201 /* ix - iy where iy: denormal and ix, iy >= 0 */
 202 static int denormal_subf1(unsigned int ix, unsigned int iy)
 203 {
 204         int frac;
 205         int exp;
 206
 207         if (ix < 0x00800000)
 208                 return ix - iy;
 209
 210         exp = (ix & 0x7f800000) >> 23;
 211         if (exp - 1 > 31)
 212                 return ix;
 213         iy >>= exp - 1;
 214         if (iy == 0)
 215                 return ix;
 216
 217         frac = (ix & 0x007fffff) | 0x00800000;
 218         frac -= iy;
 219         while (frac < 0x00800000) {
 220                 if (--exp == 0)
 221                         return frac;
 222                 frac <<= 1;
 223         }
 224
 225         return (exp << 23) | (frac & 0x007fffff);
 226 }
 227
 228 /* ix + iy where iy: denormal and ix, iy >= 0 */
 229 static int denormal_addf1(unsigned int ix, unsigned int iy)
 230 {
 231         int frac;
 232         int exp;
 233
 234         if (ix < 0x00800000)
 235                 return ix + iy;
 236
 237         exp = (ix & 0x7f800000) >> 23;
 238         if (exp - 1 > 31)
 239                 return ix;
 240         iy >>= exp - 1;
 241         if (iy == 0)
 242           return ix;
 243
 244         frac = (ix & 0x007fffff) | 0x00800000;
 245         frac += iy;
 246         if (frac >= 0x01000000) {
 247                 frac >>= 1;
 248                 ++exp;
 249         }
 250
 251         return (exp << 23) | (frac & 0x007fffff);
 252 }
 253
 254 static int denormal_addf(int hx, int hy)
 255 {
 256         unsigned int ix, iy;
 257         int sign;
 258
 259         if ((hx ^ hy) & 0x80000000) {
 260                 sign = hx & 0x80000000;
 261                 ix = hx & 0x7fffffff;
 262                 iy = hy & 0x7fffffff;
 263                 if (iy < 0x00800000) {
 264                         ix = denormal_subf1(ix, iy);
 265                         if ((int) ix < 0) {
 266                                 ix = -ix;
 267                                 sign ^= 0x80000000;
 268                         }
 269                 } else {
 270                         ix = denormal_subf1(iy, ix);
 271                         sign ^= 0x80000000;
 272                 }
 273         } else {
 274                 sign = hx & 0x80000000;
 275                 ix = hx & 0x7fffffff;
 276                 iy = hy & 0x7fffffff;
 277                 if (iy < 0x00800000)
 278                         ix = denormal_addf1(ix, iy);
 279                 else
 280                         ix = denormal_addf1(iy, ix);
 281         }
 282
 283         return sign | ix;
 284 }
 285
 286 /* ix - iy where iy: denormal and ix, iy >= 0 */
 287 static long long denormal_subd1(unsigned long long ix, unsigned long long iy)
 288 {
 289         long long frac;
 290         int exp;
 291
 292         if (ix < 0x0010000000000000LL)
 293                 return ix - iy;
 294
 295         exp = (ix & 0x7ff0000000000000LL) >> 52;
 296         if (exp - 1 > 63)
 297                 return ix;
 298         iy >>= exp - 1;
 299         if (iy == 0)
 300                 return ix;
 301
 302         frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
 303         frac -= iy;
 304         while (frac < 0x0010000000000000LL) {
 305                 if (--exp == 0)
 306                         return frac;
 307                 frac <<= 1;
 308         }
 309
 310         return ((long long)exp << 52) | (frac & 0x000fffffffffffffLL);
 311 }
 312
 313 /* ix + iy where iy: denormal and ix, iy >= 0 */
 314 static long long denormal_addd1(unsigned long long ix, unsigned long long iy)
 315 {
 316         long long frac;
 317         long long exp;
 318
 319         if (ix < 0x0010000000000000LL)
 320                 return ix + iy;
 321
 322         exp = (ix & 0x7ff0000000000000LL) >> 52;
 323         if (exp - 1 > 63)
 324                 return ix;
 325         iy >>= exp - 1;
 326         if (iy == 0)
 327           return ix;
 328
 329         frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
 330         frac += iy;
 331         if (frac >= 0x0020000000000000LL) {
 332                 frac >>= 1;
 333                 ++exp;
 334         }
 335
 336         return (exp << 52) | (frac & 0x000fffffffffffffLL);
 337 }
 338
 339 static long long denormal_addd(long long hx, long long hy)
 340 {
 341         unsigned long long ix, iy;
 342         long long sign;
 343
 344         if ((hx ^ hy) & 0x8000000000000000LL) {
 345                 sign = hx & 0x8000000000000000LL;
 346                 ix = hx & 0x7fffffffffffffffLL;
 347                 iy = hy & 0x7fffffffffffffffLL;
 348                 if (iy < 0x0010000000000000LL) {
 349                         ix = denormal_subd1(ix, iy);
 350                         if ((int) ix < 0) {
 351                                 ix = -ix;
 352                                 sign ^= 0x8000000000000000LL;
 353                         }
 354                 } else {
 355                         ix = denormal_subd1(iy, ix);
 356                         sign ^= 0x8000000000000000LL;
 357                 }
 358         } else {
 359                 sign = hx & 0x8000000000000000LL;
 360                 ix = hx & 0x7fffffffffffffffLL;
 361                 iy = hy & 0x7fffffffffffffffLL;
 362                 if (iy < 0x0010000000000000LL)
 363                         ix = denormal_addd1(ix, iy);
 364                 else
 365                         ix = denormal_addd1(iy, ix);
 366         }
 367
 368         return sign | ix;
 369 }
 370
 371 /**
 372  *      denormal_to_double - Given denormalized float number,
 373  *                           store double float
 374  *
 375  *      @fpu: Pointer to sh_fpu_hard structure
 376  *      @n: Index to FP register
 377  */
 378 static void
 379 denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
 380 {
 381         unsigned long du, dl;
 382         unsigned long x = fpu->fpul;
 383         int exp = 1023 - 126;
 384
 385         if (x != 0 && (x & 0x7f800000) == 0) {
 386                 du = (x & 0x80000000);
 387                 while ((x & 0x00800000) == 0) {
 388                         x <<= 1;
 389                         exp--;
 390                 }
 391                 x &= 0x007fffff;
 392                 du |= (exp << 20) | (x >> 3);
 393                 dl = x << 29;
 394
 395                 fpu->fp_regs[n] = du;
 396                 fpu->fp_regs[n+1] = dl;
 397         }
 398 }
 399
 400 /**
 401  *      ieee_fpe_handler - Handle denormalized number exception
 402  *
 403  *      @regs: Pointer to register structure
 404  *
 405  *      Returns 1 when it's handled (should not cause exception).
 406  */
 407 static int
 408 ieee_fpe_handler (struct pt_regs *regs)
 409 {
 410         unsigned short insn = *(unsigned short *) regs->pc;
 411         unsigned short finsn;
 412         unsigned long nextpc;
 413         int nib[4] = {
 414                 (insn >> 12) & 0xf,
 415                 (insn >> 8) & 0xf,
 416                 (insn >> 4) & 0xf,
 417                 insn & 0xf};
 418
 419         if (nib[0] == 0xb ||
 420             (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
 421                 regs->pr = regs->pc + 4;
 422         if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
 423                 nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
 424                 finsn = *(unsigned short *) (regs->pc + 2);
 425         } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
 426                 if (regs->sr & 1)
 427                         nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
 428                 else
 429                         nextpc = regs->pc + 4;
 430                 finsn = *(unsigned short *) (regs->pc + 2);
 431         } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
 432                 if (regs->sr & 1)
 433                         nextpc = regs->pc + 4;
 434                 else
 435                         nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
 436                 finsn = *(unsigned short *) (regs->pc + 2);
 437         } else if (nib[0] == 0x4 && nib[3] == 0xb &&
 438                  (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
 439                 nextpc = regs->regs[nib[1]];
 440                 finsn = *(unsigned short *) (regs->pc + 2);
 441         } else if (nib[0] == 0x0 && nib[3] == 0x3 &&
 442                  (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
 443                 nextpc = regs->pc + 4 + regs->regs[nib[1]];
 444                 finsn = *(unsigned short *) (regs->pc + 2);
 445         } else if (insn == 0x000b) { /* rts */
 446                 nextpc = regs->pr;
 447                 finsn = *(unsigned short *) (regs->pc + 2);
 448         } else {
 449                 nextpc = regs->pc + 2;
 450                 finsn = insn;
 451         }
 452
 453 #define FPSCR_FPU_ERROR (1 << 17)
 454
 455         if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
 456                 struct task_struct *tsk = current;
 457
 458                 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) {
 459                         /* FPU error */
 460                         denormal_to_double (&tsk->thread.xstate->hardfpu,
 461                                             (finsn >> 8) & 0xf);
 462                 } else
 463                         return 0;
 464
 465                 regs->pc = nextpc;
 466                 return 1;
 467         } else if ((finsn & 0xf00f) == 0xf002) { /* fmul */
 468                 struct task_struct *tsk = current;
 469                 int fpscr;
 470                 int n, m, prec;
 471                 unsigned int hx, hy;
 472
 473                 n = (finsn >> 8) & 0xf;
 474                 m = (finsn >> 4) & 0xf;
 475                 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
 476                 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
 477                 fpscr = tsk->thread.xstate->hardfpu.fpscr;
 478                 prec = fpscr & (1 << 19);
 479
 480                 if ((fpscr & FPSCR_FPU_ERROR)
 481                      && (prec && ((hx & 0x7fffffff) < 0x00100000
 482                                    || (hy & 0x7fffffff) < 0x00100000))) {
 483                         long long llx, lly;
 484
 485                         /* FPU error because of denormal */
 486                         llx = ((long long) hx << 32)
 487                                | tsk->thread.xstate->hardfpu.fp_regs[n+1];
 488                         lly = ((long long) hy << 32)
 489                                | tsk->thread.xstate->hardfpu.fp_regs[m+1];
 490                         if ((hx & 0x7fffffff) >= 0x00100000)
 491                                 llx = denormal_muld(lly, llx);
 492                         else
 493                                 llx = denormal_muld(llx, lly);
 494                         tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
 495                         tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
 496                 } else if ((fpscr & FPSCR_FPU_ERROR)
 497                      && (!prec && ((hx & 0x7fffffff) < 0x00800000
 498                                    || (hy & 0x7fffffff) < 0x00800000))) {
 499                         /* FPU error because of denormal */
 500                         if ((hx & 0x7fffffff) >= 0x00800000)
 501                                 hx = denormal_mulf(hy, hx);
 502                         else
 503                                 hx = denormal_mulf(hx, hy);
 504                         tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
 505                 } else
 506                         return 0;
 507
 508                 regs->pc = nextpc;
 509                 return 1;
 510         } else if ((finsn & 0xf00e) == 0xf000) { /* fadd, fsub */
 511                 struct task_struct *tsk = current;
 512                 int fpscr;
 513                 int n, m, prec;
 514                 unsigned int hx, hy;
 515
 516                 n = (finsn >> 8) & 0xf;
 517                 m = (finsn >> 4) & 0xf;
 518                 hx = tsk->thread.xstate->hardfpu.fp_regs[n];
 519                 hy = tsk->thread.xstate->hardfpu.fp_regs[m];
 520                 fpscr = tsk->thread.xstate->hardfpu.fpscr;
 521                 prec = fpscr & (1 << 19);
 522
 523                 if ((fpscr & FPSCR_FPU_ERROR)
 524                      && (prec && ((hx & 0x7fffffff) < 0x00100000
 525                                    || (hy & 0x7fffffff) < 0x00100000))) {
 526                         long long llx, lly;
 527
 528                         /* FPU error because of denormal */
 529                         llx = ((long long) hx << 32)
 530                                | tsk->thread.xstate->hardfpu.fp_regs[n+1];
 531                         lly = ((long long) hy << 32)
 532                                | tsk->thread.xstate->hardfpu.fp_regs[m+1];
 533                         if ((finsn & 0xf00f) == 0xf000)
 534                                 llx = denormal_addd(llx, lly);
 535                         else
 536                                 llx = denormal_addd(llx, lly ^ (1LL << 63));
 537                         tsk->thread.xstate->hardfpu.fp_regs[n] = llx >> 32;
 538                         tsk->thread.xstate->hardfpu.fp_regs[n+1] = llx & 0xffffffff;
 539                 } else if ((fpscr & FPSCR_FPU_ERROR)
 540                      && (!prec && ((hx & 0x7fffffff) < 0x00800000
 541                                    || (hy & 0x7fffffff) < 0x00800000))) {
 542                         /* FPU error because of denormal */
 543                         if ((finsn & 0xf00f) == 0xf000)
 544                                 hx = denormal_addf(hx, hy);
 545                         else
 546                                 hx = denormal_addf(hx, hy ^ 0x80000000);
 547                         tsk->thread.xstate->hardfpu.fp_regs[n] = hx;
 548                 } else
 549                         return 0;
 550
 551                 regs->pc = nextpc;
 552                 return 1;
 553         }
 554
 555         return 0;
 556 }
 557
 558 BUILD_TRAP_HANDLER(fpu_error)
 559 {
 560         struct task_struct *tsk = current;
 561         TRAP_HANDLER_DECL;
 562
 563         __unlazy_fpu(tsk, regs);
 564         if (ieee_fpe_handler(regs)) {
 565                 tsk->thread.xstate->hardfpu.fpscr &=
 566                         ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
 567                 grab_fpu(regs);
 568                 restore_fpu(tsk);
 569                 task_thread_info(tsk)->status |= TS_USEDFPU;
 570                 return;
 571         }
 572
 573         force_sig(SIGFPE, tsk);
 574 }