arch/powerpc/boot/dts/mpc5121ads.dts

   1 /*
   2  * MPC5121E ADS Device Tree Source
   3  *
   4  * Copyright 2007,2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "mpc5121ads";
  16         compatible = "fsl,mpc5121ads";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 pci = &pci;
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 PowerPC,5121@0 {
  29                         device_type = "cpu";
  30                         reg = <0>;
  31                         d-cache-line-size = <0x20>;     // 32 bytes
  32                         i-cache-line-size = <0x20>;     // 32 bytes
  33                         d-cache-size = <0x8000>;        // L1, 32K
  34                         i-cache-size = <0x8000>;        // L1, 32K
  35                         timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
  36                         bus-frequency = <198000000>;    // 198 MHz csb bus
  37                         clock-frequency = <396000000>;  // 396 MHz ppc core
  38                 };
  39         };
  40
  41         memory {
  42                 device_type = "memory";
  43                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  44         };
  45
  46         mbx@20000000 {
  47                 compatible = "fsl,mpc5121-mbx";
  48                 reg = <0x20000000 0x4000>;
  49                 interrupts = <66 0x8>;
  50                 interrupt-parent = < &ipic >;
  51         };
  52
  53         sram@30000000 {
  54                 compatible = "fsl,mpc5121-sram";
  55                 reg = <0x30000000 0x20000>;             // 128K at 0x30000000
  56         };
  57
  58         nfc@40000000 {
  59                 compatible = "fsl,mpc5121-nfc";
  60                 reg = <0x40000000 0x100000>;    // 1M at 0x40000000
  61                 interrupts = <6 8>;
  62                 interrupt-parent = < &ipic >;
  63                 #address-cells = <1>;
  64                 #size-cells = <1>;
  65                 // ADS has two Hynix 512MB Nand flash chips in a single
  66                 // stacked package.
  67                 chips = <2>;
  68                 nand@0 {
  69                         label = "nand";
  70                         reg = <0x00000000 0x40000000>;  // 512MB + 512MB
  71                 };
  72         };
  73
  74         localbus@80000020 {
  75                 compatible = "fsl,mpc5121-localbus";
  76                 #address-cells = <2>;
  77                 #size-cells = <1>;
  78                 reg = <0x80000020 0x40>;
  79
  80                 ranges = <0x0 0x0 0xfc000000 0x04000000
  81                           0x2 0x0 0x82000000 0x00008000>;
  82
  83                 flash@0,0 {
  84                         compatible = "cfi-flash";
  85                         reg = <0 0x0 0x4000000>;
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88                         bank-width = <4>;
  89                         device-width = <2>;
  90                         protected@0 {
  91                                 label = "protected";
  92                                 reg = <0x00000000 0x00040000>;  // first sector is protected
  93                                 read-only;
  94                         };
  95                         filesystem@40000 {
  96                                 label = "filesystem";
  97                                 reg = <0x00040000 0x03c00000>;  // 60M for filesystem
  98                         };
  99                         kernel@3c40000 {
 100                                 label = "kernel";
 101                                 reg = <0x03c40000 0x00280000>;  // 2.5M for kernel
 102                         };
 103                         device-tree@3ec0000 {
 104                                 label = "device-tree";
 105                                 reg = <0x03ec0000 0x00040000>;  // one sector for device tree
 106                         };
 107                         u-boot@3f00000 {
 108                                 label = "u-boot";
 109                                 reg = <0x03f00000 0x00100000>;  // 1M for u-boot
 110                                 read-only;
 111                         };
 112                 };
 113
 114                 board-control@2,0 {
 115                         compatible = "fsl,mpc5121ads-cpld";
 116                         reg = <0x2 0x0 0x8000>;
 117                 };
 118
 119                 cpld_pic: pic@2,a {
 120                         compatible = "fsl,mpc5121ads-cpld-pic";
 121                         interrupt-controller;
 122                         #interrupt-cells = <2>;
 123                         reg = <0x2 0xa 0x5>;
 124                         interrupt-parent = < &ipic >;
 125                         // irq routing
 126                         //      all irqs but touch screen are routed to irq0 (ipic 48)
 127                         //      touch screen is statically routed to irq1 (ipic 17)
 128                         //      so don't use it here
 129                         interrupts = <48 0x8>;
 130                 };
 131         };
 132
 133         soc@80000000 {
 134                 compatible = "fsl,mpc5121-immr";
 135                 #address-cells = <1>;
 136                 #size-cells = <1>;
 137                 #interrupt-cells = <2>;
 138                 ranges = <0x0 0x80000000 0x400000>;
 139                 reg = <0x80000000 0x400000>;
 140                 bus-frequency = <66000000>;     // 66 MHz ips bus
 141
 142
 143                 // IPIC
 144                 // interrupts cell = <intr #, sense>
 145                 // sense values match linux IORESOURCE_IRQ_* defines:
 146                 // sense == 8: Level, low assertion
 147                 // sense == 2: Edge, high-to-low change
 148                 //
 149                 ipic: interrupt-controller@c00 {
 150                         compatible = "fsl,mpc5121-ipic", "fsl,ipic";
 151                         interrupt-controller;
 152                         #address-cells = <0>;
 153                         #interrupt-cells = <2>;
 154                         reg = <0xc00 0x100>;
 155                 };
 156
 157                 rtc@a00 {       // Real time clock
 158                         compatible = "fsl,mpc5121-rtc";
 159                         reg = <0xa00 0x100>;
 160                         interrupts = <79 0x8 80 0x8>;
 161                         interrupt-parent = < &ipic >;
 162                 };
 163
 164                 reset@e00 {     // Reset module
 165                         compatible = "fsl,mpc5121-reset";
 166                         reg = <0xe00 0x100>;
 167                 };
 168
 169                 clock@f00 {     // Clock control
 170                         compatible = "fsl,mpc5121-clock";
 171                         reg = <0xf00 0x100>;
 172                 };
 173
 174                 pmc@1000{  //Power Management Controller
 175                         compatible = "fsl,mpc5121-pmc";
 176                         reg = <0x1000 0x100>;
 177                         interrupts = <83 0x2>;
 178                         interrupt-parent = < &ipic >;
 179                 };
 180
 181                 gpio@1100 {
 182                         compatible = "fsl,mpc5121-gpio";
 183                         reg = <0x1100 0x100>;
 184                         interrupts = <78 0x8>;
 185                         interrupt-parent = < &ipic >;
 186                 };
 187
 188                 can@1300 {
 189                         compatible = "fsl,mpc5121-mscan";
 190                         interrupts = <12 0x8>;
 191                         interrupt-parent = < &ipic >;
 192                         reg = <0x1300 0x80>;
 193                 };
 194
 195                 can@1380 {
 196                         compatible = "fsl,mpc5121-mscan";
 197                         interrupts = <13 0x8>;
 198                         interrupt-parent = < &ipic >;
 199                         reg = <0x1380 0x80>;
 200                 };
 201
 202                 i2c@1700 {
 203                         #address-cells = <1>;
 204                         #size-cells = <0>;
 205                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 206                         reg = <0x1700 0x20>;
 207                         interrupts = <9 0x8>;
 208                         interrupt-parent = < &ipic >;
 209                         fsl,preserve-clocking;
 210
 211                         hwmon@4a {
 212                                 compatible = "adi,ad7414";
 213                                 reg = <0x4a>;
 214                         };
 215
 216                         eeprom@50 {
 217                                 compatible = "at,24c32";
 218                                 reg = <0x50>;
 219                         };
 220
 221                         rtc@68 {
 222                                 compatible = "stm,m41t62";
 223                                 reg = <0x68>;
 224                         };
 225                 };
 226
 227                 i2c@1720 {
 228                         #address-cells = <1>;
 229                         #size-cells = <0>;
 230                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 231                         reg = <0x1720 0x20>;
 232                         interrupts = <10 0x8>;
 233                         interrupt-parent = < &ipic >;
 234                 };
 235
 236                 i2c@1740 {
 237                         #address-cells = <1>;
 238                         #size-cells = <0>;
 239                         compatible = "fsl,mpc5121-i2c", "fsl-i2c";
 240                         reg = <0x1740 0x20>;
 241                         interrupts = <11 0x8>;
 242                         interrupt-parent = < &ipic >;
 243                 };
 244
 245                 i2ccontrol@1760 {
 246                         compatible = "fsl,mpc5121-i2c-ctrl";
 247                         reg = <0x1760 0x8>;
 248                 };
 249
 250                 axe@2000 {
 251                         compatible = "fsl,mpc5121-axe";
 252                         reg = <0x2000 0x100>;
 253                         interrupts = <42 0x8>;
 254                         interrupt-parent = < &ipic >;
 255                 };
 256
 257                 display@2100 {
 258                         compatible = "fsl,mpc5121-diu";
 259                         reg = <0x2100 0x100>;
 260                         interrupts = <64 0x8>;
 261                         interrupt-parent = < &ipic >;
 262                 };
 263
 264                 mdio@2800 {
 265                         compatible = "fsl,mpc5121-fec-mdio";
 266                         reg = <0x2800 0x800>;
 267                         #address-cells = <1>;
 268                         #size-cells = <0>;
 269                         phy: ethernet-phy@0 {
 270                                 reg = <1>;
 271                                 device_type = "ethernet-phy";
 272                         };
 273                 };
 274
 275                 ethernet@2800 {
 276                         device_type = "network";
 277                         compatible = "fsl,mpc5121-fec";
 278                         reg = <0x2800 0x800>;
 279                         local-mac-address = [ 00 00 00 00 00 00 ];
 280                         interrupts = <4 0x8>;
 281                         interrupt-parent = < &ipic >;
 282                         phy-handle = < &phy >;
 283                         fsl,align-tx-packets = <4>;
 284                 };
 285
 286                 // 5121e has two dr usb modules
 287                 // mpc5121_ads only uses USB0
 288
 289                 // USB1 using external ULPI PHY
 290                 //usb@3000 {
 291                 //      compatible = "fsl,mpc5121-usb2-dr";
 292                 //      reg = <0x3000 0x1000>;
 293                 //      #address-cells = <1>;
 294                 //      #size-cells = <0>;
 295                 //      interrupt-parent = < &ipic >;
 296                 //      interrupts = <43 0x8>;
 297                 //      dr_mode = "otg";
 298                 //      phy_type = "ulpi";
 299                 //};
 300
 301                 // USB0 using internal UTMI PHY
 302                 usb@4000 {
 303                         compatible = "fsl,mpc5121-usb2-dr";
 304                         reg = <0x4000 0x1000>;
 305                         #address-cells = <1>;
 306                         #size-cells = <0>;
 307                         interrupt-parent = < &ipic >;
 308                         interrupts = <44 0x8>;
 309                         dr_mode = "otg";
 310                         phy_type = "utmi_wide";
 311                         fsl,invert-drvvbus;
 312                         fsl,invert-pwr-fault;
 313                 };
 314
 315                 // IO control
 316                 ioctl@a000 {
 317                         compatible = "fsl,mpc5121-ioctl";
 318                         reg = <0xA000 0x1000>;
 319                 };
 320
 321                 pata@10200 {
 322                         compatible = "fsl,mpc5121-pata";
 323                         reg = <0x10200 0x100>;
 324                         interrupts = <5 0x8>;
 325                         interrupt-parent = < &ipic >;
 326                 };
 327
 328                 // 512x PSCs are not 52xx PSC compatible
 329                 // PSC3 serial port A aka ttyPSC0
 330                 serial@11300 {
 331                         device_type = "serial";
 332                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
 333                         // Logical port assignment needed until driver
 334                         // learns to use aliases
 335                         port-number = <0>;
 336                         cell-index = <3>;
 337                         reg = <0x11300 0x100>;
 338                         interrupts = <40 0x8>;
 339                         interrupt-parent = < &ipic >;
 340                         rx-fifo-size = <16>;
 341                         tx-fifo-size = <16>;
 342                 };
 343
 344                 // PSC4 serial port B aka ttyPSC1
 345                 serial@11400 {
 346                         device_type = "serial";
 347                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
 348                         // Logical port assignment needed until driver
 349                         // learns to use aliases
 350                         port-number = <1>;
 351                         cell-index = <4>;
 352                         reg = <0x11400 0x100>;
 353                         interrupts = <40 0x8>;
 354                         interrupt-parent = < &ipic >;
 355                         rx-fifo-size = <16>;
 356                         tx-fifo-size = <16>;
 357                 };
 358
 359                 // PSC5 in ac97 mode
 360                 ac97@11500 {
 361                         compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
 362                         cell-index = <5>;
 363                         reg = <0x11500 0x100>;
 364                         interrupts = <40 0x8>;
 365                         interrupt-parent = < &ipic >;
 366                         fsl,mode = "ac97-slave";
 367                         rx-fifo-size = <384>;
 368                         tx-fifo-size = <384>;
 369                 };
 370
 371                 pscfifo@11f00 {
 372                         compatible = "fsl,mpc5121-psc-fifo";
 373                         reg = <0x11f00 0x100>;
 374                         interrupts = <40 0x8>;
 375                         interrupt-parent = < &ipic >;
 376                 };
 377
 378                 dma@14000 {
 379                         compatible = "fsl,mpc5121-dma";
 380                         reg = <0x14000 0x1800>;
 381                         interrupts = <65 0x8>;
 382                         interrupt-parent = < &ipic >;
 383                 };
 384
 385         };
 386
 387         pci: pci@80008500 {
 388                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 389                 interrupt-map = <
 390                                 // IDSEL 0x15 - Slot 1 PCI
 391                                  0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
 392                                  0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
 393                                  0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
 394                                  0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
 395
 396                                 // IDSEL 0x16 - Slot 2 MiniPCI
 397                                  0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
 398                                  0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
 399
 400                                 // IDSEL 0x17 - Slot 3 MiniPCI
 401                                  0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
 402                                  0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
 403                                 >;
 404                 interrupt-parent = < &ipic >;
 405                 interrupts = <1 0x8>;
 406                 bus-range = <0 0>;
 407                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
 408                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
 409                           0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
 410                 clock-frequency = <0>;
 411                 #interrupt-cells = <1>;
 412                 #size-cells = <2>;
 413                 #address-cells = <3>;
 414                 reg = <0x80008500 0x100         /* internal registers */
 415                        0x80008300 0x8>;         /* config space access registers */
 416                 compatible = "fsl,mpc5121-pci";
 417                 device_type = "pci";
 418         };
 419 };