1 /* linux/arch/arm/plat-s3c24xx/clock.c
3 * Copyright 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX Core clock control support
8 * Based on, and code from linux/arch/arm/mach-versatile/clock.c
10 ** Copyright (C) 2004 ARM Limited.
11 ** Written by Deep Blue Solutions Limited.
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/list.h>
33 #include <linux/errno.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/sysdev.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/clk.h>
40 #include <linux/spinlock.h>
42 #include <linux/debugfs.h>
44 #include <mach/hardware.h>
47 #include <plat/cpu-freq.h>
49 #include <plat/clock.h>
52 #include <linux/serial_core.h>
53 #include <plat/regs-serial.h> /* for s3c24xx_uart_devs */
55 /* clock information */
57 static LIST_HEAD(clocks);
59 /* We originally used an mutex here, but some contexts (see resume)
60 * are calling functions such as clk_set_parent() with IRQs disabled
61 * causing an BUG to be triggered.
63 DEFINE_SPINLOCK(clocks_lock);
65 /* enable and disable calls for use with the clk struct */
67 static int clk_null_enable(struct clk *clk, int enable)
72 static int dev_is_s3c_uart(struct device *dev)
74 struct platform_device **pdev = s3c24xx_uart_devs;
76 for (i = 0; i < ARRAY_SIZE(s3c24xx_uart_devs); i++, pdev++)
77 if (*pdev && dev == &(*pdev)->dev)
83 * Serial drivers call get_clock() very early, before platform bus
84 * has been set up, this requires a special check to let them get
88 static int dev_is_platform_device(struct device *dev)
90 return dev->bus == &platform_bus_type ||
91 (dev->bus == NULL && dev_is_s3c_uart(dev));
96 struct clk *clk_get(struct device *dev, const char *id)
99 struct clk *clk = ERR_PTR(-ENOENT);
103 if (dev == NULL || !dev_is_platform_device(dev))
106 idno = to_platform_device(dev)->id;
108 spin_lock_irqsave(&clocks_lock, flags);
110 list_for_each_entry(p, &clocks, list) {
112 strcmp(id, p->name) == 0 &&
113 try_module_get(p->owner)) {
119 /* check for the case where a device was supplied, but the
120 * clock that was being searched for is not device specific */
123 list_for_each_entry(p, &clocks, list) {
124 if (p->id == -1 && strcmp(id, p->name) == 0 &&
125 try_module_get(p->owner)) {
132 spin_unlock_irqrestore(&clocks_lock, flags);
136 void clk_put(struct clk *clk)
138 module_put(clk->owner);
141 int clk_enable(struct clk *clk)
145 if (IS_ERR(clk) || clk == NULL)
148 clk_enable(clk->parent);
150 spin_lock_irqsave(&clocks_lock, flags);
152 if ((clk->usage++) == 0)
153 (clk->enable)(clk, 1);
155 spin_unlock_irqrestore(&clocks_lock, flags);
159 void clk_disable(struct clk *clk)
163 if (IS_ERR(clk) || clk == NULL)
169 spin_lock_irqsave(&clocks_lock, flags);
171 WARN(clk->usage <= 0, "ERROR: Clock %s:%d usage counter mismatch"
172 " (%d) at clk_disable.\n", clk->name, clk->id,
175 if ((--clk->usage) == 0)
176 (clk->enable)(clk, 0);
178 spin_unlock_irqrestore(&clocks_lock, flags);
181 clk_disable(clk->parent);
185 unsigned long clk_get_rate(struct clk *clk)
193 if (clk->ops != NULL && clk->ops->get_rate != NULL)
194 return (clk->ops->get_rate)(clk);
196 if (clk->parent != NULL)
197 return clk_get_rate(clk->parent);
202 long clk_round_rate(struct clk *clk, unsigned long rate)
204 if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
205 return (clk->ops->round_rate)(clk, rate);
210 int clk_set_rate(struct clk *clk, unsigned long rate)
218 /* We do not default just do a clk->rate = rate as
219 * the clock may have been made this way by choice.
222 WARN_ON(clk->ops == NULL);
223 WARN_ON(clk->ops && clk->ops->set_rate == NULL);
225 if (clk->ops == NULL || clk->ops->set_rate == NULL)
228 spin_lock_irqsave(&clocks_lock, flags);
229 ret = (clk->ops->set_rate)(clk, rate);
230 spin_unlock_irqrestore(&clocks_lock, flags);
235 struct clk *clk_get_parent(struct clk *clk)
240 int clk_set_parent(struct clk *clk, struct clk *parent)
248 spin_lock_irqsave(&clocks_lock, flags);
250 if (clk->ops && clk->ops->set_parent)
251 ret = (clk->ops->set_parent)(clk, parent);
253 spin_unlock_irqrestore(&clocks_lock, flags);
258 EXPORT_SYMBOL(clk_get);
259 EXPORT_SYMBOL(clk_put);
260 EXPORT_SYMBOL(clk_enable);
261 EXPORT_SYMBOL(clk_disable);
262 EXPORT_SYMBOL(clk_get_rate);
263 EXPORT_SYMBOL(clk_round_rate);
264 EXPORT_SYMBOL(clk_set_rate);
265 EXPORT_SYMBOL(clk_get_parent);
266 EXPORT_SYMBOL(clk_set_parent);
270 int clk_default_setrate(struct clk *clk, unsigned long rate)
276 struct clk_ops clk_ops_def_setrate = {
277 .set_rate = clk_default_setrate,
280 struct clk clk_xtal = {
288 struct clk clk_ext = {
293 struct clk clk_epll = {
298 struct clk clk_mpll = {
301 .ops = &clk_ops_def_setrate,
304 struct clk clk_upll = {
325 .ops = &clk_ops_def_setrate,
334 .ops = &clk_ops_def_setrate,
337 struct clk clk_usb_bus = {
345 struct clk s3c24xx_uclk = {
350 /* initialise the clock system */
353 * s3c24xx_register_clock() - register a clock
354 * @clk: The clock to register
356 * Add the specified clock to the list of clocks known by the system.
358 int s3c24xx_register_clock(struct clk *clk)
362 if (clk->enable == NULL)
363 clk->enable = clk_null_enable;
365 /* add to the list of available clocks */
367 /* Quick check to see if this clock has already been registered. */
368 BUG_ON(clk->list.prev != clk->list.next);
370 spin_lock_irqsave(&clocks_lock, flags);
371 list_add(&clk->list, &clocks);
372 spin_unlock_irqrestore(&clocks_lock, flags);
378 * s3c24xx_register_clocks() - register an array of clock pointers
379 * @clks: Pointer to an array of struct clk pointers
380 * @nr_clks: The number of clocks in the @clks array.
382 * Call s3c24xx_register_clock() for all the clock pointers contained
383 * in the @clks list. Returns the number of failures.
385 int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
389 for (; nr_clks > 0; nr_clks--, clks++) {
390 if (s3c24xx_register_clock(*clks) < 0) {
391 struct clk *clk = *clks;
392 printk(KERN_ERR "%s: failed to register %p: %s\n",
393 __func__, clk, clk->name);
402 * s3c_register_clocks() - register an array of clocks
403 * @clkp: Pointer to the first clock in the array.
404 * @nr_clks: Number of clocks to register.
406 * Call s3c24xx_register_clock() on the @clkp array given, printing an
407 * error if it fails to register the clock (unlikely).
409 void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
413 for (; nr_clks > 0; nr_clks--, clkp++) {
414 ret = s3c24xx_register_clock(clkp);
417 printk(KERN_ERR "Failed to register clock %s (%d)\n",
424 * s3c_disable_clocks() - disable an array of clocks
425 * @clkp: Pointer to the first clock in the array.
426 * @nr_clks: Number of clocks to register.
428 * for internal use only at initialisation time. disable the clocks in the
432 void __init s3c_disable_clocks(struct clk *clkp, int nr_clks)
434 for (; nr_clks > 0; nr_clks--, clkp++)
435 (clkp->enable)(clkp, 0);
438 /* initialise all the clocks */
440 int __init s3c24xx_register_baseclocks(unsigned long xtal)
442 printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
444 clk_xtal.rate = xtal;
446 /* register our clocks */
448 if (s3c24xx_register_clock(&clk_xtal) < 0)
449 printk(KERN_ERR "failed to register master xtal\n");
451 if (s3c24xx_register_clock(&clk_mpll) < 0)
452 printk(KERN_ERR "failed to register mpll clock\n");
454 if (s3c24xx_register_clock(&clk_upll) < 0)
455 printk(KERN_ERR "failed to register upll clock\n");
457 if (s3c24xx_register_clock(&clk_f) < 0)
458 printk(KERN_ERR "failed to register cpu fclk\n");
460 if (s3c24xx_register_clock(&clk_h) < 0)
461 printk(KERN_ERR "failed to register cpu hclk\n");
463 if (s3c24xx_register_clock(&clk_p) < 0)
464 printk(KERN_ERR "failed to register cpu pclk\n");
469 #ifdef CONFIG_DEBUG_FS
471 * debugfs support to trace clock tree hierarchy and attributes
473 static struct dentry *clk_debugfs_root;
475 static int clk_debugfs_register_one(struct clk *c)
478 struct dentry *d, *child, *child_tmp;
479 struct clk *pa = c->parent;
483 p += sprintf(p, "%s:%d", c->name, c->id);
484 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
489 d = debugfs_create_u32("usecount", S_IRUGO, c->dent, (u32 *)&c->usage);
494 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
499 d = debugfs_create_x32("ctrlbit", S_IRUGO, c->dent, (u32 *)&c->ctrlbit);
508 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
509 debugfs_remove(child);
510 debugfs_remove(c->dent);
514 static int clk_debugfs_register(struct clk *c)
517 struct clk *pa = c->parent;
519 if (pa && !pa->dent) {
520 err = clk_debugfs_register(pa);
522 pr_err("ERROR registering parent %s:%d (%d)\n",
523 pa->name, pa->id, err);
529 err = clk_debugfs_register_one(c);
531 pr_err("ERROR registering %s:%d (%d)\n",
532 c->name, c->id, err);
539 static int __init clk_debugfs_init(void)
545 d = debugfs_create_dir("clock", NULL);
548 clk_debugfs_root = d;
550 list_for_each_entry(c, &clocks, list) {
551 err = clk_debugfs_register(c);
557 debugfs_remove_recursive(clk_debugfs_root);
560 late_initcall(clk_debugfs_init);
562 #endif /* CONFIG_DEBUG_FS */