arch/arm/mach-s5pv310/setup-mali.c

   1 /* linux/arch/arm/mach-s5pv310/setup-mali.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * Inki Dae <inki.dae@samsung.com>
   7  *
   8  * clock configuration for MALI
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/io.h>
  16 #include <linux/clk.h>
  17 #include <linux/err.h>
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/device.h>
  21 #include <linux/regulator/consumer.h>
  22
  23 #include <plat/mali.h>
  24
  25 #include <mach/regs-clock.h>
  26
  27 struct mali_platform_data mali_pd = {
  28         .g3d_clk_name           = "g3d",
  29         .ppmug3d_clk_name       = "ppmug3d"
  30 };
  31
  32 int universal_mali_power_on(unsigned int enable)
  33 {
  34         struct regulator *regulator;
  35
  36         if (enable) {
  37                 regulator = regulator_get(NULL, "vg3d_1.2v_c210");
  38                 if (IS_ERR(regulator)) {
  39                         printk("failed to get vg3d_1.2v_c210.\n");
  40                         return -EINVAL;
  41                 }
  42                 regulator_enable(regulator);
  43                 regulator_put(regulator);
  44         } else {
  45                 regulator = regulator_get(NULL, "vg3d_1.2v_c210");
  46                 if (IS_ERR(regulator)) {
  47                         printk("failed to get vg3d_1.2v_c210.\n");
  48                         return -EINVAL;
  49                 }
  50                 if (regulator_is_enabled(regulator))
  51                         regulator_force_disable(regulator);
  52                 regulator_put(regulator);
  53         }
  54
  55         return 0;
  56 }
  57
  58 int universal_mali_power_domain_on(unsigned int enable)
  59 {
  60         unsigned int reg;
  61
  62         if (enable) {
  63                 /* G3D_CONFIGURATION. */
  64                 writel(0x7, S5P_G3D_CONFIGURATION);
  65                 /* check power mode. */
  66                 while(!(readl(S5P_G3D_STATUS) & 0x7));
  67
  68                 /* CLK_GATE_BLOCK(g3d to pass). */
  69                 reg = readl(S5P_CLKGATE_BLOCK);
  70                 reg |= 1 << 3;
  71
  72                 writel(reg, S5P_CLKGATE_BLOCK);
  73         } else {
  74                 /* CLK_GATE_BLOCK(g3d to pass). */
  75                 reg = readl(S5P_CLKGATE_BLOCK);
  76                 reg &= ~(1 << 3);
  77
  78                 writel(reg, S5P_CLKGATE_BLOCK);
  79
  80                 /* G3D_CONFIGURATION. */
  81                 writel(0x0, S5P_G3D_CONFIGURATION);
  82                 /* check power mode. */
  83                 while(((readl(S5P_G3D_STATUS) & 0x7) != 0));
  84         }
  85
  86         return 0;
  87 }
  88
  89 int universal_mali_setup_clock(const char *sclk_name, const char *pclk_name,
  90                                 unsigned int rate)
  91 {
  92         struct clk *sclk = NULL;
  93         struct clk *pclk = NULL;
  94
  95         sclk = clk_get(NULL, sclk_name);
  96         if (IS_ERR(sclk)) {
  97                 dev_err(NULL, "failed to get %s clock.\n", sclk_name);
  98                 goto err_clk;
  99         }
 100
 101         pclk = clk_get(NULL, pclk_name);
 102         if (IS_ERR(pclk)) {
 103                 dev_err(NULL, "failed to get %s clock.\n", pclk_name);
 104                 goto err_clk;
 105         }
 106
 107         clk_set_parent(sclk, pclk);
 108
 109         if (rate)
 110                 clk_set_rate(sclk, rate);
 111
 112         dev_dbg(NULL, "set parent clock of %s to %s\n", sclk_name, pclk_name);
 113
 114         clk_put(sclk);
 115         clk_put(pclk);
 116
 117         return 0;
 118
 119 err_clk:
 120         clk_put(sclk);
 121         clk_put(pclk);
 122
 123         return -EINVAL;
 124
 125 }