2 * Copyright (C) 2010 Samsung Electronics
5 #include <linux/kernel.h>
6 #include <linux/module.h>
7 #include <linux/init.h>
10 #include <mach/gpio.h>
15 #include "gpio-mobile.h"
16 #include "gpio-universal.h"
19 * Please describe the how to setup the pins.
20 * E.g., what's the correct setings for I2C, PULL_UP or PULL_NONE?
30 /* UART 0 for BT & 1 for GPS */
31 static const struct s5p_gpio_group group_a0[] __initdata = {
32 PIN(0, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
33 PIN(1, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
34 PIN(2, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
35 PIN(3, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
36 PIN(4, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
37 PIN(5, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
38 PIN(6, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
39 PIN(7, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
42 /* UART 2 for debug & 3 for CP */
43 static const struct s5p_gpio_group group_a1[] __initdata = {
44 PIN(0, SFN(0x2), NONE, XXXXXX, DRV1X, INPUT, NOP),
45 PIN(1, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
47 PIN(2, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
48 PIN(3, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
49 PIN(4, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* AP_FLM_RXD_2.8V */
50 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP), /* AP_FLM_TXD_2.8V */
53 static const struct s5p_gpio_group group_b[] __initdata = {
57 PIN(2, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
58 PIN(3, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
62 PIN(6, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
63 PIN(7, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
66 static const struct s5p_gpio_group group_c0[] __initdata = {
67 PIN(0, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
69 PIN(2, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
70 PIN(3, SFN(0x2), NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
71 PIN(4, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
74 static const struct s5p_gpio_group group_c1[] __initdata = {
79 PIN(3, SFN(0x4), NONE, PULLUP, DRV1X, INPUT, NOP),
80 PIN(4, SFN(0x4), NONE, PULLUP, DRV1X, INPUT, NOP),
83 static const struct s5p_gpio_group group_d0[] __initdata = {
85 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP), /* VIBTONE_PWM */
87 PIN(2, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
88 PIN(3, SFN(0x3), NONE, PULLUP, DRV1X, INPUT, NOP),
91 static const struct s5p_gpio_group group_d1[] __initdata = {
93 PIN(0, SFN(0x2), NONE, PULLUP, DRV1X, INPUT, NOP),
94 PIN(1, SFN(0x2), NONE, PULLUP, DRV1X, INPUT, NOP),
96 PIN(2, SFN(0x2), NONE, PULLUP, DRV1X, INPUT, NOP),
97 PIN(3, SFN(0x2), NONE, PULLUP, DRV1X, INPUT, NOP),
100 static const struct s5p_gpio_group group_e0[] __initdata = {
101 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* EARPATH_SEL */
102 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* HDMI_EN1 */
103 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* MICBIAS_EN */
104 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* GPS_EN */
105 /* GPS_nRST (active low) is connected with external PULLUP */
106 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT1, NOP),
109 static const struct s5p_gpio_group group_e1_rev01[] __initdata = {
110 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* USB_SDA */
111 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* USB_SCL */
112 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* BT_EN */
113 /* Workaround: H/W bug there's unnecessary register 1K */
114 /* FIXME It shoulde be OUTPUT0 */
115 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT1, NOP), /* MASSMEMORY_EN */
116 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP), /* BT_nRST */
117 PIN(5, SFN(0xf), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* MSENSE_nINT */
118 PIN(6, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* BOOT_MODE */
119 PIN(7, SFN(0xf), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* TSP_INT */
121 #define group_e1_rev02 group_e1_rev01
123 static const struct s5p_gpio_group group_e1_rev03[] __initdata = {
124 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* USB_SDA */
125 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* USB_SCL */
126 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* BT_EN */
127 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* MASSMEMORY_EN */
128 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP), /* BT_nRST */
129 PIN(5, SFN(0xf), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* MSENSE_nINT */
130 PIN(6, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* BOOT_MODE */
131 PIN(7, SFN(0xf), NONE, PULLUP, DRV1X, INPUT, PULLDOWN), /* TSP_INT */
134 static const struct s5p_gpio_group group_e2[] __initdata = {
136 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
138 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
139 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* 8M_CORE_EN */
140 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* TSP_LDO_EN */
141 /* TA_CURRENT_SEL (active low) */
142 PIN(4, SFN(0x0), NONE, PULLUP, DRV1X, INPUT, PULLDOWN),
143 /* CAM_MEGA_nRST (active low) */
144 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
147 static const struct s5p_gpio_group group_e3_rev01[] __initdata = {
148 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* CAM_PWR_EN1 */
149 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* WLAN_EN */
150 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* OLED_DET */
151 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* 3_TOUCH_EN */
152 PIN(4, SFN(0xf), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* FM_INT */
153 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP), /* FM_nRST */
155 /* Connected with external PULLUP */
156 PIN(7, SFN(0xf), NONE, NOP, DRV1X, INPUT, NOP), /* 3_TOUCH_INT */
159 static const struct s5p_gpio_group group_e3_rev02[] __initdata = {
160 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* CAM_PWR_EN1 */
161 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* WLAN_EN */
162 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* OLED_DET */
163 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* 3_TOUCH_EN */
164 PIN(4, SFN(0xf), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* FM_INT */
165 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP), /* FM_nRST */
166 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* EAR_MICBIAS_EN */
167 /* Connected with external PULLUP */
168 PIN(7, SFN(0xf), NONE, NOP, DRV1X, INPUT, NOP), /* 3_TOUCH_INT */
170 #define group_e3_rev03 group_e3_rev02
172 static const struct s5p_gpio_group group_e4[] __initdata = {
173 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* 3_TOUCH_SDA */
174 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN), /* 3_TOUCH_SCL */
175 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* AP_SDA */
176 PIN(3, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* AP_SCL */
177 /* CAM_LEVEL_EN1 (active low) */
178 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
179 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* CAM_LEVEL_EN2 */
180 /* CAM_VGA_nSTBY (active low) */
181 PIN(6, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
182 /* CAM_VGA_nRST (active low) */
183 PIN(7, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
187 static const struct s5p_gpio_group group_f0[] __initdata = {
188 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
189 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
190 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
191 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
192 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
193 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
194 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
195 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
198 static const struct s5p_gpio_group group_f1[] __initdata = {
199 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
200 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
201 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
202 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
203 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
204 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
205 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
206 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
209 static const struct s5p_gpio_group group_f2[] __initdata = {
210 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
211 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
212 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
213 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
214 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
215 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
216 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
217 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
220 static const struct s5p_gpio_group group_f3[] __initdata = {
221 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
222 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
223 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
224 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
230 static const struct s5p_gpio_group group_j0[] __initdata = {
231 PIN(0, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
232 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
233 PIN(2, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
234 PIN(3, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
235 PIN(4, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
236 PIN(5, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
237 PIN(6, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
238 PIN(7, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
241 static const struct s5p_gpio_group group_j1[] __initdata = {
242 PIN(0, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
243 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
244 PIN(2, SFN(0x2), NONE, NOP, DRV4X, INPUT, PULLDOWN),
245 PIN(3, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
249 static const struct s5p_gpio_group group_k0[] __initdata = {
250 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
251 PIN(1, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
253 PIN(3, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
254 PIN(4, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
255 PIN(5, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
256 PIN(6, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
259 static const struct s5p_gpio_group group_k1[] __initdata = {
263 PIN(3, SFN(0x3), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
264 PIN(4, SFN(0x3), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
265 PIN(5, SFN(0x3), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
266 PIN(6, SFN(0x3), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
269 static const struct s5p_gpio_group group_k2[] __initdata = {
270 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
271 PIN(1, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
272 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
273 PIN(3, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
274 PIN(4, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
275 PIN(5, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
276 PIN(6, SFN(0x2), NONE, PULLUP, DRV4X, OUTPUT0, NOP),
279 static const struct s5p_gpio_group group_k3[] __initdata = {
280 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
281 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
282 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
283 PIN(3, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
284 PIN(4, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
285 PIN(5, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
286 PIN(6, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
289 /* Internal GPS for Rev0.1 */
290 static const struct s5p_gpio_group group_l0_rev01[] __initdata = {
291 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
292 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
293 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
294 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
295 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
296 PIN(5, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN),
297 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
298 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
301 static const struct s5p_gpio_group group_l1_rev01[] __initdata = {
302 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
303 PIN(1, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
304 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
307 static const struct s5p_gpio_group group_l2_rev01[] __initdata = {
310 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
311 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
312 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
313 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
318 /* No Internal GPS for Rev 0.2 and more */
319 static const struct s5p_gpio_group group_l0[] __initdata = {
330 static const struct s5p_gpio_group group_l1[] __initdata = {
336 static const struct s5p_gpio_group group_l2[] __initdata = {
340 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* 2MIC_PWDN */
341 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT1, NOP), /* 2MIC_RST */
342 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* 2MIC_EN */
347 /* External and Alive block so no powerdown registers */
348 static const struct s5p_gpio_group group_x0_rev01[] = {
349 EXTPIN(0, SFN(0x0), NONE, PULLDOWN, DRV1X),
350 EXTPIN(1, SFN(0x0), NONE, PULLDOWN, DRV1X),
351 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
352 EXTPIN(3, SFN(0x0), NONE, NOP, DRV1X),
353 EXTPIN(4, SFN(0x0), NONE, NOP, DRV1X),
354 EXTPIN(5, SFN(0x1), LOW, NOP, DRV1X),
355 EXTPIN(6, SFN(0x1), LOW, NOP, DRV1X),
356 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
359 /* External and Alive block so no powerdown registers */
360 static const struct s5p_gpio_group group_x1_rev01[] = {
361 /* IPC_SLAVE_WAKEUP */
362 EXTPIN(0, SFN(0x1), LOW, PULLDOWN, DRV1X),
363 /* IPC_HOST_WAKEUP */
364 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
366 EXTPIN(2, SFN(0x1), LOW, NOP, DRV1X),
367 EXTPIN(3, SFN(0x0), NONE, PULLDOWN, DRV1X), /* TP */
368 /* CP_PMU_RST (active low) */
369 EXTPIN(4, SFN(0x1), LOW, NOP, DRV1X),
371 EXTPIN(5, SFN(0x0), NONE, PULLDOWN, DRV1X),
373 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
374 EXTPIN(7, SFN(0x1), LOW, NOP, DRV1X), /* TP */
377 /* External and Alive block so no powerdown registers */
378 static const struct s5p_gpio_group group_x2_rev01[] = {
379 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X),
380 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
381 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
382 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
384 EXTPIN(4, SFN(0x0), NONE, PULLDOWN, DRV1X),
386 EXTPIN(5, SFN(0xf), NONE, PULLDOWN, DRV1X),
388 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
389 /* nPOWER (Active low) */
390 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
393 /* External and Alive block so no powerdown registers */
394 static const struct s5p_gpio_group group_x3_rev01[] = {
395 /* JACK_nINT (active low) */
396 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X),
397 EXTPIN(1, SFN(0x1), LOW, NOP, DRV1X), /* BT_WAKE */
398 /* DET_3.5 (active low) */
399 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
400 EXTPIN(3, SFN(0x1), LOW, NOP, DRV1X), /* GLNA_ON */
401 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X), /* T_FLASH_DETECT */
402 EXTPIN(5, SFN(0xf), NONE, NOP, DRV1X), /* OK_KEY */
403 EXTPIN(6, SFN(0x0), NONE, NOP, DRV1X), /* EAR_SEND_END */
404 EXTPIN(7, SFN(0x0), NONE, NOP, DRV1X), /* HDMI_HPD */
407 /* External and Alive block so no powerdown registers */
408 static const struct s5p_gpio_group group_x0_rev02[] = {
409 EXTPIN(0, SFN(0x0), NONE, PULLDOWN, DRV1X), /* GYRO_INT */
410 EXTPIN(1, SFN(0x0), NONE, PULLDOWN, DRV1X), /* GYRO_INT2 */
411 EXTPIN(2, SFN(0xf), NONE, PULLDOWN, DRV1X), /* PS_ALS_INT */
412 /* connected with extneral PULLUP */
413 EXTPIN(3, SFN(0x0), NONE, NOP, DRV1X), /* VARM_OUTPUT_SEL_A */
414 /* connected with extneral PULLUP */
415 EXTPIN(4, SFN(0x0), NONE, NOP, DRV1X), /* VARM_OUTPUT_SEL_B */
416 EXTPIN(5, SFN(0x1), LOW, NOP, DRV1X), /* BUCK1_EN_A */
417 EXTPIN(6, SFN(0x1), LOW, NOP, DRV1X), /* BUCK1_EN_B */
418 /* connected with extneral PULLUP */
419 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X), /* AP_PMIC_IRQ */
422 /* External and Alive block so no powerdown registers */
423 static const struct s5p_gpio_group group_x1_rev02[] = {
424 /* IPC_SLAVE_WAKEUP */
425 EXTPIN(0, SFN(0x1), LOW, PULLDOWN, DRV1X),
426 /* IPC_HOST_WAKEUP */
427 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
429 EXTPIN(2, SFN(0x1), LOW, NOP, DRV1X),
430 /* SUSPEND_REQUEST_HSIC */
431 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
432 /* CP_PMU_RST (active low) */
433 EXTPIN(4, SFN(0x1), LOW, NOP, DRV1X),
435 EXTPIN(5, SFN(0x0), NONE, PULLDOWN, DRV1X),
437 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
438 /* Removed NFC_IRQ so set OUTPUT LOW */
439 EXTPIN(7, SFN(0x1), LOW, NOP, DRV1X),
442 /* External and Alive block so no powerdown registers */
443 static const struct s5p_gpio_group group_x2_rev02[] = {
444 /* connected with extneral PULLUP */
445 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X), /* VOL_UP */
446 /* connected with extneral PULLUP */
447 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X), /* VOL_DOWN */
448 /* connected with extneral PULLUP */
449 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X), /* CAM_HALF */
450 /* connected with extneral PULLUP */
451 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X), /* CAM_FULL */
452 EXTPIN(4, SFN(0xf), NONE, PULLDOWN, DRV1X), /* ACC_INT */
454 EXTPIN(5, SFN(0xf), NONE, PULLDOWN, DRV1X),
456 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
457 /* connected with extneral PULLUP */
458 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X), /* nPOWER (Active low) */
461 /* External and Alive block so no powerdown registers */
462 static const struct s5p_gpio_group group_x3_rev02[] = {
463 /* JACK_nINT (active low) */
464 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X),
465 EXTPIN(1, SFN(0x1), LOW, NOP, DRV1X), /* BT_WAKE */
466 /* DET_3.5 (active low) */
467 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
468 EXTPIN(3, SFN(0x1), LOW, NOP, DRV1X), /* NC */
469 /* connected with extneral PULLUP */
470 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X), /* T_FLASH_DETECT */
471 /* connected with extneral PULLUP */
472 EXTPIN(5, SFN(0xf), NONE, NOP, DRV1X), /* OK_KEY */
473 EXTPIN(6, SFN(0x0), NONE, PULLDOWN, DRV1X), /* EAR_SEND_END */
474 EXTPIN(7, SFN(0x0), NONE, NOP, DRV1X), /* HDMI_HPD */
477 #define group_x0_rev03 group_x0_rev02
478 #define group_x2_rev03 group_x2_rev02
479 #define group_x3_rev03 group_x3_rev02
481 /* External and Alive block so no powerdown registers */
482 static const struct s5p_gpio_group group_x1_rev03[] = {
483 /* IPC_SLAVE_WAKEUP */
484 EXTPIN(0, SFN(0x1), LOW, PULLDOWN, DRV1X),
485 /* IPC_HOST_WAKEUP */
486 EXTPIN(1, SFN(0xf), NONE, PULLDOWN, DRV1X),
488 EXTPIN(2, SFN(0x1), LOW, NOP, DRV1X),
489 /* SUSPEND_REQUEST_HSIC */
490 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
491 /* CP_PMU_RST (active low) */
492 EXTPIN(4, SFN(0x1), LOW, NOP, DRV1X),
494 EXTPIN(5, SFN(0x0), NONE, PULLDOWN, DRV1X),
496 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
498 EXTPIN(7, SFN(0xf), NONE, PULLUP, DRV1X),
501 /* FIXME please set the correct SFN */
502 static const struct s5p_gpio_group group_y0[] __initdata = {
503 PIN(0, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
504 PIN(1, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
505 PIN(2, SKIP_SFN, NONE, XXXXXX, DRV1X, OUTPUT1, NOP),
506 PIN(3, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
507 PIN(4, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
508 PIN(5, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
511 static const struct s5p_gpio_group group_y1[] __initdata = {
512 PIN(0, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
513 PIN(1, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
514 PIN(2, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
515 PIN(3, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
518 static const struct s5p_gpio_group group_y2[] __initdata = {
519 PIN(0, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
520 PIN(1, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
521 PIN(2, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, NOP),
522 PIN(3, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
523 PIN(4, SKIP_SFN, NONE, XXXXXX, DRV1X, OUTPUT1, NOP),
524 PIN(5, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
527 static const struct s5p_gpio_group group_y3_rev01[] __initdata = {
530 PIN(1, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
533 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
535 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
538 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
542 static const struct s5p_gpio_group group_y3_rev02[] __initdata = {
545 PIN(1, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
548 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
550 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
551 /* ACTIVE_STATE_HSIC */
552 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
554 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
558 static const struct s5p_gpio_group group_y3_rev03[] __initdata = {
559 /* NFC_SCL_1.8V: pull-up to VCC_1.8V_PDA R312 not detached */
560 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
562 PIN(1, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
563 /* NFC_SDA_1.8V: pull-up to VCC_1.8V_PDA R311 not detached */
564 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
566 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
568 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
569 /* ACTIVE_STATE_HSIC */
570 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
572 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
574 PIN(7, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
577 static const struct s5p_gpio_group group_y4_rev01[] __initdata = {
578 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* FUEL_SDA */
579 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* FUEL_SCL */
580 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* PDA_ACTIVE */
581 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP), /* LCD_nCS */
583 /* MLCD_RST (active low) */
584 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
585 /* RESET_REQ_N (active low) */
586 PIN(6, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
587 PIN(7, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT1, NOP), /* UART_SEL */
589 #define group_y4_rev02 group_y4_rev01
591 static const struct s5p_gpio_group group_y4_rev03[] __initdata = {
592 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* FUEL_SDA */
593 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP), /* FUEL_SCL */
594 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP), /* PDA_ACTIVE */
595 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP), /* LCD_nCS */
596 PIN(4, SFN(0x0), NONE, NOP, DRV1X, OUTPUT1, NOP), /* NFC_FIRMWARE: NO IDEA HOW TO SET THIS UP */
597 /* MLCD_RST (active low) */
598 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
599 /* RESET_REQ_N (active low) */
600 PIN(6, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
601 PIN(7, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT1, NOP), /* UART_SEL */
604 /* Internal Muxed OneNAND */
605 static const struct s5p_gpio_group group_y5[] __initdata = {
606 PIN(0, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
607 PIN(1, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
608 PIN(2, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
609 PIN(3, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
610 PIN(4, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
611 PIN(5, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
612 PIN(6, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
613 PIN(7, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
616 static const struct s5p_gpio_group group_y6[] __initdata = {
617 PIN(0, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
618 PIN(1, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
619 PIN(2, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
620 PIN(3, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
621 PIN(4, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
622 PIN(5, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
623 PIN(6, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
624 PIN(7, SFN(0x2), NONE, NOP, DRV2X, OUTPUT0, NOP),
627 static const struct s5p_gpio_group group_z[] __initdata = {
628 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
630 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
631 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
632 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
637 /* Note: It contains the latest borad revision configuration */
638 static struct s5p_gpio_group_info universal_gpios[] __refdata = {
640 GPIO_(GROUP_A0, S5P_VA_GPIO, 0x000, group_a0),
641 GPIO_(GROUP_A1, S5P_VA_GPIO, 0x020, group_a1),
642 GPIO_(GROUP_B, S5P_VA_GPIO, 0x040, group_b),
643 GPIO_(GROUP_C0, S5P_VA_GPIO, 0x060, group_c0),
644 GPIO_(GROUP_C1, S5P_VA_GPIO, 0x080, group_c1),
645 GPIO_(GROUP_D0, S5P_VA_GPIO, 0x0A0, group_d0),
646 GPIO_(GROUP_D1, S5P_VA_GPIO, 0x0C0, group_d1),
647 GPIO_(GROUP_E0, S5P_VA_GPIO, 0x0E0, group_e0),
648 GPIO_(GROUP_E1, S5P_VA_GPIO, 0x100, group_e1_rev02),
649 GPIO_(GROUP_E2, S5P_VA_GPIO, 0x120, group_e2),
650 GPIO_(GROUP_E3, S5P_VA_GPIO, 0x140, group_e3_rev02),
651 GPIO_(GROUP_E4, S5P_VA_GPIO, 0x160, group_e4),
652 GPIO_(GROUP_F0, S5P_VA_GPIO, 0x180, group_f0),
653 GPIO_(GROUP_F1, S5P_VA_GPIO, 0x1A0, group_f1),
654 GPIO_(GROUP_F2, S5P_VA_GPIO, 0x1C0, group_f2),
655 GPIO_(GROUP_F3, S5P_VA_GPIO, 0x1E0, group_f3),
657 GPIO_(GROUP_J0, S5P_VA_GPIO2, 0x000, group_j0),
658 GPIO_(GROUP_J1, S5P_VA_GPIO2, 0x020, group_j1),
659 GPIO_(GROUP_K0, S5P_VA_GPIO2, 0x040, group_k0),
660 GPIO_(GROUP_K1, S5P_VA_GPIO2, 0x060, group_k1),
661 GPIO_(GROUP_K2, S5P_VA_GPIO2, 0x080, group_k2),
662 GPIO_(GROUP_K3, S5P_VA_GPIO2, 0x0A0, group_k3),
663 GPIO_(GROUP_L0, S5P_VA_GPIO2, 0x0C0, group_l0),
664 GPIO_(GROUP_L1, S5P_VA_GPIO2, 0x0E0, group_l1),
665 GPIO_(GROUP_L2, S5P_VA_GPIO2, 0x100, group_l2),
666 GPIO_(GROUP_Y0, S5P_VA_GPIO2, 0x120, group_y0),
667 GPIO_(GROUP_Y1, S5P_VA_GPIO2, 0x140, group_y1),
668 GPIO_(GROUP_Y2, S5P_VA_GPIO2, 0x160, group_y2),
669 GPIO_(GROUP_Y3, S5P_VA_GPIO2, 0x180, group_y3_rev02),
670 GPIO_(GROUP_Y4, S5P_VA_GPIO2, 0x1A0, group_y4_rev02),
671 GPIO_(GROUP_Y5, S5P_VA_GPIO2, 0x1C0, group_y5),
672 GPIO_(GROUP_Y6, S5P_VA_GPIO2, 0x1E0, group_y6),
673 /* External GPIOs & Alive block */
674 GPIO_(GROUP_X0, S5P_VA_GPIO2, 0xC00, group_x0_rev02),
675 GPIO_(GROUP_X1, S5P_VA_GPIO2, 0xC20, group_x1_rev02),
676 GPIO_(GROUP_X2, S5P_VA_GPIO2, 0xC40, group_x2_rev02),
677 GPIO_(GROUP_X3, S5P_VA_GPIO2, 0xC60, group_x3_rev02),
679 GPIO_(GROUP_Z, S5P_VA_GPIO3, 0x000, group_z),
682 static int mobile_gpios[] = {
683 [GPIO_EARPATH_SEL] = S5PV310_GPE0(0),
684 [GPIO_MICBIAS_EN] = S5PV310_GPE0(2),
685 [GPIO_DET_3_5] = S5PV310_GPX3(2),
686 [GPIO_2MIC_EN] = S5PV310_GPL2(5),
687 [GPIO_EAR_MICBIAS_EN] = S5PV310_GPE3(6),
688 [GPIO_IPC_SLAVE_WAKEUP] = S5PV310_GPX1(0),
689 [GPIO_IPC_HOST_WAKEUP] = S5PV310_GPX1(1),
690 [GPIO_CP_ON] = S5PV310_GPX1(2),
691 [GPIO_SUSPEND_REQUEST_HSIC] = S5PV310_GPX1(3),
692 [GPIO_CP_PMU_RST] = S5PV310_GPX1(4),
693 [GPIO_PHONE_ACTIVE] = S5PV310_GPX1(6),
694 [GPIO_PDA_ACTIVE] = S5PV310_GPY4(2),
695 [GPIO_RESET_REQ_N] = S5PV310_GPY4(6),
696 [GPIO_CAM_VGA_NRST] = S5PV310_GPE4(7),
697 [GPIO_CAM_VGA_NSTBY] = S5PV310_GPE4(6),
698 [GPIO_CAM_MEGA_NRST] = S5PV310_GPE2(5),
699 [GPIO_CAM_LEVEL_EN1] = S5PV310_GPE4(4),
700 [GPIO_CAM_LEVEL_EN2] = S5PV310_GPE4(5),
703 static int mobile_gpios_rev01[] = {
704 [GPIO_ACTIVE_STATE_HSIC - GPIO_REV] = S5PV310_GPX1(7),
707 static int mobile_gpios_rev02[] = {
708 [GPIO_ACTIVE_STATE_HSIC - GPIO_REV] = S5PV310_GPY3(5),
711 struct mobile_gpios_data universal_data;
713 void __init mobile_gpios_init_universal(void)
715 int hwrev = system_rev & 0xFF;
717 printk("Mobile GPIOs init - HW Rev %d\n", hwrev);
722 universal_gpios[GROUP_E1].group = group_e1_rev01;
723 universal_gpios[GROUP_E3].group = group_e3_rev01;
724 universal_gpios[GROUP_L0].group = group_l0_rev01;
725 universal_gpios[GROUP_L1].group = group_l1_rev01;
726 universal_gpios[GROUP_L2].group = group_l2_rev01;
727 universal_gpios[GROUP_Y3].group = group_y3_rev01;
728 universal_gpios[GROUP_Y4].group = group_y4_rev01;
729 universal_gpios[GROUP_X0].group = group_x0_rev01;
730 universal_gpios[GROUP_X1].group = group_x1_rev01;
731 universal_gpios[GROUP_X2].group = group_x2_rev01;
732 universal_gpios[GROUP_X3].group = group_x3_rev01;
733 universal_data.infos = universal_gpios;
735 universal_data.x0 = (struct s5p_gpio_group *)group_x0_rev01;
736 universal_data.x1 = (struct s5p_gpio_group *)group_x1_rev01;
737 universal_data.x2 = (struct s5p_gpio_group *)group_x2_rev01;
738 universal_data.x3 = (struct s5p_gpio_group *)group_x3_rev01;
739 universal_data.gpios = mobile_gpios_rev01;
741 universal_data.infos_size = ARRAY_SIZE(univesal_gpios);
742 universal_data.x0_size = ARRAY_SIZE(group_x0_rev02);
743 universal_data.x1_size = ARRAY_SIZE(group_x1_rev02);
744 universal_data.x2_size = ARRAY_SIZE(group_x2_rev02);
745 universal_data.x3_size = ARRAY_SIZE(group_x3_rev02);
746 universal_data.gpios_size = ARRAY_SIZE(mobile_gpios_rev01);
750 * Even though there's NFC chip at schematic
751 * There's no NFC chip since H/W problem
752 * 2MIC NS(A1026A0F): +3mA, JIG(UPWR_LDO_1.8V): +1.8mA
753 * So target is 5.8mA + 3mA = 8.8mA
754 * or 8.8mA + 1.8mA = 10.6mA (when JIG use)
756 universal_gpios[GROUP_E1].group = group_e1_rev02;
757 universal_gpios[GROUP_E3].group = group_e3_rev02;
758 universal_gpios[GROUP_Y3].group = group_y3_rev02;
759 universal_gpios[GROUP_Y4].group = group_y4_rev02;
760 universal_gpios[GROUP_X0].group = group_x0_rev02;
761 universal_gpios[GROUP_X1].group = group_x1_rev02;
762 universal_gpios[GROUP_X2].group = group_x2_rev02;
763 universal_gpios[GROUP_X3].group = group_x3_rev02;
764 universal_data.infos = universal_gpios;
766 universal_data.x0 = (struct s5p_gpio_group *)group_x0_rev02;
767 universal_data.x1 = (struct s5p_gpio_group *)group_x1_rev02;
768 universal_data.x2 = (struct s5p_gpio_group *)group_x2_rev02;
769 universal_data.x3 = (struct s5p_gpio_group *)group_x3_rev02;
770 universal_data.gpios = mobile_gpios_rev02;
772 universal_data.infos_size = ARRAY_SIZE(univesal_gpios);
773 universal_data.x0_size = ARRAY_SIZE(group_x0_rev02);
774 universal_data.x1_size = ARRAY_SIZE(group_x1_rev02);
775 universal_data.x2_size = ARRAY_SIZE(group_x2_rev02);
776 universal_data.x3_size = ARRAY_SIZE(group_x3_rev02);
777 universal_data.gpios_size = ARRAY_SIZE(mobile_gpios_rev02);
781 universal_gpios[GROUP_E1].group = group_e1_rev03;
782 universal_gpios[GROUP_E3].group = group_e3_rev03;
783 universal_gpios[GROUP_Y3].group = group_y3_rev03;
784 universal_gpios[GROUP_Y4].group = group_y4_rev03;
785 universal_gpios[GROUP_X0].group = group_x0_rev03;
786 universal_gpios[GROUP_X1].group = group_x1_rev03;
787 universal_gpios[GROUP_X2].group = group_x2_rev03;
788 universal_gpios[GROUP_X3].group = group_x3_rev03;
789 universal_data.infos = universal_gpios;
791 universal_data.x0 = (struct s5p_gpio_group *)group_x0_rev03;
792 universal_data.x1 = (struct s5p_gpio_group *)group_x1_rev03;
793 universal_data.x2 = (struct s5p_gpio_group *)group_x2_rev03;
794 universal_data.x3 = (struct s5p_gpio_group *)group_x3_rev03;
795 universal_data.gpios = mobile_gpios_rev02;
797 universal_data.infos_size = ARRAY_SIZE(univesal_gpios);
798 universal_data.x0_size = ARRAY_SIZE(group_x0_rev02);
799 universal_data.x1_size = ARRAY_SIZE(group_x1_rev02);
800 universal_data.x2_size = ARRAY_SIZE(group_x2_rev02);
801 universal_data.x3_size = ARRAY_SIZE(group_x3_rev02);
802 universal_data.gpios_size = ARRAY_SIZE(mobile_gpios_rev02);
806 mobile_gpios_register(&universal_data);