2 * Copyright (C) 2010 Samsung Electronics
5 #include <linux/kernel.h>
6 #include <linux/module.h>
7 #include <linux/init.h>
10 #include <mach/gpio.h>
14 #include <plat/gpio-cfg.h>
16 #include "gpio-mobile.h"
20 * Please describe the how to setup the pins.
21 * E.g., what's the correct setings for I2C, PULL_UP or PULL_NONE?
31 /* UART 0 for BT & 1 for GPS */
32 static const struct s5p_gpio_group group_a0[] __initdata = {
33 /* XuRXD[0] BT_UART_RXD */
34 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
35 /* XuTXD[0] BT_UART_TXD */
36 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
37 /* XuCTSn[0] BT_UART_CTS */
38 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
39 /* XuRTSn[0] BT_UART_RTS */
40 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
41 /* XuRXD[1] GPS_UART_RXD */
42 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
43 /* XuTXD[1] GPS_UART_TXD */
44 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
45 /* XuCTSn[1] GPS_UART_N_CTS */
46 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
47 /* XuRTSn[1] GPS_UART_N_RTS */
48 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
51 /* UART 2 for debug & 3 for CP */
52 static const struct s5p_gpio_group group_a1[] __initdata = {
54 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
56 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
57 /* Xi2c2SDA TSP_SDA_2.8V (I2C3: TSP) PU by VTOUCH_VDD2.8V */
58 PIN(2, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
59 /* Xi2c2SCL TSP_SCL_2.8V (I2C3: TSP) PU by VTOUCH_VDD2.8V */
60 PIN(3, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
61 /* XuRXD[3] AP_FLM_RXD_2.8V */
62 PIN(4, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN),
63 /* XuTXD[3] AP_FLM_TXD_2.8V */
64 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
67 static const struct s5p_gpio_group group_b[] __initdata = {
68 /* XspiCLK[0] FM_RST */
69 PIN(0, SFN(0x1), LOW, NONE, DRV1X, KEEP, NOP),
72 /* XspiMISO[0] FM_SDA_2.8V */
73 PIN(2, SFN(0x0), NONE, NONE, DRV1X, INPUT, NOP),
74 /* XspiMOSI[0] FM_SCL_2.8V */
75 PIN(3, SFN(0x0), NONE, NONE, DRV1X, INPUT, NOP),
76 /* XspiCLK[1] WLAN_WAKE (NC) */
80 /* XspiMISO[1] AP_PMIC_SDA (PU by VCC_2.8V_PDA */
81 PIN(6, SFN(0x3), NONE, NONE, DRV1X, INPUT, NOP),
82 /* XspiMOSI[1] AP_PMIC_SCL (PU by VCC_2.8V_PDA */
83 PIN(7, SFN(0x3), NONE, NONE, DRV1X, INPUT, NOP),
86 static const struct s5p_gpio_group group_c0[] __initdata = {
87 /* XIIS1SCLK REC_PCM_CLK */
88 PIN(0, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
91 /* XIIS1LRCK REC_PCM_SYNC */
92 PIN(2, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
93 /* XIIS1SDI REC_PCM_IN */
94 PIN(3, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN),
95 /* XIIS1SDO REC_PCM_OUT */
96 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
99 static const struct s5p_gpio_group group_c1[] __initdata = {
100 /* Xpcm2SCLk VT_SDA_1.8V */
101 PIN(0, SFN(0x0), NONE, NONE, DRV1X, INPUT, NOP),
102 /* Xpcm2EXTCLK CP_ON: Inefficient? */
103 PIN(1, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
104 /* Xpcm2FSYNC VT_SCL_1.8V */
105 PIN(2, SFN(0x0), NONE, NONE, DRV1X, INPUT, NOP),
106 /* Xpcm2SIN CODEC_SDA_1.8V PU by VCC_1.8V_PDA */
107 PIN(3, SFN(0x4), NONE, NOP, DRV1X, INPUT, NOP),
108 /* Xpcm2SOUT CODEC_SCL_1.8V PU by VCC_1.8V_PDA */
109 PIN(4, SFN(0x4), NONE, NOP, DRV1X, INPUT, NOP),
112 static const struct s5p_gpio_group group_d0[] __initdata = {
115 /* XpwmTOUT[1] VIBTONE_PWM */
116 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
117 /* XpwmTOUT[2] MSENSOR_SDA_2.8V = MHL_SDA_2.8VV PU by VCC_2.8V_PDA */
118 PIN(2, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
119 /* XpwmTOUT[3] MSENSOR_SCL_2.8V = MHL_SCL_2.8V PU by VCC_2.8V_PDA */
120 PIN(3, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
123 static const struct s5p_gpio_group group_d1[] __initdata = {
124 /* Xi2c0SDA 8M_CAM_SDA_2.8V PU by VCC_2.8V_PDA */
125 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
126 /* Xi2c0SCL 8M_CAM_SCL_2.8V PU by VCC_2.8V_PDA */
127 PIN(1, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
128 /* Xi2c1SDA SENSE_SDA_2.8V PU by VCC_2.8V_PDA */
129 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
130 /* Xi2c1SCL SENSE_SCL_2.8V PU by VCC_2.8V_PDA */
131 PIN(3, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
134 static const struct s5p_gpio_group group_e0[] __initdata = {
137 /* XmdmCSn AP_AGPS_TSYNC */
138 PIN(1, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
141 /* XmdmIRQn GPS_EN */
142 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
143 /* XmdmADVN GPS_nRST */
144 PIN(4, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
147 static const struct s5p_gpio_group group_e1[] __initdata = {
148 /* XmdmADDR[0] HW_REV0 PU by VCC_1.8V_PDA */
149 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
150 /* XmdmADDR[1] HW_REV1 PU by VCC_1.8V_PDA */
151 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
152 /* XmdmADDR[2] HW_REV2 PU by VCC_1.8V_PDA */
153 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
154 /* XmdmADDR[3] HW_REV3 PU by VCC_1.8V_PDA */
155 PIN(3, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
156 /* XmdmADDR[4] MIC_BIAS */
157 PIN(4, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
166 static const struct s5p_gpio_group group_e2[] __initdata = {
167 /* XmdmADDR[8] SUB_MICBIAS_EN */
168 PIN(0, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
169 /* XmdmADDR[9] CAM_IO_EN */
170 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
171 /* XmdmADDR[10] VT_CAM_1.5V_EN */
172 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
173 /* XmdmADDR[11] PS_ON */
174 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
175 /* XmdmADDR[12] EAR_MICBIAS_EN */
176 PIN(4, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
177 /* XmdmADDR[13] 8M_1.2V_EN */
178 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
181 static const struct s5p_gpio_group group_e3[] __initdata = {
200 static const struct s5p_gpio_group group_e4[] __initdata = {
205 /* XmdmDATA[10] NC */
207 /* XmdmDATA[11] NC */
209 /* XmdmDATA[12] NC */
211 /* XmdmDATA[13] NC */
213 /* XmdmDATA[14] NC */
215 /* XmdmDATA[15] NC */
220 static const struct s5p_gpio_group group_f0[] __initdata = {
221 /* XvHSYNC LCD_HSYNC */
222 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
223 /* XvVSYNC LCD_VSYNC */
224 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
226 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
227 /* XvVCLK LCD_PCLK CAP-Ground */
228 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
230 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
232 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
234 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
236 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
239 static const struct s5p_gpio_group group_f1[] __initdata = {
241 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
243 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
245 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
247 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
249 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
251 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
253 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
255 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
258 static const struct s5p_gpio_group group_f2[] __initdata = {
260 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
262 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
264 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
266 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
268 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
270 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
272 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
274 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
277 static const struct s5p_gpio_group group_f3[] __initdata = {
279 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
281 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
283 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
285 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
286 /* XvVSYNC_LDI MHL_RST */
287 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
288 /* XvSYS_OE MHL_INT PD by Ground*/
289 PIN(5, SFN(0xF), NONE, NOP, DRV1X, INPUT, NOP),
293 static const struct s5p_gpio_group group_j0[] __initdata = {
294 /* XciPCLK CAM_PCLK_F */
296 /* XciVSYNC CAM_VSYNC */
298 /* XciHREF CAM_HSYNC */
300 /* XciDATA[0] CAM_D(0) */
302 /* XciDATA[1] CAM_D(1) */
304 /* XciDATA[2] CAM_D(2) */
306 /* XciDATA[3] CAM_D(3) */
308 /* XciDATA[4] CAM_D(4) */
312 static const struct s5p_gpio_group group_j1[] __initdata = {
313 /* XciDATA[5] CAM_D(5) */
315 /* XciDATA[6] CAM_D(6) */
317 /* XciDATA[7] CAM_D(7) */
319 /* XciCLKenb CAM_MCLK */
320 PIN(3, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
321 /* XciFIELD MHL_WAKE_UP */
322 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
325 static const struct s5p_gpio_group group_k0[] __initdata = {
326 /* Xmmc0CLK NAND_CLK */
327 PIN(0, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
328 /* Xmmc0CMD NAND_CMD */
329 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
330 /* Xmmc0CDn eMMC_EN */
331 PIN(2, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT1, NOP),
332 /* Xmmc0DATA[0] NAND_D */
333 PIN(3, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
334 /* Xmmc0DATA[1] NAND_D */
335 PIN(4, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
336 /* Xmmc0DATA[2] NAND_D */
337 PIN(5, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
338 /* Xmmc0DATA[3] NAND_D */
339 PIN(6, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
342 static const struct s5p_gpio_group group_k1[] __initdata = {
343 /* Xmmc1CLK 3_TOUCH_SCL_2.8V */
344 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
345 /* Xmmc1CMD CAM_AF_EN */
346 PIN(1, SFN(0x1), LOW, PULLUP, DRV1X, OUTPUT0, NOP),
347 /* Xmmc1CDn 3_TOUCH_SDA_2.8V */
348 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
349 /* Xmmc1DATA[0] NAND_D */
350 PIN(3, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
351 /* Xmmc1DATA[1] NAND_D */
352 PIN(4, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
353 /* Xmmc1DATA[2] NAND_D */
354 PIN(5, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
355 /* Xmmc1DATA[3] NAND_D */
356 PIN(6, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
359 static const struct s5p_gpio_group group_k2[] __initdata = {
360 /* Xmmc2CLK T_FLASH_CLK */
361 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
362 /* Xmmc2CMD T_FLASH_CMD PU by VTF_2.8V */
363 PIN(1, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
364 /* Xmmc2CDn PS_ALS_SDA_2.8V */
365 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
366 /* Xmmc2DATA[0] T_FLASH_D PU by VTF_2.8V */
367 PIN(3, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
369 PIN(4, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
371 PIN(5, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
373 PIN(6, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
376 static const struct s5p_gpio_group group_k3[] __initdata = {
377 /* Xmmc3CLK WLAN_SDIO_CLK */
378 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
379 /* Xmmc3CMD WLAN_SDIO_CMD PU by VCC_2.8V_PDA */
380 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
381 /* Xmmc3CDn PS_ALS_SCL_2.8V */
382 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
383 /* Xmmc3DATA[0] WLAN_SDIO_D PU by VCC_2.8V_PDA */
384 PIN(3, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
386 PIN(4, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
388 PIN(5, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
390 PIN(6, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
393 static const struct s5p_gpio_group group_l0[] __initdata = {
394 /* XGNSS_SYNC BUCK2_EN: MAX8997 SET3 */
395 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
396 /* XGNSS_ISIGN MHL_SEL: LOW->USB, HIGH->MHL*/
397 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
398 /* XGNSS_IMAG GPS_nRST */
400 /* XGNSS_QSIGN TSP_LDO_ON */
401 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
402 /* XGNSS_QMAG BT_EN */
403 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
404 /* XGNSS_MCLK 3_TOUCH_INT */
405 PIN(5, SFN(0xf), NONE, NOP, DRV1X, INPUT, NOP),
406 /* XGNSS_RF_RSTN USB_SEL */
407 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
408 /* XGNSS_CLKREQ OLED_DET */
409 PIN(7, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
412 static const struct s5p_gpio_group group_l1[] __initdata = {
413 /* XGNSS_SCL BT_nRST */
414 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
415 /* XGNSS_SDA HDMI_EN */
416 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
417 /* XGNSS_EPOCH WLAN_EN */
418 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
421 static const struct s5p_gpio_group group_l2[] __initdata = {
422 /* XGNSS_GPIO_0 CAM_VT_nSTBY */
423 PIN(0, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
424 /* XGNSS_GPIO_1 CAM_VT_nRST */
425 PIN(1, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
426 /* XGNSS_GPIO_2 CHG_EN */
427 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
428 /* XGNSS_GPIO_3 DOUBLE_RR */
429 PIN(3, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
430 /* XGNSS_GPIO_4 CHG_ING_N */
431 PIN(4, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
432 /* XGNSS_GPIO_5 TA_nCONNECTED */
433 PIN(5, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
434 /* XGNSS_GPIO_6 NFC_EN */
435 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
436 /* XGNSS_GPIO_7 NFC_FIRMWARE */
437 PIN(7, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
441 static const struct s5p_gpio_group group_x0[] = {
442 /* XEINT[0] GYRO_INT */
443 EXTPIN(0, SFN(0x0), NONE, PULLDOWN, DRV1X),
444 /* XEINT[1] GYRO_FIFO_INT */
445 EXTPIN(1, SFN(0x0), NONE, PULLDOWN, DRV1X),
446 /* XEINT[2] PS_ALS_INT */
447 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
448 /* XEINT[3] BOOT_MODE */
449 EXTPIN(3, SFN(0x0), NONE, NOP, DRV1X),
450 /* XEINT[4] TSP_INT */
451 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
452 /* XEINT[5] BUCK1_EN_A */
453 EXTPIN(5, SFN(0x1), LOW, NOP, DRV1X),
454 /* XEINT[6] BUCK1_EN_B */
455 EXTPIN(6, SFN(0x1), LOW, NOP, DRV1X),
456 /* XEINT[7] AP_PMIC_IRQ PU by VCC_2.8V_PDA */
457 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
461 static const struct s5p_gpio_group group_x1[] = {
462 /* XEINT[8] IPC_SLAVE_WAKEUP */
463 EXTPIN(0, SFN(0x1), LOW, PULLDOWN, DRV1X),
464 /* XEINT[9] IPC_HOST_WAKEUP */
465 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
466 /* XEINT[10] CP_DUMP_INT : Don't know how to set up? */
467 EXTPIN(2, SFN(0xf), NONE, PULLDOWN, DRV1X),
468 /* XEINT[11] SUSPEND_REQUEST_HSIC */
469 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
470 /* XEINT[12] CP_PMU_RST */
471 EXTPIN(4, SFN(0x0), NONE, NOP, DRV1X),
472 /* XEINT[13] ISP_INT */
473 EXTPIN(5, SFN(0x0), NONE, NOP, DRV1X),
474 /* XEINT[14] PHONE_ACTIVE */
475 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
476 /* XEINT[15] NFC_IRQ */
477 EXTPIN(7, SFN(0x0), NONE, NOP, DRV1X),
481 static const struct s5p_gpio_group group_x2[] = {
482 /* XEINT[16] VOL_UP (VCC_2.8V_PDA) */
483 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X),
484 /* XEINT[17] VOL_DOWN (VCC_2.8V_PDA) */
485 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
486 /* XEINT[18] MSENSOR_INT */
487 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
488 /* XEINT[19] FUEL_ALERT */
489 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
490 /* XEINT[20] FM_INT */
491 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
492 /* XEINT[21] WLAN_HOST_WAKE */
493 /* - WLAN_HOST_WAKE is used as Input gpio instead of irq. */
494 EXTPIN(5, SFN(0x0), NONE, PULLDOWN, DRV1X),
495 /* XEINT[22] BT_HOST_WAKE */
496 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
497 /* XEINT[23] nPOWER */
498 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
502 static const struct s5p_gpio_group group_x3[] = {
503 /* XEINT[24] ACC_INT */
504 EXTPIN(0, SFN(0xf), NONE, PULLDOWN, DRV1X),
505 /* XEINT[25] BT_WAKE */
506 EXTPIN(1, SFN(0x1), LOW, NOP, DRV1X),
507 /* XEINT[26] DET_3.5 */
508 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
509 /* XEINT[27] USB_OTG_EN */
510 EXTPIN(3, SFN(0x1), LOW, NOP, DRV1X),
511 /* XEINT[28] T_FLASH_DETECT */
512 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
513 /* XEINT[29] OK_KEY (VCC_2.8V_PDA) */
514 EXTPIN(5, SFN(0xf), NONE, NOP, DRV1X),
515 /* XEINT[30] EAR_SEND_END */
516 EXTPIN(6, SFN(0xf), NONE, NOP, DRV1X),
517 /* XEINT[31] HDMI_HPD */
518 /* - HDMI_HPD uses the third function of gpio
519 instead of using SFN(0xf) in spite of External IRQ. */
520 EXTPIN(7, SFN(0x3), NONE, NOP, DRV1X),
523 static const struct s5p_gpio_group group_y0[] __initdata = {
524 /* Xm0CSn[0] NFC_I2C_SCL */
525 PIN(0, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
526 /* Xm0CSn[1] NFC_I2C_SDA */
527 PIN(1, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
528 /* Xm0CSn[2] POP_nCS */
529 PIN(2, SKIP_SFN, NONE, XXXXXX, DRV1X, OUTPUT1, NOP),
538 static const struct s5p_gpio_group group_y1[] __initdata = {
549 static const struct s5p_gpio_group group_y2[] __initdata = {
564 static const struct s5p_gpio_group group_y3[] __initdata = {
565 /* Xm0ADDR[0] MHL_SDA_1.8V */
566 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
567 /* Xm0ADDR[1] LCD_SCLK */
568 PIN(1, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
569 /* Xm0ADDR[2] MHL_SCL_1.8V */
570 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
572 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
574 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
575 /* ACTIVE_STATE_HSIC */
576 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
577 /* Xm0ADDR[6] GPS_CNTL */
578 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
579 /* Xm0ADDR[7] ISP_RESET (active low) */
580 PIN(7, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
583 static const struct s5p_gpio_group group_y4[] __initdata = {
584 /* Xm0ADDR[8] FUEL_SDA_1.8V PU by VCC_1.8V_PDA */
585 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
586 /* Xm0ADDR[9] FUAL_SCL_1.8V PU by VCC_1.8V_PDA */
587 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
588 /* Xm0ADDR[10] PDA_ACTIVE */
589 PIN(2, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
590 /* Xm0ADDR[11] LCD_nCS */
591 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
594 /* Xm0ADDR[13] MLCD_RST */
595 PIN(5, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
596 /* Xm0ADDR[14] RESET_REQ_N */
597 PIN(6, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
598 /* Xm0ADDR[15] UART_SEL */
599 PIN(7, SKIP_SFN, NONE, NOP, DRV1X, KEEP, NOP),
603 static const struct s5p_gpio_group group_y5[] __initdata = {
622 static const struct s5p_gpio_group group_y6[] __initdata = {
641 static const struct s5p_gpio_group group_z[] __initdata = {
642 /* Xi2s0SCLK MM_I2S_CLK */
643 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
646 /* Xi2s0LRCK MM_I2S_SYNC */
647 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
648 /* Xi2s0SDI MM_I2S_DI */
649 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
650 /* Xi2s0SDO[0] MM_I2S_DO */
651 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
658 /* Note: It contains the latest borad revision configuration */
659 static struct s5p_gpio_group_info p8_gpios[] __refdata = {
661 GPIO_(GROUP_A0, S5P_VA_GPIO, 0x000, group_a0),
662 GPIO_(GROUP_A1, S5P_VA_GPIO, 0x020, group_a1),
663 GPIO_(GROUP_B, S5P_VA_GPIO, 0x040, group_b),
664 GPIO_(GROUP_C0, S5P_VA_GPIO, 0x060, group_c0),
665 GPIO_(GROUP_C1, S5P_VA_GPIO, 0x080, group_c1),
666 GPIO_(GROUP_D0, S5P_VA_GPIO, 0x0A0, group_d0),
667 GPIO_(GROUP_D1, S5P_VA_GPIO, 0x0C0, group_d1),
668 GPIO_(GROUP_E0, S5P_VA_GPIO, 0x0E0, group_e0),
669 GPIO_(GROUP_E1, S5P_VA_GPIO, 0x100, group_e1),
670 GPIO_(GROUP_E2, S5P_VA_GPIO, 0x120, group_e2),
671 GPIO_(GROUP_E3, S5P_VA_GPIO, 0x140, group_e3),
672 GPIO_(GROUP_E4, S5P_VA_GPIO, 0x160, group_e4),
673 GPIO_(GROUP_F0, S5P_VA_GPIO, 0x180, group_f0),
674 GPIO_(GROUP_F1, S5P_VA_GPIO, 0x1A0, group_f1),
675 GPIO_(GROUP_F2, S5P_VA_GPIO, 0x1C0, group_f2),
676 GPIO_(GROUP_F3, S5P_VA_GPIO, 0x1E0, group_f3),
678 GPIO_(GROUP_J0, S5P_VA_GPIO2, 0x000, group_j0),
679 GPIO_(GROUP_J1, S5P_VA_GPIO2, 0x020, group_j1),
680 GPIO_(GROUP_K0, S5P_VA_GPIO2, 0x040, group_k0),
681 GPIO_(GROUP_K1, S5P_VA_GPIO2, 0x060, group_k1),
682 GPIO_(GROUP_K2, S5P_VA_GPIO2, 0x080, group_k2),
683 GPIO_(GROUP_K3, S5P_VA_GPIO2, 0x0A0, group_k3),
684 GPIO_(GROUP_L0, S5P_VA_GPIO2, 0x0C0, group_l0),
685 GPIO_(GROUP_L1, S5P_VA_GPIO2, 0x0E0, group_l1),
686 GPIO_(GROUP_L2, S5P_VA_GPIO2, 0x100, group_l2),
687 GPIO_(GROUP_Y0, S5P_VA_GPIO2, 0x120, group_y0),
688 GPIO_(GROUP_Y1, S5P_VA_GPIO2, 0x140, group_y1),
689 GPIO_(GROUP_Y2, S5P_VA_GPIO2, 0x160, group_y2),
690 GPIO_(GROUP_Y3, S5P_VA_GPIO2, 0x180, group_y3),
691 GPIO_(GROUP_Y4, S5P_VA_GPIO2, 0x1A0, group_y4),
692 GPIO_(GROUP_Y5, S5P_VA_GPIO2, 0x1C0, group_y5),
693 GPIO_(GROUP_Y6, S5P_VA_GPIO2, 0x1E0, group_y6),
694 /* External GPIOs & Alive block */
695 GPIO_(GROUP_X0, S5P_VA_GPIO2, 0xC00, group_x0),
696 GPIO_(GROUP_X1, S5P_VA_GPIO2, 0xC20, group_x1),
697 GPIO_(GROUP_X2, S5P_VA_GPIO2, 0xC40, group_x2),
698 GPIO_(GROUP_X3, S5P_VA_GPIO2, 0xC60, group_x3),
700 GPIO_(GROUP_Z, S5P_VA_GPIO3, 0x000, group_z),
703 static int mobile_gpios[] = {
704 [GPIO_MICBIAS_EN] = S5PV310_GPE1(4),
705 [GPIO_SUB_MICBIAS_EN] = S5PV310_GPE2(0),
706 [GPIO_EAR_MICBIAS_EN] = S5PV310_GPE2(4),
707 [GPIO_nPOWER] = S5PV310_GPX2(7),
708 [GPIO_DET_3_5] = S5PV310_GPX3(2),
709 [GPIO_T_FLASH_DETECT] = S5PV310_GPX3(4),
710 [GPIO_EAR_SEND_END] = S5PV310_GPX3(6),
711 [GPIO_CP_ON] = S5PV310_GPC1(1),
712 [GPIO_IPC_SLAVE_WAKEUP] = S5PV310_GPX1(0),
713 [GPIO_IPC_HOST_WAKEUP] = S5PV310_GPX1(1),
714 [GPIO_CP_DUMP_INT] = S5PV310_GPX1(2),
715 [GPIO_SUSPEND_REQUEST_HSIC] = S5PV310_GPX1(3),
716 [GPIO_CP_PMU_RST] = S5PV310_GPX1(4),
717 [GPIO_PHONE_ACTIVE] = S5PV310_GPX1(6),
718 [GPIO_ACTIVE_STATE_HSIC] = S5PV310_GPY3(5),
719 [GPIO_PDA_ACTIVE] = S5PV310_GPY4(2),
720 [GPIO_RESET_REQ_N] = S5PV310_GPY4(6),
721 [GPIO_USB_OTG_EN] = S5PV310_GPX3(3),
722 [GPIO_MHL_SEL] = S5PV310_GPL0(1),
723 [GPIO_UART_SEL] = S5PV310_GPY4(7),
724 [GPIO_USB_SEL] = S5PV310_GPL0(6),
725 [GPIO_TSP_LDO_ON] = S5PV310_GPL0(3),
726 [GPIO_TSP_INT] = S5PV310_GPX0(4),
727 [GPIO_PS_ALS_INT] = S5PV310_GPX0(2),
728 #if defined(CONFIG_CHARGERCTRL_MAX8922)
729 [GPIO_CHG_EN] = S5PV310_GPL2(2),
730 [GPIO_CHG_ING_N] = S5PV310_GPL2(4),
731 [GPIO_TA_nCONNECTED] = S5PV310_GPL2(5),
735 static unsigned int p8_sleep_gpio_table[][3] = {
736 { S5PV310_GPA0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_UP},
737 { S5PV310_GPA0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
738 { S5PV310_GPA0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
739 { S5PV310_GPA0(3), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE},
740 { S5PV310_GPA0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
741 { S5PV310_GPA0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
742 { S5PV310_GPA0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
743 { S5PV310_GPA0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
745 { S5PV310_GPA1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
746 { S5PV310_GPA1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
747 { S5PV310_GPA1(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
748 { S5PV310_GPA1(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
749 { S5PV310_GPA1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
750 { S5PV310_GPA1(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
752 { S5PV310_GPB(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
753 { S5PV310_GPB(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
754 { S5PV310_GPB(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
755 { S5PV310_GPB(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
756 { S5PV310_GPB(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
757 { S5PV310_GPB(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
758 { S5PV310_GPB(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
759 { S5PV310_GPB(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
761 { S5PV310_GPC0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
762 { S5PV310_GPC0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
763 { S5PV310_GPC0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
764 { S5PV310_GPC0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
765 { S5PV310_GPC0(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
767 { S5PV310_GPC1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
768 { S5PV310_GPC1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
769 { S5PV310_GPC1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
770 { S5PV310_GPC1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
771 { S5PV310_GPC1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
773 { S5PV310_GPD0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
774 { S5PV310_GPD0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, /* NC */
775 { S5PV310_GPD0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
776 { S5PV310_GPD0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
778 { S5PV310_GPD1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
779 { S5PV310_GPD1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
780 { S5PV310_GPD1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
781 { S5PV310_GPD1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
783 { S5PV310_GPE0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
784 { S5PV310_GPE0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
785 { S5PV310_GPE0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
786 { S5PV310_GPE0(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
787 { S5PV310_GPE0(4), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE},
789 { S5PV310_GPE1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
790 { S5PV310_GPE1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
791 { S5PV310_GPE1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
792 { S5PV310_GPE1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
793 { S5PV310_GPE1(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
794 { S5PV310_GPE1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
795 { S5PV310_GPE1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
796 { S5PV310_GPE1(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
798 { S5PV310_GPE2(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_DOWN},
799 { S5PV310_GPE2(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
800 { S5PV310_GPE2(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
801 { S5PV310_GPE2(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
802 { S5PV310_GPE2(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
803 { S5PV310_GPE2(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
805 { S5PV310_GPE3(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
806 { S5PV310_GPE3(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
807 { S5PV310_GPE3(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
808 { S5PV310_GPE3(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
809 { S5PV310_GPE3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
810 { S5PV310_GPE3(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
811 { S5PV310_GPE3(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
812 { S5PV310_GPE3(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
814 { S5PV310_GPE4(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
815 { S5PV310_GPE4(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
816 { S5PV310_GPE4(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
817 { S5PV310_GPE4(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
818 { S5PV310_GPE4(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
819 { S5PV310_GPE4(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
820 { S5PV310_GPE4(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
821 { S5PV310_GPE4(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
823 { S5PV310_GPF0(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
824 { S5PV310_GPF0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
825 { S5PV310_GPF0(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
826 { S5PV310_GPF0(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
827 { S5PV310_GPF0(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
828 { S5PV310_GPF0(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
829 { S5PV310_GPF0(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
830 { S5PV310_GPF0(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
832 { S5PV310_GPF1(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
833 { S5PV310_GPF1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
834 { S5PV310_GPF1(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
835 { S5PV310_GPF1(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
836 { S5PV310_GPF1(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
837 { S5PV310_GPF1(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
838 { S5PV310_GPF1(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
839 { S5PV310_GPF1(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
841 { S5PV310_GPF2(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
842 { S5PV310_GPF2(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
843 { S5PV310_GPF2(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
844 { S5PV310_GPF2(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
845 { S5PV310_GPF2(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
846 { S5PV310_GPF2(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
847 { S5PV310_GPF2(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
848 { S5PV310_GPF2(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
850 { S5PV310_GPF3(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
851 { S5PV310_GPF3(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
852 { S5PV310_GPF3(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
853 { S5PV310_GPF3(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
854 { S5PV310_GPF3(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
855 { S5PV310_GPF3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
857 { S5PV310_GPJ0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
858 { S5PV310_GPJ0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
859 { S5PV310_GPJ0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
860 { S5PV310_GPJ0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
861 { S5PV310_GPJ0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
862 { S5PV310_GPJ0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
863 { S5PV310_GPJ0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
864 { S5PV310_GPJ0(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
866 { S5PV310_GPJ1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
867 { S5PV310_GPJ1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
868 { S5PV310_GPJ1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
869 { S5PV310_GPJ1(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
870 { S5PV310_GPJ1(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
872 { S5PV310_GPK0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
873 { S5PV310_GPK0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
874 { S5PV310_GPK0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
875 { S5PV310_GPK0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
876 { S5PV310_GPK0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
877 { S5PV310_GPK0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
878 { S5PV310_GPK0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
880 { S5PV310_GPK1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
881 { S5PV310_GPK1(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
882 { S5PV310_GPK1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
883 { S5PV310_GPK1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
884 { S5PV310_GPK1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
885 { S5PV310_GPK1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
886 { S5PV310_GPK1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
888 { S5PV310_GPK2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
889 { S5PV310_GPK2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
890 { S5PV310_GPK2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
891 { S5PV310_GPK2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
892 { S5PV310_GPK2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
893 { S5PV310_GPK2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
894 { S5PV310_GPK2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
896 { S5PV310_GPK3(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
897 { S5PV310_GPK3(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
898 { S5PV310_GPK3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
899 { S5PV310_GPK3(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
900 { S5PV310_GPK3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
901 { S5PV310_GPK3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
902 { S5PV310_GPK3(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
904 { S5PV310_GPL0(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
905 { S5PV310_GPL0(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
906 { S5PV310_GPL0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
907 { S5PV310_GPL0(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
908 { S5PV310_GPL0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
909 { S5PV310_GPL0(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
910 { S5PV310_GPL0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
911 { S5PV310_GPL0(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
913 { S5PV310_GPL1(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
914 { S5PV310_GPL1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
915 { S5PV310_GPL1(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
917 { S5PV310_GPL2(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
918 { S5PV310_GPL2(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
919 #ifdef CONFIG_MAX8922_CHARGER
920 { S5PV310_GPL2(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
922 { S5PV310_GPL2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
924 { S5PV310_GPL2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
925 #ifdef CONFIG_MAX8922_CHARGER
926 { S5PV310_GPL2(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
927 { S5PV310_GPL2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
929 { S5PV310_GPL2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
930 { S5PV310_GPL2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
932 { S5PV310_GPL2(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
933 { S5PV310_GPL2(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
935 { S5PV310_GPY0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
936 { S5PV310_GPY0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
937 { S5PV310_GPY0(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
938 { S5PV310_GPY0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
939 { S5PV310_GPY0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
940 { S5PV310_GPY0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
942 { S5PV310_GPY1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
943 { S5PV310_GPY1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
944 { S5PV310_GPY1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
945 { S5PV310_GPY1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
947 { S5PV310_GPY2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
948 { S5PV310_GPY2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
949 { S5PV310_GPY2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
950 { S5PV310_GPY2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
951 { S5PV310_GPY2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
952 { S5PV310_GPY2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
954 { S5PV310_GPY3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SDA_1.8V */
955 { S5PV310_GPY3(1), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
956 { S5PV310_GPY3(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* MHL_SCL_1.8V */
957 { S5PV310_GPY3(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
958 { S5PV310_GPY3(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
959 { S5PV310_GPY3(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
960 { S5PV310_GPY3(6), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
961 { S5PV310_GPY3(7), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
963 { S5PV310_GPY4(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
964 { S5PV310_GPY4(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE},
965 /* GPIO_PDA_ACTIVE */
966 { S5PV310_GPY4(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
967 { S5PV310_GPY4(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
968 { S5PV310_GPY4(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
969 { S5PV310_GPY4(5), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
970 /* GPIO_CP_REQ_RESET */
971 { S5PV310_GPY4(6), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE},
973 { S5PV310_GPY4(7), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE},
975 { S5PV310_GPY5(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
976 { S5PV310_GPY5(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
977 { S5PV310_GPY5(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
978 { S5PV310_GPY5(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
979 { S5PV310_GPY5(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
980 { S5PV310_GPY5(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
981 { S5PV310_GPY5(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
982 { S5PV310_GPY5(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
984 { S5PV310_GPY6(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
985 { S5PV310_GPY6(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
986 { S5PV310_GPY6(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
987 { S5PV310_GPY6(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
988 { S5PV310_GPY6(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
989 { S5PV310_GPY6(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
990 { S5PV310_GPY6(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
991 { S5PV310_GPY6(7), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
993 { S5PV310_GPZ(0), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
994 { S5PV310_GPZ(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
995 { S5PV310_GPZ(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
996 { S5PV310_GPZ(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
997 { S5PV310_GPZ(4), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE},
998 { S5PV310_GPZ(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
999 { S5PV310_GPZ(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */
1002 struct mobile_gpios_data p8_data;
1004 void __init mobile_gpios_init_p8(void)
1006 int hwrev = system_rev & 0xFF;
1008 if (hwrev < SLP_U1_REV01)
1009 panic("Sorry rev 0x%x U1 is not supported\n", hwrev);
1011 printk("Mobile GPIOs init - HW Rev %d\n", hwrev);
1016 p8_data.infos = p8_gpios;
1017 p8_data.x0 = (struct s5p_gpio_group *)group_x0;
1018 p8_data.x1 = (struct s5p_gpio_group *)group_x1;
1019 p8_data.x2 = (struct s5p_gpio_group *)group_x2;
1020 p8_data.x3 = (struct s5p_gpio_group *)group_x3;
1021 p8_data.gpios = mobile_gpios;
1023 p8_data.infos_size = ARRAY_SIZE(p8_gpios);
1024 p8_data.x0_size = ARRAY_SIZE(group_x0);
1025 p8_data.x1_size = ARRAY_SIZE(group_x1);
1026 p8_data.x2_size = ARRAY_SIZE(group_x2);
1027 p8_data.x3_size = ARRAY_SIZE(group_x3);
1028 p8_data.gpios_size = ARRAY_SIZE(mobile_gpios);
1032 mobile_gpios_register(&p8_data);
1035 static void config_sleep_gpio_table(int array_size, unsigned int (*gpio_table)[3])
1039 for (i = 0; i < array_size; i++) {
1040 gpio = gpio_table[i][0];
1041 s5p_gpio_set_pdn_config(gpio, gpio_table[i][1]);
1042 s5p_gpio_set_pdn_pull(gpio, gpio_table[i][2]);
1046 void p8_config_sleep_gpio_table(void)
1048 config_sleep_gpio_table(ARRAY_SIZE(p8_sleep_gpio_table),
1049 p8_sleep_gpio_table);