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[kernel/linux-2.6.36.git] / arch / arm / mach-s5pv310 / dev-spi.c
1 /* linux/arch/arm/mach-s5pv310/dev-spi.c
2  *
3  * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4  *      Jaswinder Singh <jassi.brar@samsung.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/platform_device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/clk.h>
14
15 #include <mach/irqs.h>
16 #include <mach/dma.h>
17 #include <mach/map.h>
18 #include <mach/gpio.h>
19 #include <mach/spi-clocks.h>
20 #include <mach/regs-clock.h>
21
22 #include <plat/s3c64xx-spi.h>
23 #include <plat/gpio-cfg.h>
24 #include <plat/irqs.h>
25
26 static char *spi_src_clks[] = {
27         [S5PV310_SPI_SRCCLK_SCLK] = "sclk_spi",
28 };
29
30 /* SPI Controller platform_devices */
31
32 /* Since we emulate multi-cs capability, we do not touch the CS.
33  * The emulated CS is toggled by board specific mechanism, as it can
34  * be either some immediate GPIO or some signal out of some other
35  * chip in between ... or some yet another way.
36  * We simply do not assume anything about CS.
37  */
38 static int s5pv310_spi_cfg_gpio(struct platform_device *pdev)
39 {
40         switch (pdev->id) {
41         case 0:
42                 s3c_gpio_cfgpin(S5PV310_GPB(0), S3C_GPIO_SFN(2));
43                 s3c_gpio_cfgpin(S5PV310_GPB(2), S3C_GPIO_SFN(2));
44                 s3c_gpio_cfgpin(S5PV310_GPB(3), S3C_GPIO_SFN(2));
45                 s3c_gpio_setpull(S5PV310_GPB(0), S3C_GPIO_PULL_UP);
46                 s3c_gpio_setpull(S5PV310_GPB(2), S3C_GPIO_PULL_UP);
47                 s3c_gpio_setpull(S5PV310_GPB(3), S3C_GPIO_PULL_UP);
48                 break;
49
50         case 1:
51                 s3c_gpio_cfgpin(S5PV310_GPB(4), S3C_GPIO_SFN(2));
52                 s3c_gpio_cfgpin(S5PV310_GPB(6), S3C_GPIO_SFN(2));
53                 s3c_gpio_cfgpin(S5PV310_GPB(7), S3C_GPIO_SFN(2));
54                 s3c_gpio_setpull(S5PV310_GPB(4), S3C_GPIO_PULL_UP);
55                 s3c_gpio_setpull(S5PV310_GPB(6), S3C_GPIO_PULL_UP);
56                 s3c_gpio_setpull(S5PV310_GPB(7), S3C_GPIO_PULL_UP);
57                 break;
58
59         case 2:
60                 s3c_gpio_cfgpin(S5PV310_GPC1(1), S3C_GPIO_SFN(5));
61                 s3c_gpio_cfgpin(S5PV310_GPC1(3), S3C_GPIO_SFN(5));
62                 s3c_gpio_cfgpin(S5PV310_GPC1(4), S3C_GPIO_SFN(5));
63                 s3c_gpio_setpull(S5PV310_GPC1(1), S3C_GPIO_PULL_UP);
64                 s3c_gpio_setpull(S5PV310_GPC1(3), S3C_GPIO_PULL_UP);
65                 s3c_gpio_setpull(S5PV310_GPC1(4), S3C_GPIO_PULL_UP);
66                 break;
67
68         default:
69                 dev_err(&pdev->dev, "Invalid SPI Controller number!");
70                 return -EINVAL;
71         }
72
73         return 0;
74 }
75
76 static struct resource s5pv310_spi0_resource[] = {
77         [0] = {
78                 .start = S5PV310_PA_SPI0,
79                 .end   = S5PV310_PA_SPI0 + 0x100 - 1,
80                 .flags = IORESOURCE_MEM,
81         },
82         [1] = {
83                 .start = DMACH_SPI0_TX,
84                 .end   = DMACH_SPI0_TX,
85                 .flags = IORESOURCE_DMA,
86         },
87         [2] = {
88                 .start = DMACH_SPI0_RX,
89                 .end   = DMACH_SPI0_RX,
90                 .flags = IORESOURCE_DMA,
91         },
92         [3] = {
93                 .start = IRQ_SPI0,
94                 .end   = IRQ_SPI0,
95                 .flags = IORESOURCE_IRQ,
96         },
97 };
98
99 static struct s3c64xx_spi_info s5pv310_spi0_pdata = {
100         .cfg_gpio = s5pv310_spi_cfg_gpio,
101         .fifo_lvl_mask = 0x1ff,
102         .rx_lvl_offset = 15,
103         .high_speed = 1,
104         .clk_from_cmu = true,
105 };
106
107 static u64 spi_dmamask = DMA_BIT_MASK(32);
108
109 struct platform_device s5pv310_device_spi0 = {
110         .name             = "s3c64xx-spi",
111         .id               = 0,
112         .num_resources    = ARRAY_SIZE(s5pv310_spi0_resource),
113         .resource         = s5pv310_spi0_resource,
114         .dev = {
115                 .dma_mask               = &spi_dmamask,
116                 .coherent_dma_mask      = DMA_BIT_MASK(32),
117                 .platform_data = &s5pv310_spi0_pdata,
118         },
119 };
120
121 static struct resource s5pv310_spi1_resource[] = {
122         [0] = {
123                 .start = S5PV310_PA_SPI1,
124                 .end   = S5PV310_PA_SPI1 + 0x100 - 1,
125                 .flags = IORESOURCE_MEM,
126         },
127         [1] = {
128                 .start = DMACH_SPI1_TX,
129                 .end   = DMACH_SPI1_TX,
130                 .flags = IORESOURCE_DMA,
131         },
132         [2] = {
133                 .start = DMACH_SPI1_RX,
134                 .end   = DMACH_SPI1_RX,
135                 .flags = IORESOURCE_DMA,
136         },
137         [3] = {
138                 .start = IRQ_SPI1,
139                 .end   = IRQ_SPI1,
140                 .flags = IORESOURCE_IRQ,
141         },
142 };
143
144 static struct s3c64xx_spi_info s5pv310_spi1_pdata = {
145         .cfg_gpio = s5pv310_spi_cfg_gpio,
146         .fifo_lvl_mask = 0x7f,
147         .rx_lvl_offset = 15,
148         .high_speed = 1,
149         .clk_from_cmu = true,
150 };
151
152 struct platform_device s5pv310_device_spi1 = {
153         .name             = "s3c64xx-spi",
154         .id               = 1,
155         .num_resources    = ARRAY_SIZE(s5pv310_spi1_resource),
156         .resource         = s5pv310_spi1_resource,
157         .dev = {
158                 .dma_mask               = &spi_dmamask,
159                 .coherent_dma_mask      = DMA_BIT_MASK(32),
160                 .platform_data = &s5pv310_spi1_pdata,
161         },
162 };
163
164 static struct resource s5pv310_spi2_resource[] = {
165         [0] = {
166                 .start = S5PV310_PA_SPI2,
167                 .end   = S5PV310_PA_SPI2 + 0x100 - 1,
168                 .flags = IORESOURCE_MEM,
169         },
170         [1] = {
171                 .start = DMACH_SPI2_TX,
172                 .end   = DMACH_SPI2_TX,
173                 .flags = IORESOURCE_DMA,
174         },
175         [2] = {
176                 .start = DMACH_SPI2_RX,
177                 .end   = DMACH_SPI2_RX,
178                 .flags = IORESOURCE_DMA,
179         },
180         [3] = {
181                 .start = IRQ_SPI2,
182                 .end   = IRQ_SPI2,
183                 .flags = IORESOURCE_IRQ,
184         },
185 };
186
187 static struct s3c64xx_spi_info s5pv310_spi2_pdata = {
188         .cfg_gpio = s5pv310_spi_cfg_gpio,
189         .fifo_lvl_mask = 0x7f,
190         .rx_lvl_offset = 15,
191         .high_speed = 1,
192         .clk_from_cmu = true,
193 };
194
195 struct platform_device s5pv310_device_spi2 = {
196         .name             = "s3c64xx-spi",
197         .id               = 2,
198         .num_resources    = ARRAY_SIZE(s5pv310_spi2_resource),
199         .resource         = s5pv310_spi2_resource,
200         .dev = {
201                 .dma_mask               = &spi_dmamask,
202                 .coherent_dma_mask      = DMA_BIT_MASK(32),
203                 .platform_data = &s5pv310_spi2_pdata,
204         },
205 };
206
207 void __init s5pv310_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
208 {
209         struct s3c64xx_spi_info *pd;
210
211         /* Reject invalid configuration */
212         if (!num_cs || src_clk_nr < 0
213                         || src_clk_nr > S5PV310_SPI_SRCCLK_SCLK) {
214                 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
215                 return;
216         }
217
218         switch (cntrlr) {
219         case 0:
220                 pd = &s5pv310_spi0_pdata;
221                 break;
222         case 1:
223                 pd = &s5pv310_spi1_pdata;
224                 break;
225         case 2:
226                 pd = &s5pv310_spi2_pdata;
227                 break;
228         default:
229                 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
230                                                         __func__, cntrlr);
231                 return;
232         }
233
234         pd->num_cs = num_cs;
235         pd->src_clk_nr = src_clk_nr;
236         pd->src_clk_name = spi_src_clks[src_clk_nr];
237 }