1 # Hitachi H8 testcase 'mov.w'
2 # mach(): h8300h h8300s h8sx
3 # as(h8300h): --defsym sim_cpu=1
4 # as(h8300s): --defsym sim_cpu=2
5 # as(h8sx): --defsym sim_cpu=3
6 # ld(h8300h): -m h8300helf
7 # ld(h8300s): -m h8300self
8 # ld(h8sx): -m h8300sxelf
10 .include "testutils.inc"
24 ;; Move byte from immediate source
29 set_grs_a5a5 ; Fill all general regs with a fixed pattern
33 mov.b #0x77:8, r0l ; Immediate 3-bit operand
36 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
42 test_h_gr32 0xa5a5a577 er0
44 test_gr_a5a5 1 ; Make sure other general regs not disturbed
55 set_grs_a5a5 ; Fill all general regs with a fixed pattern
58 ;; mov.b #xx:4, @aa:16
59 mov.b #0xf:4, @byte_dst:16 ; 16-bit address-direct operand
63 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
69 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
70 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
71 test_gr_a5a5 2 ; to examine the destination memory).
78 ;; Now check the result of the move to memory.
83 mov.b #0, @byte_dst ; zero it again for the next use.
86 set_grs_a5a5 ; Fill all general regs with a fixed pattern
89 ;; mov.b #xx:4, @aa:32
90 mov.b #0xf:4, @byte_dst:32 ; 32-bit address-direct operand
94 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
100 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
101 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
102 test_gr_a5a5 2 ; to examine the destination memory).
109 ;; Now check the result of the move to memory.
110 cmp.b #0xf, @byte_dst
114 mov.b #0, @byte_dst ; zero it again for the next use.
116 mov_b_imm8_to_indirect:
117 set_grs_a5a5 ; Fill all general regs with a fixed pattern
122 mov.b #0xa5:8, @er1 ; Register indirect operand
126 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
132 test_gr_a5a5 0 ; Make sure other general regs not disturbed
133 test_h_gr32 byte_dst, er1
141 ;; Now check the result of the move to memory.
142 cmp.b #0xa5, @byte_dst
146 mov.b #0, @byte_dst ; zero it again for the next use.
148 mov_b_imm8_to_postinc: ; post-increment from imm8 to mem
149 set_grs_a5a5 ; Fill all general regs with a fixed pattern
152 ;; mov.b #xx:8, @erd+
154 mov.b #0xa5:8, @er1+ ; Imm8, register post-incr operands.
158 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
164 test_gr_a5a5 0 ; Make sure other general regs not disturbed
165 test_h_gr32 byte_dst+1, er1
173 ;; Now check the result of the move to memory.
174 cmp.b #0xa5, @byte_dst
178 mov.b #0, @byte_dst ; zero it again for the next use.
180 mov_b_imm8_to_postdec: ; post-decrement from imm8 to mem
181 set_grs_a5a5 ; Fill all general regs with a fixed pattern
184 ;; mov.b #xx:8, @erd-
186 mov.b #0xa5:8, @er1- ; Imm8, register post-decr operands.
190 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
196 test_gr_a5a5 0 ; Make sure other general regs not disturbed
197 test_h_gr32 byte_dst-1, er1
205 ;; Now check the result of the move to memory.
206 cmp.b #0xa5, @byte_dst
210 mov.b #0, @byte_dst ; zero it again for the next use.
212 mov_b_imm8_to_preinc: ; pre-increment from register to mem
213 set_grs_a5a5 ; Fill all general regs with a fixed pattern
216 ;; mov.b #xx:8, @+erd
217 mov.l #byte_dst-1, er1
218 mov.b #0xa5:8, @+er1 ; Imm8, register pre-incr operands
222 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
228 test_gr_a5a5 0 ; Make sure other general regs not disturbed
229 test_h_gr32 byte_dst, er1
237 ;; Now check the result of the move to memory.
238 cmp.b #0xa5, @byte_dst
242 mov.b #0, @byte_dst ; zero it again for the next use.
244 mov_b_imm8_to_predec: ; pre-decrement from register to mem
245 set_grs_a5a5 ; Fill all general regs with a fixed pattern
248 ;; mov.b #xx:8, @-erd
249 mov.l #byte_dst+1, er1
250 mov.b #0xa5:8, @-er1 ; Imm8, register pre-decr operands
254 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
260 test_gr_a5a5 0 ; Make sure other general regs not disturbed
261 test_h_gr32 byte_dst, er1
269 ;; Now check the result of the move to memory.
270 cmp.b #0xa5, @byte_dst
274 mov.b #0, @byte_dst ; zero it again for the next use.
277 set_grs_a5a5 ; Fill all general regs with a fixed pattern
280 ;; mov.b #xx:8, @(dd:2, erd)
281 mov.l #byte_dst-3, er1
282 mov.b #0xa5:8, @(3:2, er1) ; Imm8, reg plus 2-bit disp. operand
286 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
292 test_gr_a5a5 0 ; Make sure other general regs not disturbed
293 test_h_gr32 byte_dst-3, er1
301 ;; Now check the result of the move to memory.
302 cmp.b #0xa5, @byte_dst
306 mov.b #0, @byte_dst ; zero it again for the next use.
308 mov_b_imm8_to_disp16:
309 set_grs_a5a5 ; Fill all general regs with a fixed pattern
312 ;; mov.b #xx:8, @(dd:16, erd)
313 mov.l #byte_dst-4, er1
314 mov.b #0xa5:8, @(4:16, er1) ; Register plus 16-bit disp. operand
319 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
325 test_gr_a5a5 0 ; Make sure other general regs not disturbed
326 test_h_gr32 byte_dst-4, er1
334 ;; Now check the result of the move to memory.
335 cmp.b #0xa5, @byte_dst
339 mov.b #0, @byte_dst ; zero it again for the next use.
341 mov_b_imm8_to_disp32:
342 set_grs_a5a5 ; Fill all general regs with a fixed pattern
345 ;; mov.b #xx:8, @(dd:32, erd)
346 mov.l #byte_dst-8, er1
347 mov.b #0xa5:8, @(8:32, er1) ; Register plus 32-bit disp. operand
352 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
358 test_gr_a5a5 0 ; Make sure other general regs not disturbed
359 test_h_gr32 byte_dst-8, er1
367 ;; Now check the result of the move to memory.
368 cmp.b #0xa5, @byte_dst
372 mov.b #0, @byte_dst ; zero it again for the next use.
374 mov_b_imm8_to_indexb16:
375 set_grs_a5a5 ; Fill all general regs with a fixed pattern
376 mov.l #0xffffff01, er1
378 ;; mov.b #xx:8, @(dd:16, rd.b)
379 mov.b #0xa5:8, @(byte_dst-1:16, r1.b) ; byte indexed operand
381 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
387 test_gr_a5a5 0 ; Make sure other general regs not disturbed
388 test_h_gr32 0xffffff01, er1
396 ;; Now check the result of the move to memory.
397 cmp.b #0xa5, @byte_dst
399 mov.b #0, @byte_dst ; zero it again for the next use.
401 mov_b_imm8_to_indexw16:
402 set_grs_a5a5 ; Fill all general regs with a fixed pattern
403 mov.l #0xffff0002, er1
405 ;; mov.b #xx:8, @(dd:16, rd.w)
406 mov.b #0xa5:8, @(byte_dst-2:16, r1.w) ; byte indexed operand
408 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
414 test_gr_a5a5 0 ; Make sure other general regs not disturbed
415 test_h_gr32 0xffff0002, er1
423 ;; Now check the result of the move to memory.
424 cmp.b #0xa5, @byte_dst
426 mov.b #0, @byte_dst ; zero it again for the next use.
428 mov_b_imm8_to_indexl16:
429 set_grs_a5a5 ; Fill all general regs with a fixed pattern
430 mov.l #0x00000003, er1
432 ;; mov.b #xx:8, @(dd:16, erd.l)
433 mov.b #0xa5:8, @(byte_dst-3:16, er1.l) ; byte indexed operand
435 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
441 test_gr_a5a5 0 ; Make sure other general regs not disturbed
442 test_h_gr32 0x00000003, er1
450 ;; Now check the result of the move to memory.
451 cmp.b #0xa5, @byte_dst
453 mov.b #0, @byte_dst ; zero it again for the next use.
455 mov_b_imm8_to_indexb32:
456 set_grs_a5a5 ; Fill all general regs with a fixed pattern
457 mov.l #0xffffff04, er1
459 ;; mov.b #xx:8, @(dd:32, rd.b)
460 mov.b #0xa5:8, @(byte_dst-4:32, r1.b) ; byte indexed operand
462 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
468 test_gr_a5a5 0 ; Make sure other general regs not disturbed
469 test_h_gr32 0xffffff04 er1
477 ;; Now check the result of the move to memory.
478 cmp.b #0xa5, @byte_dst
480 mov.b #0, @byte_dst ; zero it again for the next use.
482 mov_b_imm8_to_indexw32:
483 set_grs_a5a5 ; Fill all general regs with a fixed pattern
484 mov.l #0xffff0005, er1
486 ;; mov.b #xx:8, @(dd:32, rd.w)
487 mov.b #0xa5:8, @(byte_dst-5:32, r1.w) ; byte indexed operand
489 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
495 test_gr_a5a5 0 ; Make sure other general regs not disturbed
496 test_h_gr32 0xffff0005 er1
504 ;; Now check the result of the move to memory.
505 cmp.b #0xa5, @byte_dst
507 mov.b #0, @byte_dst ; zero it again for the next use.
509 mov_b_imm8_to_indexl32:
510 set_grs_a5a5 ; Fill all general regs with a fixed pattern
511 mov.l #0x00000006, er1
513 ;; mov.b #xx:8, @(dd:32, erd.l)
514 mov.b #0xa5:8, @(byte_dst-6:32, er1.l) ; byte indexed operand
516 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
522 test_gr_a5a5 0 ; Make sure other general regs not disturbed
523 test_h_gr32 0x00000006 er1
531 ;; Now check the result of the move to memory.
532 cmp.b #0xa5, @byte_dst
534 mov.b #0, @byte_dst ; zero it again for the next use.
537 set_grs_a5a5 ; Fill all general regs with a fixed pattern
540 ;; mov.b #xx:8, @aa:16
541 mov.b #0xa5:8, @byte_dst:16 ; 16-bit address-direct operand
546 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
552 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
553 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
554 test_gr_a5a5 2 ; to examine the destination memory).
561 ;; Now check the result of the move to memory.
562 cmp.b #0xa5, @byte_dst
566 mov.b #0, @byte_dst ; zero it again for the next use.
569 set_grs_a5a5 ; Fill all general regs with a fixed pattern
572 ;; mov.b #xx:8, @aa:32
573 mov.b #0xa5:8, @byte_dst:32 ; 32-bit address-direct operand
578 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
584 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
585 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
586 test_gr_a5a5 2 ; to examine the destination memory).
593 ;; Now check the result of the move to memory.
594 cmp.b #0xa5, @byte_dst
598 mov.b #0, @byte_dst ; zero it again for the next use.
603 ;; Move byte from register source
607 set_grs_a5a5 ; Fill all general regs with a fixed pattern
612 mov.b r1l, r0l ; Register 8-bit operand
615 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
620 test_h_gr16 0xa512 r0
621 test_h_gr16 0xa512 r1 ; mov src unchanged
623 test_h_gr32 0xa5a5a512 er0
624 test_h_gr32 0xa5a5a512 er1 ; mov src unchanged
626 test_gr_a5a5 2 ; Make sure other general regs not disturbed
634 mov_b_reg8_to_indirect:
635 set_grs_a5a5 ; Fill all general regs with a fixed pattern
640 mov.b r0l, @er1 ; Register indirect operand
643 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
649 test_gr_a5a5 0 ; Make sure other general regs not disturbed
650 test_h_gr32 byte_dst, er1
658 ;; Now check the result of the move to memory.
665 mov.b r0l, @byte_dst ; zero it again for the next use.
667 .if (sim_cpu == h8sx)
668 mov_b_reg8_to_postinc: ; post-increment from register to mem
669 set_grs_a5a5 ; Fill all general regs with a fixed pattern
674 mov.b r0l, @er1+ ; Register post-incr operand
678 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
684 test_gr_a5a5 0 ; Make sure other general regs not disturbed
685 test_h_gr32 byte_dst+1, er1
693 ;; Now check the result of the move to memory.
698 mov.b #0, @byte_dst ; zero it again for the next use.
700 mov_b_reg8_to_postdec: ; post-decrement from register to mem
701 set_grs_a5a5 ; Fill all general regs with a fixed pattern
706 mov.b r0l, @er1- ; Register post-decr operand
710 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
716 test_gr_a5a5 0 ; Make sure other general regs not disturbed
717 test_h_gr32 byte_dst-1, er1
725 ;; Now check the result of the move to memory.
730 mov.b #0, @byte_dst ; zero it again for the next use.
732 mov_b_reg8_to_preinc: ; pre-increment from register to mem
733 set_grs_a5a5 ; Fill all general regs with a fixed pattern
737 mov.l #byte_dst-1, er1
738 mov.b r0l, @+er1 ; Register pre-incr operand
742 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
748 test_gr_a5a5 0 ; Make sure other general regs not disturbed
749 test_h_gr32 byte_dst, er1
757 ;; Now check the result of the move to memory.
762 mov.b #0, @byte_dst ; zero it again for the next use.
765 mov_b_reg8_to_predec: ; pre-decrement from register to mem
766 set_grs_a5a5 ; Fill all general regs with a fixed pattern
770 mov.l #byte_dst+1, er1
771 mov.b r0l, @-er1 ; Register pre-decr operand
774 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
780 test_gr_a5a5 0 ; Make sure other general regs not disturbed
781 test_h_gr32 byte_dst, er1
789 ;; Now check the result of the move to memory.
796 mov.b r0l, @byte_dst ; zero it again for the next use.
798 .if (sim_cpu == h8sx)
800 set_grs_a5a5 ; Fill all general regs with a fixed pattern
803 ;; mov.b ers, @(dd:2, erd)
804 mov.l #byte_dst-3, er1
805 mov.b r0l, @(3:2, er1) ; Register plus 2-bit disp. operand
809 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
815 test_gr_a5a5 0 ; Make sure other general regs not disturbed
816 test_h_gr32 byte_dst-3, er1
824 ;; Now check the result of the move to memory.
829 mov.b #0, @byte_dst ; zero it again for the next use.
832 mov_b_reg8_to_disp16:
833 set_grs_a5a5 ; Fill all general regs with a fixed pattern
836 ;; mov.b ers, @(dd:16, erd)
837 mov.l #byte_dst-4, er1
838 mov.b r0l, @(4:16, er1) ; Register plus 16-bit disp. operand
842 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
848 test_h_gr32 byte_dst-4, er1
849 test_gr_a5a5 0 ; Make sure other general regs not disturbed
857 ;; Now check the result of the move to memory.
864 mov.b r0l, @byte_dst ; zero it again for the next use.
866 mov_b_reg8_to_disp32:
867 set_grs_a5a5 ; Fill all general regs with a fixed pattern
870 ;; mov.b ers, @(dd:32, erd)
871 mov.l #byte_dst-8, er1
872 mov.b r0l, @(8:32, er1) ; Register plus 32-bit disp. operand
877 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
883 test_h_gr32 byte_dst-8, er1
884 test_gr_a5a5 0 ; Make sure other general regs not disturbed
892 ;; Now check the result of the move to memory.
899 mov.b r0l, @byte_dst ; zero it again for the next use.
901 .if (sim_cpu == h8sx)
902 mov_b_reg8_to_indexb16:
903 set_grs_a5a5 ; Fill all general regs with a fixed pattern
904 mov.l #0xffffff01, er1
906 ;; mov.b ers, @(dd:16, rd.b)
907 mov.b r0l, @(byte_dst-1:16, r1.b) ; byte indexed operand
909 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
915 test_h_gr32 0xffffff01 er1
916 test_gr_a5a5 0 ; Make sure other general regs not disturbed
924 ;; Now check the result of the move to memory.
927 mov.b #0, @byte_dst ; zero it again for the next use.
929 mov_b_reg8_to_indexw16:
930 set_grs_a5a5 ; Fill all general regs with a fixed pattern
931 mov.l #0xffff0002, er1
933 ;; mov.b ers, @(dd:16, rd.w)
934 mov.b r0l, @(byte_dst-2:16, r1.w) ; byte indexed operand
936 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
942 test_h_gr32 0xffff0002 er1
943 test_gr_a5a5 0 ; Make sure other general regs not disturbed
951 ;; Now check the result of the move to memory.
954 mov.b #0, @byte_dst ; zero it again for the next use.
956 mov_b_reg8_to_indexl16:
957 set_grs_a5a5 ; Fill all general regs with a fixed pattern
958 mov.l #0x00000003, er1
960 ;; mov.b ers, @(dd:16, erd.l)
961 mov.b r0l, @(byte_dst-3:16, er1.l) ; byte indexed operand
963 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
969 test_h_gr32 0x00000003 er1
970 test_gr_a5a5 0 ; Make sure other general regs not disturbed
978 ;; Now check the result of the move to memory.
981 mov.b #0, @byte_dst ; zero it again for the next use.
983 mov_b_reg8_to_indexb32:
984 set_grs_a5a5 ; Fill all general regs with a fixed pattern
985 mov.l #0xffffff04 er1
987 ;; mov.b ers, @(dd:32, rd.b)
988 mov.b r0l, @(byte_dst-4:32, r1.b) ; byte indexed operand
990 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
996 test_h_gr32 0xffffff04, er1
997 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1005 ;; Now check the result of the move to memory.
1006 cmp.b @byte_dst, r0l
1008 mov.b #0, @byte_dst ; zero it again for the next use.
1010 mov_b_reg8_to_indexw32:
1011 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1012 mov.l #0xffff0005 er1
1014 ;; mov.b ers, @(dd:32, rd.w)
1015 mov.b r0l, @(byte_dst-5:32, r1.w) ; byte indexed operand
1017 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1023 test_h_gr32 0xffff0005, er1
1024 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1032 ;; Now check the result of the move to memory.
1033 cmp.b @byte_dst, r0l
1035 mov.b #0, @byte_dst ; zero it again for the next use.
1037 mov_b_reg8_to_indexl32:
1038 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1039 mov.l #0x00000006 er1
1041 ;; mov.b ers, @(dd:32, erd.l)
1042 mov.b r0l, @(byte_dst-6:32, er1.l) ; byte indexed operand
1044 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1050 test_h_gr32 0x00000006, er1
1051 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1059 ;; Now check the result of the move to memory.
1060 cmp.b @byte_dst, r0l
1062 mov.b #0, @byte_dst ; zero it again for the next use.
1065 .if (sim_cpu == h8sx)
1067 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1069 mov.l #byte_dst-20, er0
1073 mov.b r1l, @20:8 ; 8-bit address-direct (sbr-relative) operand
1075 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1081 test_h_gr32 byte_dst-20, er0
1082 test_gr_a5a5 1 ; Make sure other general regs not disturbed
1090 ;; Now check the result of the move to memory.
1091 cmp.b @byte_dst, r1l
1093 mov.b #0, @byte_dst ; zero it again for the next use.
1096 mov_b_reg8_to_abs16:
1097 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1100 ;; mov.b ers, @aa:16
1101 mov.b r0l, @byte_dst:16 ; 16-bit address-direct operand
1105 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1111 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
1112 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
1113 test_gr_a5a5 2 ; to examine the destination memory).
1120 ;; Now check the result of the move to memory.
1121 mov.b @byte_dst, r0l
1127 mov.b r0l, @byte_dst ; zero it again for the next use.
1129 mov_b_reg8_to_abs32:
1130 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1133 ;; mov.b ers, @aa:32
1134 mov.b r0l, @byte_dst:32 ; 32-bit address-direct operand
1138 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1144 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
1145 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
1146 test_gr_a5a5 2 ; to examine the destination memory).
1153 ;; Now check the result of the move to memory.
1154 mov.b @byte_dst, r0l
1160 mov.b r0l, @byte_dst ; zero it again for the next use.
1163 ;; Move byte to register destination.
1166 mov_b_indirect_to_reg8:
1167 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1171 mov.l #byte_src, er1
1172 mov.b @er1, r0l ; Register indirect operand
1175 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1181 test_h_gr32 0xa5a5a577 er0
1183 test_h_gr32 byte_src, er1
1184 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1191 mov_b_postinc_to_reg8: ; post-increment from mem to register
1192 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1197 mov.l #byte_src, er1
1198 mov.b @er1+, r0l ; Register post-incr operand
1201 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1207 test_h_gr32 0xa5a5a577 er0
1209 test_h_gr32 byte_src+1, er1
1210 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1217 .if (sim_cpu == h8sx)
1218 mov_b_postdec_to_reg8: ; post-decrement from mem to register
1219 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1224 mov.l #byte_src, er1
1225 mov.b @er1-, r0l ; Register post-decr operand
1229 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1235 test_h_gr32 0xa5a5a577 er0
1237 test_h_gr32 byte_src-1, er1
1238 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1245 mov_b_preinc_to_reg8: ; pre-increment from mem to register
1246 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1251 mov.l #byte_src-1, er1
1252 mov.b @+er1, r0l ; Register pre-incr operand
1256 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1262 test_h_gr32 0xa5a5a577 er0
1264 test_h_gr32 byte_src, er1
1265 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1272 mov_b_predec_to_reg8: ; pre-decrement from mem to register
1273 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1278 mov.l #byte_src+1, er1
1279 mov.b @-er1, r0l ; Register pre-decr operand
1283 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1289 test_h_gr32 0xa5a5a577 er0
1291 test_h_gr32 byte_src, er1
1292 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1300 mov_b_disp2_to_reg8:
1301 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1304 ;; mov.b @(dd:2, ers), rd
1305 mov.l #byte_src-1, er1
1306 mov.b @(1:2, er1), r0l ; Register plus 2-bit disp. operand
1310 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1316 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1318 test_h_gr32 byte_src-1, er1
1319 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1327 mov_b_disp16_to_reg8:
1328 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1331 ;; mov.b @(dd:16, ers), rd
1332 mov.l #byte_src+0x1234, er1
1333 mov.b @(-0x1234:16, er1), r0l ; Register plus 16-bit disp. operand
1337 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1343 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1345 test_h_gr32 byte_src+0x1234, er1
1346 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1353 mov_b_disp32_to_reg8:
1354 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1357 ;; mov.b @(dd:32, ers), rd
1358 mov.l #byte_src+65536, er1
1359 mov.b @(-65536:32, er1), r0l ; Register plus 32-bit disp. operand
1364 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1370 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1372 test_h_gr32 byte_src+65536, er1
1373 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1380 .if (sim_cpu == h8sx)
1381 mov_b_indexb16_to_reg8:
1382 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1383 mov.l #0xffffff01, er1
1385 ;; mov.b @(dd:16, rs.b), rd
1386 mov.b @(byte_src-1:16, r1.b), r0l ; indexed byte operand
1388 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1394 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
1396 test_h_gr32 0xffffff01, er1
1397 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1404 mov_b_indexw16_to_reg8:
1405 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1406 mov.l #0xffff0002, er1
1408 ;; mov.b @(dd:16, rs.w), rd
1409 mov.b @(byte_src-2:16, r1.w), r0l ; indexed byte operand
1411 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1417 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
1419 test_h_gr32 0xffff0002, er1
1420 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1427 mov_b_indexl16_to_reg8:
1428 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1429 mov.l #0x00000003, er1
1431 ;; mov.b @(dd:16, ers.l), rd
1432 mov.b @(byte_src-3:16, er1.l), r0l ; indexed byte operand
1434 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1440 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5a5 | 77
1442 test_h_gr32 0x00000003, er1
1443 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1450 mov_b_indexb32_to_reg8:
1451 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1452 mov.l #0xffffff04, er1
1454 ;; mov.b @(dd:32, rs.b), rd
1455 mov.b @(byte_src-4:32, r1.b), r0l ; indexed byte operand
1457 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1463 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1465 test_h_gr32 0xffffff04 er1
1466 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1473 mov_b_indexw32_to_reg8:
1474 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1475 mov.l #0xffff0005, er1
1477 ;; mov.b @(dd:32, rs.w), rd
1478 mov.b @(byte_src-5:32, r1.w), r0l ; indexed byte operand
1480 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1486 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1488 test_h_gr32 0xffff0005 er1
1489 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1496 mov_b_indexl32_to_reg8:
1497 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1498 mov.l #0x00000006, er1
1500 ;; mov.b @(dd:32, ers.l), rd
1501 mov.b @(byte_src-6:32, er1.l), r0l ; indexed byte operand
1503 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1509 test_h_gr32 0xa5a5a577 er0 ; mov result: a5a5 | 7777
1511 test_h_gr32 0x00000006 er1
1512 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1521 .if (sim_cpu == h8sx)
1523 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1524 mov.l #byte_src-255, er1
1528 mov.b @0xff:8, r0l ; 8-bit (sbr relative) address-direct operand
1530 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1536 test_h_gr32 0xa5a5a577 er0
1538 test_h_gr32 byte_src-255, er1
1539 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1547 mov_b_abs16_to_reg8:
1548 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1552 mov.b @byte_src:16, r0l ; 16-bit address-direct operand
1556 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1562 test_h_gr32 0xa5a5a577 er0
1564 test_gr_a5a5 1 ; Make sure other general regs not disturbed
1572 mov_b_abs32_to_reg8:
1573 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1577 mov.b @byte_src:32, r0l ; 32-bit address-direct operand
1581 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1587 test_h_gr32 0xa5a5a577 er0
1589 test_gr_a5a5 1 ; Make sure other general regs not disturbed
1597 .if (sim_cpu == h8sx)
1600 ;; Move byte from memory to memory
1603 mov_b_indirect_to_indirect: ; reg indirect, memory to memory
1604 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1609 mov.l #byte_src, er1
1610 mov.l #byte_dst, er0
1615 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1621 ;; Verify the affected registers.
1623 test_h_gr32 byte_dst er0
1624 test_h_gr32 byte_src er1
1625 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1632 ;; Now check the result of the move to memory.
1633 cmp.b @byte_src, @byte_dst
1637 ;; Now clear the destination location, and verify that.
1639 cmp.b @byte_src, @byte_dst
1642 .Lnext56: ; OK, pass on.
1644 mov_b_postinc_to_postinc: ; reg post-increment, memory to memory
1645 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1648 ;; mov.b @ers+, @erd+
1650 mov.l #byte_src, er1
1651 mov.l #byte_dst, er0
1656 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1662 ;; Verify the affected registers.
1664 test_h_gr32 byte_dst+1 er0
1665 test_h_gr32 byte_src+1 er1
1666 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1673 ;; Now check the result of the move to memory.
1674 cmp.b @byte_src, @byte_dst
1678 ;; Now clear the destination location, and verify that.
1680 cmp.b @byte_src, @byte_dst
1683 .Lnext66: ; OK, pass on.
1685 mov_b_postdec_to_postdec: ; reg post-decrement, memory to memory
1686 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1689 ;; mov.b @ers-, @erd-
1691 mov.l #byte_src, er1
1692 mov.l #byte_dst, er0
1697 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1703 ;; Verify the affected registers.
1705 test_h_gr32 byte_dst-1 er0
1706 test_h_gr32 byte_src-1 er1
1707 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1714 ;; Now check the result of the move to memory.
1715 cmp.b @byte_src, @byte_dst
1719 ;; Now clear the destination location, and verify that.
1721 cmp.b @byte_src, @byte_dst
1724 .Lnext76: ; OK, pass on.
1726 mov_b_preinc_to_preinc: ; reg pre-increment, memory to memory
1727 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1730 ;; mov.b @+ers, @+erd
1732 mov.l #byte_src-1, er1
1733 mov.l #byte_dst-1, er0
1738 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1744 ;; Verify the affected registers.
1746 test_h_gr32 byte_dst er0
1747 test_h_gr32 byte_src er1
1748 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1755 ;; Now check the result of the move to memory.
1756 cmp.b @byte_src, @byte_dst
1760 ;; Now clear the destination location, and verify that.
1762 cmp.b @byte_src, @byte_dst
1765 .Lnext86: ; OK, pass on.
1767 mov_b_predec_to_predec: ; reg pre-decrement, memory to memory
1768 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1771 ;; mov.b @-ers, @-erd
1773 mov.l #byte_src+1, er1
1774 mov.l #byte_dst+1, er0
1779 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1785 ;; Verify the affected registers.
1787 test_h_gr32 byte_dst er0
1788 test_h_gr32 byte_src er1
1789 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1796 ;; Now check the result of the move to memory.
1797 cmp.b @byte_src, @byte_dst
1801 ;; Now clear the destination location, and verify that.
1803 cmp.b @byte_src, @byte_dst
1806 .Lnext96: ; OK, pass on.
1808 mov_b_disp2_to_disp2: ; reg 2-bit disp, memory to memory
1809 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1812 ;; mov.b @(dd:2, ers), @(dd:2, erd)
1814 mov.l #byte_src-1, er1
1815 mov.l #byte_dst-2, er0
1816 mov.b @(1:2, er1), @(2:2, er0)
1820 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1826 ;; Verify the affected registers.
1828 test_h_gr32 byte_dst-2 er0
1829 test_h_gr32 byte_src-1 er1
1830 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1837 ;; Now check the result of the move to memory.
1838 cmp.b @byte_src, @byte_dst
1842 ;; Now clear the destination location, and verify that.
1844 cmp.b @byte_src, @byte_dst
1847 .Lnext106: ; OK, pass on.
1849 mov_b_disp16_to_disp16: ; reg 16-bit disp, memory to memory
1850 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1853 ;; mov.b @(dd:16, ers), @(dd:16, erd)
1855 mov.l #byte_src-1, er1
1856 mov.l #byte_dst-2, er0
1857 mov.b @(1:16, er1), @(2:16, er0)
1863 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1869 ;; Verify the affected registers.
1871 test_h_gr32 byte_dst-2 er0
1872 test_h_gr32 byte_src-1 er1
1873 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1880 ;; Now check the result of the move to memory.
1881 cmp.b @byte_src, @byte_dst
1885 ;; Now clear the destination location, and verify that.
1887 cmp.b @byte_src, @byte_dst
1890 .Lnext116: ; OK, pass on.
1892 mov_b_disp32_to_disp32: ; reg 32-bit disp, memory to memory
1893 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1896 ;; mov.b @(dd:32, ers), @(dd:32, erd)
1898 mov.l #byte_src-1, er1
1899 mov.l #byte_dst-2, er0
1900 mov.b @(1:32, er1), @(2:32, er0)
1906 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1912 ;; Verify the affected registers.
1914 test_h_gr32 byte_dst-2 er0
1915 test_h_gr32 byte_src-1 er1
1916 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1923 ;; Now check the result of the move to memory.
1924 cmp.b @byte_src, @byte_dst
1928 ;; Now clear the destination location, and verify that.
1930 cmp.b @byte_src, @byte_dst
1933 .Lnext126: ; OK, pass on.
1935 mov_b_indexb16_to_indexb16: ; reg 16-bit indexed, memory to memory
1936 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1937 mov.l #0xffffff01, er1
1938 mov.l #0xffffff02, er0
1939 ;; mov.b @(dd:16, rs.b), @(dd:16, rd.b)
1941 mov.b @(byte_src-1:16, r1.b), @(byte_dst-2:16, r0.b)
1943 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1949 ;; Verify the affected registers.
1951 test_h_gr32 0xffffff02 er0
1952 test_h_gr32 0xffffff01 er1
1953 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1960 ;; Now check the result of the move to memory.
1961 cmp.b @byte_src, @byte_dst
1963 ;; Now clear the destination location, and verify that.
1965 cmp.b @byte_src, @byte_dst
1968 mov_b_indexw16_to_indewb16: ; reg 16-bit indexed, memory to memory
1969 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1970 mov.l #0xffff0003, er1
1971 mov.l #0xffff0004, er0
1972 ;; mov.b @(dd:16, rs.w), @(dd:16, rd.w)
1974 mov.b @(byte_src-3:16, r1.w), @(byte_dst-4:16, r0.w)
1976 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1982 ;; Verify the affected registers.
1984 test_h_gr32 0xffff0004 er0
1985 test_h_gr32 0xffff0003 er1
1986 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1993 ;; Now check the result of the move to memory.
1994 cmp.b @byte_src, @byte_dst
1996 ;; Now clear the destination location, and verify that.
1998 cmp.b @byte_src, @byte_dst
2001 mov_b_indexl16_to_indexl16: ; reg 16-bit indexed, memory to memory
2002 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2003 mov.l #0x00000005, er1
2004 mov.l #0x00000006, er0
2005 ;; mov.b @(dd:16, ers.l), @(dd:16, erd.l)
2007 mov.b @(byte_src-5:16, er1.l), @(byte_dst-6:16, er0.l)
2009 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2015 ;; Verify the affected registers.
2017 test_h_gr32 0x00000006 er0
2018 test_h_gr32 0x00000005 er1
2019 test_gr_a5a5 2 ; Make sure other general regs not disturbed
2026 ;; Now check the result of the move to memory.
2027 cmp.b @byte_src, @byte_dst
2029 ;; Now clear the destination location, and verify that.
2031 cmp.b @byte_src, @byte_dst
2034 mov_b_indexb32_to_indexb32: ; reg 32-bit indexed, memory to memory
2035 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2036 mov.l #0xffffff01, er1
2037 mov.l #0xffffff02, er0
2039 ;; mov.b @(dd:32, rs.b), @(dd:32, rd.b)
2040 mov.b @(byte_src-1:32, r1.b), @(byte_dst-2:32, r0.b)
2042 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2048 ;; Verify the affected registers.
2050 test_h_gr32 0xffffff02 er0
2051 test_h_gr32 0xffffff01 er1
2052 test_gr_a5a5 2 ; Make sure other general regs not disturbed
2059 ;; Now check the result of the move to memory.
2060 cmp.b @byte_src, @byte_dst
2062 ;; Now clear the destination location, and verify that.
2064 cmp.b @byte_src, @byte_dst
2067 mov_b_indexw32_to_indexw32: ; reg 32-bit indexed, memory to memory
2068 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2069 mov.l #0xffff0003, er1
2070 mov.l #0xffff0004, er0
2072 ;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
2073 mov.b @(byte_src-3:32, r1.w), @(byte_dst-4:32, r0.w)
2075 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2081 ;; Verify the affected registers.
2083 test_h_gr32 0xffff0004 er0
2084 test_h_gr32 0xffff0003 er1
2085 test_gr_a5a5 2 ; Make sure other general regs not disturbed
2092 ;; Now check the result of the move to memory.
2093 cmp.b @byte_src, @byte_dst
2095 ;; Now clear the destination location, and verify that.
2097 cmp.b @byte_src, @byte_dst
2100 mov_b_indexl32_to_indexl32: ; reg 32-bit indexed, memory to memory
2101 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2102 mov.l #0x00000005, er1
2103 mov.l #0x00000006, er0
2105 ;; mov.b @(dd:32, rs.w), @(dd:32, rd.w)
2106 mov.b @(byte_src-5:32, er1.l), @(byte_dst-6:32, er0.l)
2108 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2114 ;; Verify the affected registers.
2116 test_h_gr32 0x00000006 er0
2117 test_h_gr32 0x00000005 er1
2118 test_gr_a5a5 2 ; Make sure other general regs not disturbed
2125 ;; Now check the result of the move to memory.
2126 cmp.b @byte_src, @byte_dst
2128 ;; Now clear the destination location, and verify that.
2130 cmp.b @byte_src, @byte_dst
2133 mov_b_abs16_to_abs16: ; 16-bit absolute addr, memory to memory
2134 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2137 ;; mov.b @aa:16, @aa:16
2139 mov.b @byte_src:16, @byte_dst:16
2145 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2152 test_gr_a5a5 0 ; Make sure *NO* general registers are changed
2161 ;; Now check the result of the move to memory.
2162 cmp.b @byte_src, @byte_dst
2166 ;; Now clear the destination location, and verify that.
2168 cmp.b @byte_src, @byte_dst
2171 .Lnext136: ; OK, pass on.
2173 mov_b_abs32_to_abs32: ; 32-bit absolute addr, memory to memory
2174 set_grs_a5a5 ; Fill all general regs with a fixed pattern
2177 ;; mov.b @aa:32, @aa:32
2179 mov.b @byte_src:32, @byte_dst:32
2185 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
2191 test_gr_a5a5 0 ; Make sure *NO* general registers are changed
2200 ;; Now check the result of the move to memory.
2201 cmp.b @byte_src, @byte_dst
2205 ;; Now clear the destination location, and verify that.
2207 cmp.b @byte_src, @byte_dst
2210 .Lnext146: ; OK, pass on.