projects
/
external
/
gdb.git
/ blob
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
history
|
raw
|
HEAD
Upload Tizen:Base source
[external/gdb.git]
/
sim
/
testsuite
/
sim
/
frv
/
fbolr.cgs
1
# frv testcase for fbolr $FCCi,$hint
2
# mach: all
3
4
.include "testutils.inc"
5
6
start
7
8
.global fbolr
9
fbolr:
10
set_spr_addr bad,lr
11
set_fcc 0x0 0
12
fbolr fcc0,0
13
14
set_spr_addr bad,lr
15
set_fcc 0x1 1
16
fbolr fcc1,1
17
18
set_spr_addr ok3,lr
19
set_fcc 0x2 2
20
fbolr fcc2,2
21
fail
22
ok3:
23
set_spr_addr ok4,lr
24
set_fcc 0x3 3
25
fbolr fcc3,3
26
fail
27
ok4:
28
set_spr_addr ok5,lr
29
set_fcc 0x4 0
30
fbolr fcc0,0
31
fail
32
ok5:
33
set_spr_addr ok6,lr
34
set_fcc 0x5 1
35
fbolr fcc1,1
36
fail
37
ok6:
38
set_spr_addr ok7,lr
39
set_fcc 0x6 2
40
fbolr fcc2,2
41
fail
42
ok7:
43
set_spr_addr ok8,lr
44
set_fcc 0x7 3
45
fbolr fcc3,3
46
fail
47
ok8:
48
set_spr_addr ok9,lr
49
set_fcc 0x8 0
50
fbolr fcc0,0
51
fail
52
ok9:
53
set_spr_addr oka,lr
54
set_fcc 0x9 1
55
fbolr fcc1,1
56
fail
57
oka:
58
set_spr_addr okb,lr
59
set_fcc 0xa 2
60
fbolr fcc2,2
61
fail
62
okb:
63
set_spr_addr okc,lr
64
set_fcc 0xb 3
65
fbolr fcc3,3
66
fail
67
okc:
68
set_spr_addr okd,lr
69
set_fcc 0xc 0
70
fbolr fcc0,0
71
fail
72
okd:
73
set_spr_addr oke,lr
74
set_fcc 0xd 1
75
fbolr fcc1,1
76
fail
77
oke:
78
set_spr_addr okf,lr
79
set_fcc 0xe 2
80
fbolr fcc2,2
81
fail
82
okf:
83
set_spr_addr okg,lr
84
set_fcc 0xf 3
85
fbolr fcc3,3
86
fail
87
okg:
88
pass
89
bad:
90
fail