nobody [Thu, 14 Sep 2006 02:23:02 +0000 (02:23 +0000)]
This commit was manufactured by cvs2svn to create tag 'binutils-csl-
sourcerygxx-4_1-20'.
Sprout from binutils-csl-2_17-branch 2006-09-14 02:23:01 UTC Paul Brook <paul@codesourcery.com> '2006-09-14 Paul Brook <paul@codesourcery.com>'
Delete:
ld/emultempl/mipself.em
ld/testsuite/ld-mips-elf/hash1.s
ld/testsuite/ld-mips-elf/hash1a.d
ld/testsuite/ld-mips-elf/hash1b.d
ld/testsuite/ld-mips-elf/hash1c.d
Paul Brook [Thu, 14 Sep 2006 02:23:01 +0000 (02:23 +0000)]
2006-09-14 Paul Brook <paul@codesourcery.com>
ld/
* Makefile.in: Regenerate.
Nathan Sidwell [Mon, 11 Sep 2006 11:34:51 +0000 (11:34 +0000)]
gas/
* config/tc-m68k.c (m68k_register_mcf5210a_ctrl): New.
(m68k_cpus): Add 5210a & 5211a.
Nathan Sidwell [Mon, 11 Sep 2006 09:45:50 +0000 (09:45 +0000)]
bfd/
* Makefile.am (VERSUFFIX_s): Remove.
(bfdver.h): Replace bfd_version_suffix with bfd_version_package.
* configure.in: Replace --with-versuffix with --with-pkgversion.
* version.h: Remove BFD_VERSION_SUFFIX. Update BFD_VERSION_STRING.
* Makefile.in: Rebuilt.
* configure: Rebuilt.
binutils/
* Makefile.am (REPORT_BUGS_TO_s): Replace with ...
(REPORT_BUGS_TO): ... this.
(INCLUDES): Update.
* Makefile.in: Rebuilt.
gas/
* Makefile.am (REPORT_BUGS_TO_s): Replace with ...
(REPORT_BUGS_TO): ... this.
(INCLUDES, DEP_INCLUDES): Update.
* Makefile.in: Rebuilt.
gprof/
* Makefile.am (REPORT_BUGS_TO_s): Replace with ...
(REPORT_BUGS_TO): ... this.
(VERSUFFIX_s): Remove.
(INCLUDES): Update.
* configure.in: Replace --with-versuffix with --with-pkgversion.
* gprof.c (main): Update version printing.
* Makefile.in: Rebuilt.
* configure: Rebuilt.
ld/
* Makefile.am (REPORT_BUGS_TO_s): Replace with ...
(REPORT_BUGS_TO): ... this.
(INCLUDES): Update.
* Makefile.in: Rebuilt.
Paul Brook [Fri, 8 Sep 2006 22:36:13 +0000 (22:36 +0000)]
2006-09-08 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (object_arch): New variable.
(s_arm_object_arch): New function.
(md_pseudo_table): Add object_arch.
(aeabi_set_public_attributes): Obey object_arch.
* doc/c-arm.texi: Document .object_arch.
Nathan Sidwell [Fri, 8 Sep 2006 20:45:56 +0000 (20:45 +0000)]
missing changelog
Kazu Hirata [Fri, 8 Sep 2006 17:24:01 +0000 (17:24 +0000)]
gas/testsuite/
Backport
2006-09-08 Kazu Hirata <kazu@codesourcery.com>
* lib/gas-dg.exp (gas-dg-test): Treat $dir as a literal.
Nathan Sidwell [Fri, 8 Sep 2006 08:15:18 +0000 (08:15 +0000)]
* configure.in (TOPLEVEL_CONFIGURE_ARGUMENTS, baseargs): Fix
quoting.
* configure: Regenerated.
Paul Brook [Thu, 7 Sep 2006 20:02:45 +0000 (20:02 +0000)]
2006-09-07 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
gas/testsuite/
* gas/arm/arm-it.s: New test.
* gas/arm/arm-it.d: New test.
Paul Brook [Wed, 6 Sep 2006 16:35:22 +0000 (16:35 +0000)]
2006-09-06 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (parse_operands): Mark operand as present.
gas/testsuite/
* gas/arm/neon-omit.s: Test three-argument variants.
* gas/arm/neon-omit.d: Update expected output.
Julian Brown [Tue, 5 Sep 2006 20:23:47 +0000 (20:23 +0000)]
gas/
* config/tc-arm.c (parse_qfloat_immediate): Fix hex immediates,
handle 0.0 and -0.0 specially.
gas/testsuite/
* gas/arm/neon-const.s: Use FP syntax for 0/-0.
* gas/arm/vfp-neon-syntax-inc.s: Likewise, for 1.
Paul Brook [Tue, 5 Sep 2006 18:17:59 +0000 (18:17 +0000)]
2006-09-05 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (NEON_ENC_TAB): Fix encoding of vclt, vcle, vaclt
and vacle.
gas/testsuite/
* gas/arm/neon-cov.d: Adjust expected output.
* gas/arm/neon-omit.s: Add tests for vcgt and vcle. Reorder vacle
and vacle.
* gas/arm/neon-omit.d: Adjust expected output.
Paul Brook [Tue, 5 Sep 2006 16:25:48 +0000 (16:25 +0000)]
2006-09-05 Vladimir Prus <vladimir@codesourcery.com>
bfd/
* elf32-arm.c (elf32_arm_swap_symbol_out): Remove
unconditionall setting of low bit for Thumb symbol
mistakenly left behind after check for external
symbols was added.
ld/testsuite/
* ld-arm/use-thumb-lib.sym: Use regexps instead of
absolute addresses, for robustness.
Julian Brown [Tue, 5 Sep 2006 14:24:01 +0000 (14:24 +0000)]
gas/
* config/tc-arm.c (parse_qfloat_immediate): Disallow integer syntax for
floating-point immediates.
Paul Brook [Mon, 4 Sep 2006 15:55:36 +0000 (15:55 +0000)]
2006-09-04 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
Mark Shinwell [Fri, 1 Sep 2006 17:14:16 +0000 (17:14 +0000)]
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Correct masks for
R_ARM_THM_PC12 relocation.
Nathan Sidwell [Fri, 1 Sep 2006 09:25:14 +0000 (09:25 +0000)]
ld/testsuite/
* ld-elf/loadaddr.s: Copy from mainline.
Mark Shinwell [Thu, 31 Aug 2006 14:59:52 +0000 (14:59 +0000)]
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Adjust entries for
R_ARM_THM_ALU_PREL_11_0 and R_ARM_THM_PC12 relocations.
(elf32_arm_final_link_relocate): Handle R_ARM_THM_ALU_PREL_11_0
and R_ARM_THM_PC12 relocations.
Joseph Myers [Thu, 31 Aug 2006 13:21:22 +0000 (13:21 +0000)]
ld/testsuite/
* ld-scripts/crossref.exp: XFAIL third test on mips*-*-linux*.
Mark Shinwell [Wed, 30 Aug 2006 17:39:17 +0000 (17:39 +0000)]
bfd/
* elf32-arm.c (elf32_arm_final_link_relocate): Add support for
R_ARM_MOVW_BREL_NC, R_ARM_MOVW_BREL, R_ARM_MOVT_BREL,
R_ARM_THM_MOVW_BREL_NC, R_ARM_THM_MOVW_BREL and
R_ARM_THM_MOVT_BREL relocations.
Nathan Sidwell [Tue, 29 Aug 2006 13:55:31 +0000 (13:55 +0000)]
Add comment about my ldexp.c change
Nathan Sidwell [Tue, 29 Aug 2006 11:09:04 +0000 (11:09 +0000)]
* ldlang.c (walk_wild): Allow * to glob '/' in wildcarded match.
Nathan Sidwell [Tue, 29 Aug 2006 11:03:30 +0000 (11:03 +0000)]
ld/
Backport 2006-08-28 Alan Modra <amodra@bigpond.net.au>
* scripttempl/elf.sc: Ensure that crtbegin and crtend entries will
not match random object files in a path containing "crtbegin" or
"crtend" as part of a directory name.
* scripttempl/armbpabi.sc: Likewise.
* scripttempl/crisaout.sc: Likewise.
* scripttempl/elf32crx.sc: Likewise.
* scripttempl/elf32sh-symbian.sc: Likewise.
* scripttempl/elf_chaos.sc: Likewise.
* scripttempl/elfd10v.sc: Likewise.
* scripttempl/elfd30v.sc: Likewise.
* scripttempl/elfxtensa.sc: Likewise.
* scripttempl/iq2000.sc: Likewise.
* scripttempl/mmo.sc: Likewise.
* scripttempl/xstormy16.sc: Likewise.
Nathan Sidwell [Tue, 29 Aug 2006 10:57:16 +0000 (10:57 +0000)]
ld/
* ldexp.c (fold_name): Loadaddrs of sections with an lma_region
are absolute.
ld/testsuite/
* ld-elf/loadaddr3.t: New.
* ld-elf/loadaddr3a.d: New.
* ld-elf/loadaddr3b.d: New.
nobody [Tue, 29 Aug 2006 05:16:19 +0000 (05:16 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-29 05:16:18 UTC Alan Modra <amodra@gmail.com> 'Adjust target test.':
ld/testsuite/ld-elf/loadaddr3.t
ld/testsuite/ld-elf/loadaddr3a.d
ld/testsuite/ld-elf/loadaddr3b.d
Mark Shinwell [Thu, 24 Aug 2006 14:49:52 +0000 (14:49 +0000)]
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for
R_THM_CALL to 25 and remove FIXME comment.
(using_thumb2): New function.
(elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding.
ld/testsuite/
* arm-elf.exp: Add thumb1-bl, thumb2-bl, thumb2-bl-as-thumb1-bad
and thumb2-bl-bad tests.
* thumb1-bl.d: New.
* thumb1-bl.s: New.
* thumb2-bl-as-thumb1-bad.d: New.
* thumb2-bl-as-thumb1-bad.s: New.
* thumb2-bl-bad.d: New.
* thumb2-bl-bad.s: New.
* thumb2-bl.d: New.
* thumb2-bl.s: New.
Mark Shinwell [Thu, 24 Aug 2006 14:46:50 +0000 (14:46 +0000)]
bfd/
* elf32-arm.c (elf32_arm_final_link_relocate): Add cases
for R_ARM_ABS32_NOI and R_ARM_REL32_NOI.
(elf32_arm_gc_sweep_hook): Likewise.
(elf32_arm_check_relocs): Likewise.
(allocate_dynrelocs): Likewise.
Joseph Myers [Tue, 22 Aug 2006 15:08:47 +0000 (15:08 +0000)]
Merge changes between binutils-csl-2_17-branchpoint and
binutils-2_17, except for the addition of generated files to CVS.
Mark Shinwell [Mon, 21 Aug 2006 09:53:55 +0000 (09:53 +0000)]
bfd/
* elf32-arm.c (elf32_arm_link_hash_table): Correct typo in
comment for target1_is_rel.
Joseph Myers [Sat, 19 Aug 2006 16:27:35 +0000 (16:27 +0000)]
gas/
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite/
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
Paul Brook [Fri, 18 Aug 2006 15:01:16 +0000 (15:01 +0000)]
2006-08-18 Paul Brook <paul@codesourcery.com>
Backport from mainline.
bfd/
* elf32-arm.c (elf32_arm_link_hash_entry): Add export_glue.
(elf32_arm_link_hash_newfunc): Initialize export_glue.
(record_arm_to_thumb_glue): Return stub symbol.
(elf32_arm_create_thumb_stub): New function.
(elf32_arm_to_thumb_stub): Use it.
(elf32_arm_to_thumb_export_stub): New function.
(elf32_arm_begin_write_processing): New function.
(allocate_dynrelocs): Allocate Arm stubs.
(elf_backend_begin_write_processing): Define.
(elf32_arm_symbian_begin_write_processing): Remove ATTRIBUTE_UNUSED.
Call elf32_arm_begin_write_processing.
ld/
* emultempl/armelf.em (arm_elf_before_allocation): Call
gld${EMULATION_NAME}_before_allocation after setting interworking bfd.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Add armthumb-lib.so. Add
-use-blx to mixed-lib.so
* ld-arm/armthumb-lib.d: New file.
* ld-arm/armthumb-lib.sym: New file.
nobody [Fri, 18 Aug 2006 15:00:19 +0000 (15:00 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-18 15:00:18 UTC Paul Brook <paul@codesourcery.com> '2006-08-18 Paul Brook <paul@codesourcery.com>':
ld/testsuite/ld-arm/armthumb-lib.d
ld/testsuite/ld-arm/armthumb-lib.sym
ld/testsuite/ld-elf/loadaddr.s
Julian Brown [Fri, 18 Aug 2006 11:56:44 +0000 (11:56 +0000)]
libiberty/
* floatformat.c (get_field): Fix segfault with little-endian word
order on 64-bit hosts.
(put_field): Likewise.
(min): Move definition.
Julian Brown [Fri, 18 Aug 2006 10:30:35 +0000 (10:30 +0000)]
* arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as
signed on 64-bit hosts.
Julian Brown [Wed, 16 Aug 2006 10:37:32 +0000 (10:37 +0000)]
gas/
* config/tc-arm.c (md_assemble): Improve diagnostic when attempting
to use ARM instructions on non-ARM-supporting cores.
(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
mode automatically based on cpu variant.
(md_begin): Call above function.
gas/testsuite/
* gas/arm/noarm.s: Add test for disabled ARM insns.
* gas/arm/noarm.d: Drive test for above.
* gas/arm/noarm.l: Expected error output.
nobody [Wed, 16 Aug 2006 10:32:41 +0000 (10:32 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-16 10:32:40 UTC Julian Brown <julian@codesourcery.com> ' * gas/arm/noarm.s: Add test for disabled ARM insns.':
gas/testsuite/gas/arm/noarm.d
gas/testsuite/gas/arm/noarm.l
gas/testsuite/gas/arm/noarm.s
ld/emultempl/mipself.em
ld/testsuite/ld-mips-elf/hash1.s
ld/testsuite/ld-mips-elf/hash1a.d
ld/testsuite/ld-mips-elf/hash1b.d
ld/testsuite/ld-mips-elf/hash1c.d
Julian Brown [Wed, 16 Aug 2006 10:04:14 +0000 (10:04 +0000)]
* config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
recognized in non-unified syntax mode.
Mark Shinwell [Tue, 15 Aug 2006 10:53:53 +0000 (10:53 +0000)]
Correction to add missing "gas/" from previous ChangeLog.csl entry.
Mark Shinwell [Tue, 15 Aug 2006 10:50:40 +0000 (10:50 +0000)]
* config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
a directive saving VFP registers for ARMv6 or later.
(s_arm_unwind_save): Add parameter arch_v6 and call
s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
appropriate.
(md_pseudo_table): Add entry for new "vsave" directive.
* doc/c-arm.texi: Correct error in example for "save"
directive (fstmdf -> fstmdx). Also document "vsave" directive.
Joseph Myers [Thu, 3 Aug 2006 16:23:01 +0000 (16:23 +0000)]
Backport from mainline.
gas/
* config/tc-arm.c (parse_operands): Handle invalid register name
for OP_RIWR_RIWC.
gas/testsuite/
* gas/arm/iwmmxt-bad.s: Test invalid register names for wldrw and
wstrw.
* gas/arm/iwmmxt-bad.l: Update.
gas/
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
(parse_operands): Handle it.
(insns): Use it for tmcr and tmrc.
gas/testsuite/
* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
* gas/arm/iwmmxt.d: Update.
Carlos O'Donell [Fri, 28 Jul 2006 17:26:04 +0000 (17:26 +0000)]
2006-07-27 Carlos O'Donell <carlos@codesourcery.com>
bfd/
* elfxx-mips.c (_bfd_mips_elf_print_private_bfd_data):
Print EF_MIPS_NOREORDER, EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_XGOT
and EF_MIPS_UCODE.
Nathan Sidwell [Wed, 26 Jul 2006 18:46:24 +0000 (18:46 +0000)]
bfd/
* Makefile.am: (VERSUFFIX_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-versuffix option.
* version.h: Add BFD_VERSION_SUFFIX, use it
in BFD_VERSION_STRING.
binutils/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
gas/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
gprof/
* Makefile.am: (VERSUFFIX_s, REPORT_BUGS_TO_s): New. Pass
them to compiler via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-versuffix and --with-bugurl option.
* gprof.c: Print version suffix.
ld/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
Richard Sandiford [Wed, 26 Jul 2006 11:56:21 +0000 (11:56 +0000)]
opcodes/
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
"fdaddl" entry.
gas/testsuite/
* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
* gas/m68k/mcf-fpu.d: Update accordingly.
Julian Brown [Thu, 20 Jul 2006 14:16:42 +0000 (14:16 +0000)]
Backport from mainline.
opcodes/
* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Tweak expected fmsrr syntax.
* gas/arm/vfp-neon-syntax_t2.d: Likewise.
* gas/arm/vfp2.d: Likewise.
* gas/arm/vfp2_t2.d: Likewise.
Paul Brook [Wed, 19 Jul 2006 13:08:21 +0000 (13:08 +0000)]
2006-07-19 Paul Brook <paul@codesourcery.com>
Backport from mainline.
gas/
* config/tc-arm.c (insns): Fix rbit Arm opcode.
gas/testsuite/
* gas/arm/archv6t2.d: Adjust expected output for rbit.
opcodes/
* armd-dis.c (arm_opcodes): Fix rbit opcode.
Paul Brook [Tue, 18 Jul 2006 16:45:52 +0000 (16:45 +0000)]
2006-07-18 Paul Brook <paul@codesourcery.com>
Merge from mainline.
bfd/
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.
gas/
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
(md_convert_frag): Use correct reloc for add_pc. Use
BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
gas/testsuite/
* gas/arm/thumb2_add.d: New test.
* gas/arm/thumb2_add.s: New test.
nobody [Tue, 18 Jul 2006 16:44:48 +0000 (16:44 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-07-18 16:44:47 UTC Paul Brook <paul@codesourcery.com> '2006-07-18 Paul Brook <paul@codesourcery.com>':
gas/testsuite/gas/arm/thumb2_add.d
gas/testsuite/gas/arm/thumb2_add.s
Mark Shinwell [Fri, 14 Jul 2006 13:47:13 +0000 (13:47 +0000)]
Forgot to add file for previous commit.
Mark Shinwell [Fri, 14 Jul 2006 13:39:07 +0000 (13:39 +0000)]
2006-07-14 Nathan Sidwell <nathan@codesourcery.com>
bfd/
* config.bfd (sh-*-uclinux, sh[12]-*-uclinux): New stanza.
gas/
* configure.tgt (sh-*-uclinux, sh[12]-*-uclinux): Specify as elf.
ld/
* Makefile.am (ALL_EMULATIONS): Add eshelf_uclinux.o
(eshelf_uclinux.c): New target.
* Makefile.in: Rebuilt.
* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): New stanza.
* emulparams/shelf_uclinux.sh: New.
Richard Sandiford [Wed, 12 Jul 2006 13:05:41 +0000 (13:05 +0000)]
bfd/
2006-07-12 Matthew R. Dempsky <mrd@alkemio.org>
* cpu-m68k.c (bfd_m68k_compatible): Handle CPU32.
ld/testsuite/
2006-07-12 Richard Sandiford <richard@codesourcery.com>
* ld-m68k/merge-ok-1c.d: New test.
* ld-m68k/m68k.exp: Run it.
nobody [Wed, 12 Jul 2006 12:47:02 +0000 (12:47 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-07-12 12:47:00 UTC Richard Sandiford <rdsandiford@googlemail.com> 'bfd/':
ld/testsuite/ld-elf/eh1.d
ld/testsuite/ld-elf/eh2.d
ld/testsuite/ld-elf/eh3.d
ld/testsuite/ld-m68k/merge-ok-1c.d
Richard Sandiford [Sat, 24 Jun 2006 09:25:21 +0000 (09:25 +0000)]
binutils/testsuite/
* binutils-all/localize-hidden-1.d: Use objdump --syms instead
of readelf.
Richard Sandiford [Thu, 22 Jun 2006 15:44:18 +0000 (15:44 +0000)]
binutils/
* objcopy.c (localize_hidden): New variable.
(OPTION_LOCALIZE_HIDDEN): New command_line_switch value.
(copy_options): Add --localize-hidden.
(copy_usage): Mention --localize-hidden.
(is_hidden_symbol): New function.
(filter_symbols): Handle localize_hidden.
(copy_object): Call filter_symbols if localize_hidden.
(copy_main): Handle OPTION_LOCALIZE_HIDDEN.
* doc/binutils.texi (--localize-hidden): Document new option.
binutils/testsuite/
* binutils-all/localize-hidden-1.s,
* binutils-all/localize-hidden-1.d,
* binutils-all/localize-hidden-2.s,
* binutils-all/localize-hidden-2.d: New tests.
* binutils-all/objcopy.exp: Run them.
Richard Sandiford [Thu, 22 Jun 2006 15:40:14 +0000 (15:40 +0000)]
Backport from mainline:
binutils/testsuite/
2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
* lib/utils-lib.exp (run_dump_test): New.
(slurp_options): Likewise.
(regexp_diff): Likewise.
(file_contents): Likewise.
(verbose_eval): Likewise.
Mark Shinwell [Wed, 21 Jun 2006 14:40:24 +0000 (14:40 +0000)]
ld/
* ldlang.c (lang_insert_orphan): Correctly handle the case where
the section is to end up after the section currently at the end
of the list in output_bfd.
Paul Brook [Tue, 20 Jun 2006 13:55:00 +0000 (13:55 +0000)]
2006-06-19 Vladimir Prus <vladimir@codesourcery.com>
bfd/
* elf32-arm.c (elf32_arm_swap_symbol_out): Don't set low
bit for undefined symbols.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/use-thumb-lib.s: New file.
* ld-arm/use-thumb-lib.sym: New file.
Paul Brook [Mon, 19 Jun 2006 14:22:33 +0000 (14:22 +0000)]
2006-06-19 Vladimir Prus <vladimir@codesourcery.com>
bfd/
* elf32-arm.c (elf32_arm_swap_symbol_out): Don't set low
bit for undefined symbols.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/use-thumb-lib.s: New file.
* ld-arm/use-thumb-lib.sym: New file.
Mark Shinwell [Thu, 15 Jun 2006 15:53:11 +0000 (15:53 +0000)]
Support for ARM "group relocations" numbers 4, and 57 through 83.
* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
Julian Brown [Thu, 15 Jun 2006 15:25:02 +0000 (15:25 +0000)]
gas/
* config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
(do_neon_ldr_str): Always defer to VFP encoding routines, which handle
relocs properly.
nobody [Thu, 15 Jun 2006 11:03:03 +0000 (11:03 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-06-15 11:03:02 UTC Mark Shinwell <shinwell@codesourcery.com> ' * include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}':
gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.d
gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.l
gas/testsuite/gas/arm/group-reloc-alu-encoding-bad.s
gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.d
gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.l
gas/testsuite/gas/arm/group-reloc-alu-parsing-bad.s
gas/testsuite/gas/arm/group-reloc-alu.d
gas/testsuite/gas/arm/group-reloc-alu.s
gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.d
gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.l
gas/testsuite/gas/arm/group-reloc-ldc-encoding-bad.s
gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.d
gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.l
gas/testsuite/gas/arm/group-reloc-ldc-parsing-bad.s
gas/testsuite/gas/arm/group-reloc-ldc.d
gas/testsuite/gas/arm/group-reloc-ldc.s
gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.d
gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.l
gas/testsuite/gas/arm/group-reloc-ldr-encoding-bad.s
gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.d
gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.l
gas/testsuite/gas/arm/group-reloc-ldr-parsing-bad.s
gas/testsuite/gas/arm/group-reloc-ldr.d
gas/testsuite/gas/arm/group-reloc-ldr.s
gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d
gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.l
gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s
gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d
gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.l
gas/testsuite/gas/arm/group-reloc-ldrs-parsing-bad.s
gas/testsuite/gas/arm/group-reloc-ldrs.d
gas/testsuite/gas/arm/group-reloc-ldrs.s
gas/testsuite/gas/mips/vxworks1-el.d
gas/testsuite/gas/mips/vxworks1-xgot-el.d
gas/testsuite/gas/mips/vxworks1-xgot.d
gas/testsuite/gas/mips/vxworks1.d
ld/emulparams/elf32bfinfd.sh
ld/testsuite/ld-arm/group-relocs-alu-bad.d
ld/testsuite/ld-arm/group-relocs-alu-bad.s
ld/testsuite/ld-arm/group-relocs-ldc-bad.d
ld/testsuite/ld-arm/group-relocs-ldc-bad.s
ld/testsuite/ld-arm/group-relocs-ldr-bad.d
ld/testsuite/ld-arm/group-relocs-ldr-bad.s
ld/testsuite/ld-arm/group-relocs-ldrs-bad.d
ld/testsuite/ld-arm/group-relocs-ldrs-bad.s
ld/testsuite/ld-arm/group-relocs.d
ld/testsuite/ld-arm/group-relocs.s
ld/testsuite/ld-elf/eh1.s
ld/testsuite/ld-elf/eh1a.s
ld/testsuite/ld-elf/eh2a.s
ld/testsuite/ld-elf/eh3.s
ld/testsuite/ld-elf/eh3a.s
ld/testsuite/ld-mips-elf/stub-dynsym-1-10000.d
ld/testsuite/ld-mips-elf/stub-dynsym-1-2fe80.d
ld/testsuite/ld-mips-elf/stub-dynsym-1-7fff.d
ld/testsuite/ld-mips-elf/stub-dynsym-1-8000.d
ld/testsuite/ld-mips-elf/stub-dynsym-1-fff0.d
ld/testsuite/ld-mips-elf/stub-dynsym-1.ld
ld/testsuite/ld-mips-elf/stub-dynsym-1.s
Julian Brown [Thu, 25 May 2006 16:49:50 +0000 (16:49 +0000)]
* elf.c (sym_is_global): Return a bfd_boolean.
(ignore_section_sym): New function.
(elf_map_symbols): Use ignore_section_sym to discard some syms.
(_bfd_elf_symbol_from_bfd_symbol): Ensure section belongs to
bfd before using elf_section_syms.
Nathan Sidwell [Thu, 25 May 2006 13:12:42 +0000 (13:12 +0000)]
* gas/config/tc-m68k.c (mcf52235_ctrl, mcf5225_ctrl): New.
(m68k_cpus): Add 52230, 52233, 52234, 52235, 5224, 5225.
Paul Brook [Wed, 24 May 2006 17:14:53 +0000 (17:14 +0000)]
2006-05-24 Paul Brook <paul@codesourcery.com>
Backport from mainline.
* bfd/elf-bfd.h (elf_backend_data): Add
elf_backend_output_arch_local_syms
* bfd/elf32-arm.c (output_arch_syminfo): Define.
(elf32_arm_ouput_plt_map_sym, elf32_arm_output_plt_map,
elf32_arm_output_arch_local_syms): New functions.
(elf_backend_output_arch_local_syms): Define.
* bfd/elflink.c (bfd_elf_final_link): Call
elf_backend_output_arch_local_syms.
* bfd/elfxx-target.h (elf_backend_output_arch_local_syms): Provide
default definition.
(elfNN_bed): Add elf_backend_output_arch_local_syms.
* ld/testsuite/ld-arm/arm-app-abs32.d: Update expected output.
* ld/testsuite/ld-arm/arm-app.d: Ditto.
* ld/testsuite/ld-arm/arm-lib-plt32.d: Ditto.
* ld/testsuite/ld-arm/arm-lib.d: Ditto.
* ld/testsuite/ld-arm/mixed-app-v5.d: Ditto.
* ld/testsuite/ld-arm/mixed-app.d: Ditto.
* ld/testsuite/ld-arm/mixed-lib.d: Ditto.
Paul Brook [Wed, 24 May 2006 16:24:56 +0000 (16:24 +0000)]
2006-05-24 Paul Brook <paul@codesourcery.com>
Backport form mainline.
* bfd/elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
(elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
elf32_arm_finish_dynamic_symbol): Use them.
Richard Sandiford [Mon, 22 May 2006 11:58:46 +0000 (11:58 +0000)]
opcodes/
* m68k-dis.c (m68k_scan_mask): Add missing return.
Nathan Sidwell [Sat, 20 May 2006 14:48:56 +0000 (14:48 +0000)]
* binutils/testsuite/binutils-all/objcopy.exp: Skip for uclinux
targets.
Paul Brook [Mon, 15 May 2006 20:46:24 +0000 (20:46 +0000)]
2006-05-15 Paul Brook <paul@codesourcery.com>
Backport from mainline.
* bfd/cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
(bfd_is_arm_special_symbol_name): ... to this. Add type argument.
Check symbol name is of specified type.
* bfd/elf32-arm.c (elf32_arm_is_target_special_symbol,
arm_elf_find_function, elf32_arm_output_symbol_hook): Use
bfd_is_arm_special_symbol_name.
* bfd/bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
(bfd_is_arm_mapping_symbol_name): Remove prototype.
(bfd_is_arm_special_symbol_name): Add prototype.
* bfd/bfd-in2.h: Regenerate.
* gas/config/tc-arm.c (arm_adjust_symtab): Use
bfd_is_arm_special_symbol_name.
* ld/testsuite/ld-arm/arm-be8.d: New test.
* ld/testsuite/ld-arm/arm-be8.s: New test.
* ld/testsuite/ld-arm/arm-elf.exp: Add arm-be8.
nobody [Mon, 15 May 2006 19:57:36 +0000 (19:57 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-05-15 19:57:35 UTC Paul Brook <paul@codesourcery.com> '2006-05-15 Paul Brook <paul@codesourcery.com>':
ld/testsuite/ld-arm/arm-be8.d
ld/testsuite/ld-arm/arm-be8.s
Carlos O'Donell [Fri, 12 May 2006 19:39:03 +0000 (19:39 +0000)]
2006-05-12 Carlos O'Donell <carlos@codesourcery.com>
* binutils/doc/binutils.texi: Rename "Index" to "Binutils Index"
Carlos O'Donell [Thu, 11 May 2006 15:17:42 +0000 (15:17 +0000)]
2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
* bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index"
* ld/ld.texinfo: Rename "Index" to "LD Index"
* gas/doc/as.texinfo: Rename "Index" to "AS Index"
Rename "ABORT" to "ABORT (COFF)"
Joseph Myers [Sat, 6 May 2006 17:22:14 +0000 (17:22 +0000)]
Backport:
2006-03-30 Jakub Jelinek <jakub@redhat.com>
* ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
bfd_find_nearest_line succeeded for %C or %D, but filename
is NULL, print section+offset at the end.
Julian Brown [Fri, 5 May 2006 18:31:29 +0000 (18:31 +0000)]
* gas/config/tc-arm.c (stdarg.h): include.
(arm_it): Add uncond_value field. Add isvec and issingle to operand
array.
(arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
REG_TYPE_NSDQ (single, double or quad vector reg).
(reg_expected_msgs): Update.
(BAD_FPU): Add macro for unsupported FPU instruction error.
(parse_neon_type): Support 'd' as an alias for .f64.
(parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
sets of registers.
(parse_vfp_reg_list): Don't update first arg on error.
(parse_neon_mov): Support extra syntax for VFP moves.
(operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
(parse_operands): Support isvec, issingle operands fields, new parse
codes above.
(do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
msr variants.
(do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
(NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
(NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
(NEON_SHAPE_DEF): New macro. Define table of possible instruction
shapes.
(neon_shape): Redefine in terms of above.
(neon_shape_class): New enumeration, table of shape classes.
(neon_shape_el): New enumeration. One element of a shape.
(neon_shape_el_size): Register widths of above, where appropriate.
(neon_shape_info): New struct. Info for shape table.
(neon_shape_tab): New array.
(neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
(neon_check_shape): Rewrite as...
(neon_select_shape): New function to classify instruction shapes,
driven by new table neon_shape_tab array.
(neon_quad): New function. Return 1 if shape should set Q flag in
instructions (or equivalent), 0 otherwise.
(type_chk_of_el_type): Support F64.
(el_type_of_type_chk): Likewise.
(neon_check_type): Add support for VFP type checking (VFP data
elements fill their containing registers).
(do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
in thumb mode for VFP instructions.
(do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
and encode the current instruction as if it were that opcode.
(try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
arguments, call function in PFN.
(do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
(do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
(do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
(do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
(do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
Redirect Neon-syntax VFP instructions to VFP instruction handlers.
(do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
(do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
(neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
(do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
(do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
(do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
(do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
(do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
(do_neon_swp): Use neon_select_shape not neon_check_shape. Use
neon_quad.
(vfp_or_neon_is_neon): New function. Call if a mnemonic shared
between VFP and Neon turns out to belong to Neon. Perform
architecture check and fill in condition field if appropriate.
(do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
(do_neon_cvt): Add support for VFP variants of instructions.
(neon_cvt_flavour): Extend to cover VFP conversions.
(do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
vmov variants.
(do_neon_ldr_str): Handle single-precision VFP load/store.
(do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
NS_NULL not NS_IGNORE.
(opcode_tag): Add OT_csuffixF for operands which either take a
conditional suffix, or have 0xF in the condition field.
(md_assemble): Add support for OT_csuffixF.
(NCE): Replace macro with...
(NCE_tag, NCE, NCEF): New macros.
(nCE): Replace macro with...
(nCE_tag, nCE, nCEF): New macros.
(insns): Add support for VFP insns or VFP versions of insns msr, mrs,
vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
together.
* gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
all-true IT blocks.
* gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
unconditional Neon instructions are rejected...
* gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
* gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
(with IT).
* gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
mode.
* gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
* gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
mode.
* gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
syntax.
* gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
* gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
* gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
* gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
mode.
Nathan Sidwell [Fri, 5 May 2006 12:21:52 +0000 (12:21 +0000)]
* configure: Regenerate.
* configure.in: Enable gprof for cross builds.
Julian Brown [Wed, 3 May 2006 16:13:43 +0000 (16:13 +0000)]
* gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
Paul Brook [Wed, 3 May 2006 14:30:24 +0000 (14:30 +0000)]
2006-05-03 Paul Brook <paul@codesourcery.com>
* bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
(elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
(elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
* bfd/reloc.c: Ditto.
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* bfd/libcoff.h: Regenerate.
* gas/config/tc-arm.c (parse_half): New function.
(operand_parse_code): Remove OP_Iffff. Add OP_HALF.
(parse_operands): Ditto.
(do_mov16): Reject invalid relocations.
(do_t_mov16): Ditto. Use Thumb reloc numbers.
(insns): Replace Iffff with HALF.
(md_apply_fix): Add MOVW and MOVT relocs.
(tc_gen_reloc): Ditto.
* gas/doc/c-arm.texi: Document relocation operators
* ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
* ld/testsuite/ld-arm/arm-movwt.d: New test.
* ld/testsuite/ld-arm/arm-movwt.s: New test.
* ld/testsuite/ld-arm/arm.ld: Add .far.
Joseph Myers [Tue, 2 May 2006 14:51:29 +0000 (14:51 +0000)]
* gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
by 4 here.
(md_apply_fix3): Multiply offset by 4 here for
BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
* gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
wstrh.
* gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
* gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
and wldrh.
* gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
messages.
Paul Brook [Mon, 1 May 2006 16:27:16 +0000 (16:27 +0000)]
2006-05-01 Paul Brook <paul@codesourcery.com>
* bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
bit for R_ARM_REL32.
* gas/config/tc-arm.c (arm_optimize_expr): New function.
* gas/config/tc-arm.h (md_optimize_expr): Define
(arm_optimize_expr): Add prototype.
(TC_FORCE_RELOCATION_SUB_SAME): Define.
* ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
* ld/testsuite/ld-arm/thumb-rel32.d: New test.
* ld/testsuite/ld-arm/thumb-rel32.s: New test.
Paul Brook [Sat, 29 Apr 2006 17:54:32 +0000 (17:54 +0000)]
2006-04-29 Paul Brook <paul@codesourcery.com>
* opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
arm instructions.
(neon_opcodes): Add conditional execution specifiers.
(thumb_opcodes): Ditto.
(thumb32_opcodes): Ditto.
(arm_conditional): Change 0xe to "al" and add "" to end.
(ifthen_state, ifthen_next_state, ifthen_address): New.
(IFTHEN_COND): Define.
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
(print_insn_arm): Change %c to use new values of arm_conditional.
(print_insn_thumb16): Print thumb conditions. Add %I.
(print_insn_thumb32): Print thumb conditions.
(find_ifthen_state): New function.
(print_insn): Track IT block state.
* gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
* gas/testsuite/gas/arm/thumb32.d: Ditto.
* gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
* gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
* binutils/testsuite/binutils-all/arm/objdump.exp: New file.
* binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
Mark Mitchell [Sat, 29 Apr 2006 00:33:35 +0000 (00:33 +0000)]
* doc/as.texinfo: Mention that some .type syntaxes are not
supported on all architectures.
Richard Sandiford [Thu, 27 Apr 2006 17:04:51 +0000 (17:04 +0000)]
include/opcodes/
* m68k.h (mcf_mask): Define.
opcodes/
* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
and fmovem entries. Put register list entries before immediate
mask entries. Use "l" rather than "L" in the fmovem entries.
* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
out from INFO.
(m68k_scan_mask): New function, split out from...
(print_insn_m68k): ...here. If no architecture has been set,
first try printing an m680x0 instruction, then try a Coldfire one.
Richard Sandiford [Thu, 27 Apr 2006 17:01:18 +0000 (17:01 +0000)]
bfd/
* elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
(elf_m68k_plt_info): Likewise.
(elf_m68k_plt_info): New table.
(CFV4E_PLT_ENTRY_SIZE): Rename to...
(ISAB_PLT_ENTRY_SIZE): ...this.
(CFV4E_FLAG): Delete.
(elf_cfv4e_plt0_entry): Rename to...
(elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
for the second instruction too.
(elf_cfv4e_plt_entry): Rename to...
(elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
(elf_isab_plt_info): New table.
(CPU32_FLAG): Delete.
(PLT_CPU32_ENTRY_SIZE): Rename to...
(CPU32_PLT_ENTRY_SIZE): ...this.
(elf_cpu32_plt0_entry): Update bounds accordingly.
(elf_cpu32_plt_entry): Likewise.
(elf_cpu32_plt_info): New table.
(elf_m68k_link_hash_table): Add a plt_info field.
(elf_m68k_link_hash_table_create): Initialize it.
(elf_m68k_get_plt_info): New function.
(elf_m68k_always_size_sections): Likewise.
(elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
(elf_m68k_install_pcrel_field): New function.
(elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
elf_m68k_install_pcrel_field.
(elf_m68k_finish_dynamic_sections): Likewise.
(elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
(elf_backend_always_size_sections): Define.
Julian Brown [Wed, 26 Apr 2006 16:30:48 +0000 (16:30 +0000)]
* gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
checking.
(do_neon_mov): Enable several VMOV variants for VFP. Add suitable
architecture version checks.
(insns): Allow overlapping instructions to be used in VFP mode.
* gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
VFP/Neon instructions.
* gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
* gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
* gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
as vldm/vstm.
Julian Brown [Wed, 26 Apr 2006 16:24:26 +0000 (16:24 +0000)]
* gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
(is_quarter_float): Rename from above. Simplify slightly.
(parse_qfloat_immediate): Parse a "quarter precision" floating-point
number.
(parse_neon_mov): Parse floating-point constants.
(neon_qfloat_bits): Fix encoding.
(neon_cmode_for_move_imm): Tweak to use floating-point encoding in
preference to integer encoding when using the F32 type.
* gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
constants.
* gas/testsuite/gas/arm/neon-const.d: Expected output of above.
* gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
for VMOV.F32.
* opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
constant VMOV.
nobody [Wed, 26 Apr 2006 16:02:41 +0000 (16:02 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-04-26 16:02:40 UTC Julian Brown <julian@codesourcery.com> ' * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point':
gas/testsuite/gas/arm/neon-const.d
gas/testsuite/gas/arm/neon-const.s
gas/testsuite/gas/mips/vxworks1.s
gas/testsuite/gas/sparc/vxworks-pic.d
gas/testsuite/gas/sparc/vxworks-pic.s
ld/elf-hints-local.h
ld/emulparams/elf32_sparc_vxworks.sh
ld/emulparams/elf32ebmipvxworks.sh
ld/emulparams/elf32elmipvxworks.sh
ld/testsuite/ld-mips-elf/tls-hidden3.d
ld/testsuite/ld-mips-elf/tls-hidden3.got
ld/testsuite/ld-mips-elf/tls-hidden3.ld
ld/testsuite/ld-mips-elf/tls-hidden3.r
ld/testsuite/ld-mips-elf/tls-hidden3a.s
ld/testsuite/ld-mips-elf/tls-hidden3b.s
ld/testsuite/ld-mips-elf/tls-hidden4.got
ld/testsuite/ld-mips-elf/tls-hidden4.r
ld/testsuite/ld-mips-elf/tls-hidden4a.s
ld/testsuite/ld-mips-elf/tls-hidden4b.s
ld/testsuite/ld-mips-elf/vxworks1-lib.dd
ld/testsuite/ld-mips-elf/vxworks1-lib.nd
ld/testsuite/ld-mips-elf/vxworks1-lib.rd
ld/testsuite/ld-mips-elf/vxworks1-lib.s
ld/testsuite/ld-mips-elf/vxworks1-static.d
ld/testsuite/ld-mips-elf/vxworks1.dd
ld/testsuite/ld-mips-elf/vxworks1.ld
ld/testsuite/ld-mips-elf/vxworks1.rd
ld/testsuite/ld-mips-elf/vxworks1.s
ld/testsuite/ld-mips-elf/vxworks2-static.sd
ld/testsuite/ld-mips-elf/vxworks2.s
ld/testsuite/ld-mips-elf/vxworks2.sd
ld/testsuite/ld-sparc/vxworks1-lib.dd
ld/testsuite/ld-sparc/vxworks1-lib.nd
ld/testsuite/ld-sparc/vxworks1-lib.rd
ld/testsuite/ld-sparc/vxworks1-lib.s
ld/testsuite/ld-sparc/vxworks1-static.d
ld/testsuite/ld-sparc/vxworks1.dd
ld/testsuite/ld-sparc/vxworks1.ld
ld/testsuite/ld-sparc/vxworks1.rd
ld/testsuite/ld-sparc/vxworks1.s
ld/testsuite/ld-sparc/vxworks2-static.sd
ld/testsuite/ld-sparc/vxworks2.s
ld/testsuite/ld-sparc/vxworks2.sd
Julian Brown [Mon, 24 Apr 2006 21:37:24 +0000 (21:37 +0000)]
* libiberty/floatformat.c (floatformat_to_double): Fix (biased)
exponent=0 case.
Carlos O'Donell [Wed, 12 Apr 2006 19:06:26 +0000 (19:06 +0000)]
Correct ChangeLog.csl date typo.
Carlos O'Donell [Wed, 12 Apr 2006 19:06:01 +0000 (19:06 +0000)]
2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.tpl: Add install-html to install target deps.
* Makefile.in: Regenerate.
Julian Brown [Fri, 7 Apr 2006 15:46:21 +0000 (15:46 +0000)]
* gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
zero-initialising structures containing it will lead to invalid
types).
(arm_it): Add vectype to each operand.
(NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
defined field.
(neon_typed_alias): New structure. Extra information for typed
register aliases.
(reg_entry): Add neon type info field.
(arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
Break out alternative syntax for coprocessor registers, etc. into...
(arm_reg_alt_syntax): New function. Alternate syntax handling broken
out from arm_reg_parse.
(parse_neon_type): Move. Return SUCCESS/FAIL.
(first_error): New function. Call to ensure first error which occurs
is reported.
(parse_neon_operand_type): Parse exactly one type.
(NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
(parse_typed_reg_or_scalar): New function. Handle core of both
arm_typed_reg_parse and parse_scalar.
(arm_typed_reg_parse): Parse a register with an optional type.
(NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
result.
(parse_scalar): Parse a Neon scalar with optional type.
(parse_reg_list): Use first_error.
(parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
(neon_alias_types_same): New function. Return true if two (alias) types
are the same.
(parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
of elements.
(insert_reg_alias): Return new reg_entry not void.
(insert_neon_reg_alias): New function. Insert type/index information as
well as register for alias.
(create_neon_reg_alias): New function. Parse .dn/.qn directives and
make typed register aliases accordingly.
(s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
of line.
(s_unreq): Delete type information if present.
(s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
(s_arm_unwind_save_mmxwcg): Likewise.
(s_arm_unwind_movsp): Likewise.
(s_arm_unwind_setfp): Likewise.
(parse_shift): Likewise.
(parse_shifter_operand): Likewise.
(parse_address): Likewise.
(parse_tb): Likewise.
(tc_arm_regname_to_dw2regnum): Likewise.
(md_pseudo_table): Add dn, qn.
(parse_neon_mov): Handle typed operands.
(parse_operands): Likewise.
(neon_type_mask): Add N_SIZ.
(N_ALLMODS): New macro.
(neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
(el_type_of_type_chk): Add some safeguards.
(modify_types_allowed): Fix logic bug.
(neon_check_type): Handle operands with types.
(neon_three_same): Remove redundant optional arg handling.
(do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
(do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
(do_neon_step): Adjust accordingly.
(neon_cmode_for_logic_imm): Use first_error.
(do_neon_bitfield): Call neon_check_type.
(neon_dyadic): Rename to...
(neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
allow modification of type of the destination.
(do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
(do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
(do_neon_compare): Make destination be an untyped bitfield.
(neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
(neon_mul_mac): Return early in case of errors.
(neon_move_immediate): Use first_error.
(neon_mac_reg_scalar_long): Fix type to include scalar.
(do_neon_dup): Likewise.
(do_neon_mov): Likewise (in several places).
(do_neon_tbl_tbx): Fix type.
(do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
(do_neon_ld_dup): Exit early in case of errors and/or use first_error.
(opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
Handle .dn/.qn directives.
(REGDEF): Add zero for reg_entry neon field.
* gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
* gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
Carlos O'Donell [Mon, 3 Apr 2006 15:44:50 +0000 (15:44 +0000)]
2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
* Makefile.tpl: Add install-html target.
* Makefile.def: Add install-html target.
* Makefile.in: Regenerate.
* configure.in: Add --with-datarootdir, --with-docdir,
and --with-htmldir options.
* configure: Regenerate.
* opcodes/Makefile.am: Add install-html target.
* opcodes/Makefile.in: Regenerate.
* libiberty/Makefile.in: Add install-html, install-html-am, and
install-html-recursive targets. Define mkdir_p and
NORMAL_INSTALL.
* libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
* libiberty/configure: Regenerate.
* libiberty/testsuite/Makefile.in: Add install-html and html targets.
* ld/Makefile.am: Add install-html, install-html-am, and
install-html-recursive targets.
* ld/Makefile.in: Regenerate.
* ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
* ld/configure: Regenerate.
* ld/po/Make-in: Add install-html target.
* intl/Makefile.in: Add html info and dvi and install-html to .PHONY
Add install-html target.
* gprof/po/Make-in: Add install-html target.
* gprof/Makefile.am: Add install-html, install-html-am and
install-html-recursive targets.
* gprof/Makefile.in: Regenerate.
* gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
* gprof/configure: Regenerate.
* gas/po/Make-in: Add install-html target.
* gas/Makefile.am: Add install-html and install-html-recursive targets.
* gas/Makefile.in: Regenerate.
* gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
* gas/configure: Regenerate.
* gas/doc/Makefile.am: Add install-html and install-html-am targets.
* gas/doc/Makefile.in: Regenerate.
* binutils/po/Make-in: Add install-html target.
* binutils/Makefile.am: Add install-html and install-html-recursive targets.
* binutils/Makefile.in: Regenerate.
* binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
* binutils/configure: Regenerate.
* binutils/doc/Makefile.am: Add install-html and install-html-am targets.
* binutils/doc/Makefile.in: Regenerate.
* bfd/po/Make-in: Add install-html target.
* bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
htmldir. Add install-html and install-html-recursive targets.
* bfd/Makefile.in: Regenerate.
* bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
* bfd/configure: Regenerate.
* bfd/doc/Makefile.am: Add install-html and install-html-am targets.
Define datarootdir, docdir and htmldir.
* bfd/doc/Makefile.in: Regenerate.
* etc/Makefile.in: Add install-html target. Add htmldir,
docdir and datarootdir.
* etc/configure.texi: Document install-html target.
* etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
* etc/configure: Regenerate.
Julian Brown [Mon, 3 Apr 2006 00:03:34 +0000 (00:03 +0000)]
* binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
* gas/config/tc-arm.c (limits.h): Include.
(fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
(fpu_vfp_v3_or_neon_ext): Declare constants.
(neon_el_type): New enumeration of types for Neon vector elements.
(neon_type_el): New struct. Define type and size of a vector element.
(NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
instruction.
(neon_type): Define struct. The type of an instruction.
(arm_it): Add 'vectype' for the current instruction.
(isscalar, immisalign, regisimm, isquad): New predicates for operands.
(vfp_sp_reg_pos): Rename to...
(vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
tags.
(arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
(Neon D or Q register).
(reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
D register.
(GE_OPT_PREFIX_BIG): Define constant, for use in...
(my_get_expression): Allow above constant as argument to accept
64-bit constants with optional prefix.
(arm_reg_parse): Add extra argument to return the specific type of
register in when either a D or Q register (REG_TYPE_NDQ) is requested.
Can be NULL.
(parse_scalar): New function. Parse Neon scalar (vector reg and index).
(parse_reg_list): Update for new arm_reg_parse args.
(parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
(parse_neon_el_struct_list): New function. Parse element/structure
register lists for VLD<n>/VST<n> instructions.
(s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
(s_arm_unwind_save_mmxwr): Likewise.
(s_arm_unwind_save_mmxwcg): Likewise.
(s_arm_unwind_movsp): Likewise.
(s_arm_unwind_setfp): Likewise.
(parse_big_immediate): New function. Parse an immediate, which may
be 64 bits wide. Put results in inst.operands[i].
(parse_shift): Update for new arm_reg_parse args.
(parse_address): Likewise. Add parsing of alignment specifiers.
(parse_neon_mov): Parse the operands of a VMOV instruction.
(operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
OP_oRNQ, OP_oRNDQ.
(parse_operands): Handle new codes above.
(encode_arm_vfp_sp_reg): Rename to...
(encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
selected VFP version only supports D0-D15.
(do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
(do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
(do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
(do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
encode_arm_vfp_reg name, and allow 32 D regs.
(do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
(do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
insns allowing 32 D regs.
(do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
(do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
constant-load and conversion insns introduced with VFPv3.
(neon_tab_entry): New struct.
(NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
those which are the targets of pseudo-instructions.
(neon_opc): Enumerate opcodes, use as indices into...
(neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
(NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
(NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
(NEON_ENC_DUP): Define meaningful helper macros to look up values in
neon_enc_tab.
(neon_shape): Enumerate shapes (permitted register widths, etc.) for
Neon instructions.
(neon_type_mask): New. Compact type representation for type
checking.
(N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
permitted type combinations.
(N_IGNORE_TYPE): New macro.
(neon_check_shape): New function. Check an instruction shape for
multiple alternatives. Return the specific shape for the current
instruction.
(neon_modify_type_size): New function. Modify a vector type and
size, depending on the bit mask in argument 1.
(neon_type_promote): New function. Convert a given "key" type (of an
operand) into the correct type for a different operand, based on a bit
mask.
(type_chk_of_el_type): New function. Convert a type and size into the
compact representation used for type checking.
(el_type_of_type_ckh): New function. Reverse of above (only when a
single bit is set in the bit mask).
(modify_types_allowed): New function. Alter a mask of allowed types
based on a bit mask of modifications.
(neon_check_type): New function. Check the type of the current
instruction against the variable argument list. The "key" type of the
instruction is returned.
(neon_dp_fixup): New function. Fill in and modify instruction bits for
a Neon data-processing instruction depending on whether we're in ARM
mode or Thumb-2 mode.
(neon_logbits): New function.
(neon_three_same, neon_two_same, do_neon_dyadic_i_su)
(do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
(do_neon_qshl_imm, neon_cmode_for_logic_imm)
(neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
(neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
(neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
(do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
(do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
(neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
(neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
(do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
(do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
(do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
(do_neon_qmovun, do_neon_rshift_sat_narrow)
(do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
(do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
(do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
(neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
(do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
(do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
(do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
(do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
(do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
(do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
(do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
functions. Neon bit encoding and encoding helpers.
(parse_neon_type): New function. Parse Neon type specifier.
(opcode_lookup): Allow parsing of Neon type specifiers.
(REGNUM2, REGSETH, REGSET2): New macros.
(reg_names): Add new VFPv3 and Neon registers.
(NUF, nUF, NCE, nCE): New macros for opcode table.
(insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
(tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
(arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
(arm_option_cpu_value): Add vfp3 and neon.
(aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
Fix VFPv1 attribute.
* gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
instruction.
* gas/testsuite/gas/arm/copro.d: Update accordingly.
* gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
in ARM mode.
* gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
* gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
instructions.
* gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
* gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
loads and stores.
* gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
* gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
register loads and stores.
* gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
* gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
operands.
* gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
* gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
instructions.
* gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
* gas/testsuite/gas/arm/vfp1xD.d: Likewise.
* gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
* gas/testsuite/gas/arm/vfp2.d: Likewise.
* gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
* gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
range for VFP instructions.
* gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
* gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
constant-load and conversion instructions.
* gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
* include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
(FPU_NEON_EXT_V1): Likewise.
(FPU_VFP_HARD): Update.
(FPU_VFP_V3): Define macro.
(FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
convert %<code>[zy] into %[zy]<code>. Expand meaning of
%<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers.
Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
Paul Brook [Sat, 1 Apr 2006 22:39:54 +0000 (22:39 +0000)]
2005-04-01 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
Mark Mitchell [Fri, 31 Mar 2006 01:17:06 +0000 (01:17 +0000)]
* libiberty/configure.ac: Add cygpath for mingw hosts.
* libiberty.configure: Rebuilt.
* libiberty/Makefile.in: Add cygpath.
* libiberty/cygpath.c: New.
* include/libiberty.h (pex_write_input): New declaration.
* libiberty/pex-common.c (pex_write_input): New function.
* libiberty/pexecute.txh (pex_write_input): Document it.
* libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
* libiberty/pex-unix.c (pex_unix_fdopenw): New function.
(funcs): List it as our fdopenw function.
* libiberty/pex-win32.c (pex_win32_fdopenw): New function.
(funcs): List it as our fdopenw function.
* libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
* libiberty/pex-msdos (funcs): Same.
* libiberty/functions.texi: Regenerated.
* libiberty/pex-common.h (struct pex_obj): Doc fixes.
* libiberty/functions.texi: Regenerate.
Mark Mitchell [Mon, 27 Mar 2006 09:44:43 +0000 (09:44 +0000)]
* libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
in parent.
Nathan Sidwell [Sun, 26 Mar 2006 16:12:21 +0000 (16:12 +0000)]
* gas/config/tc-m68k.c (m68k_init_arch): Move checking of
cfloat/m68881 to correct architecture before using it.
Paul Brook [Tue, 21 Mar 2006 22:45:46 +0000 (22:45 +0000)]
2006-03-21 Paul Brook <paul@codesourcery.com>
* gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
Nathan Sidwell [Tue, 21 Mar 2006 10:37:27 +0000 (10:37 +0000)]
* gas/config/tc-m68k.c (find_cf_chip): Merge into ...
(m68k_ip): ... here. Use for all chips. Protect against buffer
overrun and avoid excessive copying.
Nathan Sidwell [Tue, 21 Mar 2006 10:20:17 +0000 (10:20 +0000)]
* gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
m68020_control_regs, m68040_control_regs, m68060_control_regs,
mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
(m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
mcf5282_ctrl, mcfv4e_ctrl): ... these.
(mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
(struct m68k_cpu): Change chip field to control_regs.
(current_chip): Remove.
(control_regs): New.
(m68k_archs, m68k_extensions): Adjust.
(m68k_cpus): Reorder to be in cpu number order. Adjust.
(CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
(find_cf_chip): Reimplement for new organization of cpu table.
(select_control_regs): Remove.
(mri_chip): Adjust.
(struct save_opts): Save control regs, not chip.
(s_save, s_restore): Adjust.
(m68k_lookup_cpu): Give deprecated warning when necessary.
(m68k_init_arch): Adjust.
(md_show_usage): Adjust for new cpu table organization.
* include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
Mark Mitchell [Tue, 21 Mar 2006 09:54:33 +0000 (09:54 +0000)]
* libiberty/pex-win32.c (<errno.h>): Include.
(fix_argv): Remove.
(argv_to_cmdline): New function.
(std_suffixes): New variable.
(no_suffixes): Likewise.
(find_executable): New function.
(win32_spawn): Likewise.
(spawn_script): Use win32_spawn instead of _spawnv[p].
(pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
(pex_win32_wait): Likewise.
Richard Sandiford [Tue, 21 Mar 2006 09:51:28 +0000 (09:51 +0000)]
bfd/
* cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
incompatible. Likewise MAC and EMAC code.
* elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
bfd_get_compatible to set the new bfd architecture. Rely on it
to detect incompatibilities.
gas/
* config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
mcfemac instead of mcfmac.
ld/testsuite/
* ld-m68k/merge-error-1a.s, ld-m68k/merge-error-1b.s,
* ld-m68k/merge-error-1a.d, ld-m68k/merge-error-1b.d,
* ld-m68k/merge-error-1c.d, ld-m68k/merge-error-1d.d,
* ld-m68k/merge-error-1e.d, ld-m68k/merge-ok-1a.d,
* ld-m68k/merge-ok-1b.d: New tests.
* ld-m68k/m68k.exp: Run them.
Paul Brook [Mon, 20 Mar 2006 23:35:40 +0000 (23:35 +0000)]
2006-03-20 Paul Brook <paul@codesourcery.com>
* gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
* gas/testsuite/gas/arm/thumb32.d: Correct expected output.
projects / external / binutils.git / log