1 # Hitachi H8 testcase 'xor.b'
3 # as(h8300): --defsym sim_cpu=0
4 # as(h8300h): --defsym sim_cpu=1
5 # as(h8300s): --defsym sim_cpu=2
6 # as(h8sx): --defsym sim_cpu=3
7 # ld(h8300h): -m h8300helf
8 # ld(h8300s): -m h8300self
9 # ld(h8sx): -m h8300sxelf
11 .include "testutils.inc"
13 # Instructions tested:
14 # xor.b #xx:8, rd ; d rd xxxxxxxx
15 # xor.b #xx:8, @erd ; 7 d rd ???? d ???? xxxxxxxx
16 # xor.b #xx:8, @erd+ ; 0 1 7 4 6 c rd 1??? d ???? xxxxxxxx
17 # xor.b #xx:8, @erd- ; 0 1 7 6 6 c rd 1??? d ???? xxxxxxxx
18 # xor.b #xx:8, @+erd ; 0 1 7 5 6 c rd 1??? d ???? xxxxxxxx
19 # xor.b #xx:8, @-erd ; 0 1 7 7 6 c rd 1??? d ???? xxxxxxxx
20 # xor.b rs, rd ; 1 5 rs rd
21 # xor.b reg8, @erd ; 7 d rd ???? 1 5 rs ????
22 # xor.b reg8, @erd+ ; 0 1 7 9 8 rd 5 rs
23 # xor.b reg8, @erd- ; 0 1 7 9 a rd 5 rs
24 # xor.b reg8, @+erd ; 0 1 7 9 9 rd 5 rs
25 # xor.b reg8, @-erd ; 0 1 7 9 b rd 5 rs
41 set_grs_a5a5 ; Fill all general regs with a fixed pattern
45 xor.b #0xff, r0l ; Immediate 8-bit operand
47 ;; fixme test ccr ; H=0 N=1 Z=0 V=0 C=0
48 test_h_gr16 0xa55a r0 ; xor result: a5 ^ ff
49 .if (sim_cpu) ; non-zero means h8300h, s, or sx
50 test_h_gr32 0xa5a5a55a er0 ; xor result: a5 ^ ff
52 test_gr_a5a5 1 ; Make sure other general regs not disturbed
62 set_grs_a5a5 ; Fill all general regs with a fixed pattern
67 xor.b #0xff:8, @er0 ; Immediate 8-bit src, reg indirect dst
71 test_carry_clear ; H=0 N=0 Z=0 V=0 C=0
76 test_h_gr32 byte_dest, er0 ; er0 still contains address
77 test_gr_a5a5 1 ; Make sure other general regs not disturbed
85 ;; Now check the result of the xor to memory.
94 set_grs_a5a5 ; Fill all general regs with a fixed pattern
99 xor.b #0xff:8, @er0+ ; Immediate 8-bit src, reg indirect dst
104 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
109 test_h_gr32 post_byte, er0 ; er0 contains address plus one
110 test_gr_a5a5 1 ; Make sure other general regs not disturbed
118 ;; Now check the result of the xor to memory.
120 mov.b @byte_dest, r0l
126 xor_b_imm8_rdpostdec:
127 set_grs_a5a5 ; Fill all general regs with a fixed pattern
132 xor.b #0xff:8, @er0- ; Immediate 8-bit src, reg indirect dst
137 test_carry_clear ; H=0 N=0 Z=0 V=0 C=0
142 test_h_gr32 pre_byte, er0 ; er0 contains address minus one
143 test_gr_a5a5 1 ; Make sure other general regs not disturbed
151 ;; Now check the result of the xor to memory.
153 mov.b @byte_dest, r0l
163 set_grs_a5a5 ; Fill all general regs with a fixed pattern
168 xor.b r0h, r0l ; Register operand
170 ;; fixme test ccr ; H=0 N=1 Z=0 V=0 C=0
171 test_h_gr16 0xff5a r0 ; xor result: a5 ^ ff
172 .if (sim_cpu) ; non-zero means h8300h, s, or sx
173 test_h_gr32 0xa5a5ff5a er0 ; xor result: a5 ^ ff
175 test_gr_a5a5 1 ; Make sure other general regs not disturbed
183 .if (sim_cpu == h8sx)
185 set_grs_a5a5 ; Fill all general regs with a fixed pattern
188 ;; xor.b rs8,@eRd ; xor reg8 to register indirect
191 xor.b r1l, @er0 ; reg8 src, reg indirect dest
195 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
200 test_h_gr32 byte_dest er0 ; er0 still contains address
201 test_h_gr32 0xa5a5a5ff er1 ; er1 has the test load
203 test_gr_a5a5 2 ; Make sure other general regs not disturbed
210 ;; Now check the result of the or to memory.
212 mov.b @byte_dest, r0l
218 xor_b_reg8_rdpostinc:
219 set_grs_a5a5 ; Fill all general regs with a fixed pattern
222 ;; xor.b rs8,@eRd+ ; xor reg8 to register post-increment
225 xor.b r1l, @er0+ ; reg8 src, reg post-increment dest
229 test_carry_clear ; H=0 N=0 Z=0 V=0 C=0
234 test_h_gr32 post_byte er0 ; er0 contains address plus one
235 test_h_gr32 0xa5a5a5ff er1 ; er1 has the test load
237 test_gr_a5a5 2 ; Make sure other general regs not disturbed
244 ;; Now check the result of the or to memory.
246 mov.b @byte_dest, r0l
252 xor_b_reg8_rdpostdec:
253 set_grs_a5a5 ; Fill all general regs with a fixed pattern
256 ;; xor.b rs8,@eRd- ; xor reg8 to register post-decrement
259 xor.b r1l, @er0- ; reg8 src, reg indirect dest
263 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
268 test_h_gr32 pre_byte er0 ; er0 contains address minus one
269 test_h_gr32 0xa5a5a5ff er1 ; er1 has the test load
271 test_gr_a5a5 2 ; Make sure other general regs not disturbed
278 ;; Now check the result of the or to memory.
280 mov.b @byte_dest, r0l
289 set_grs_a5a5 ; Fill all general regs with a fixed pattern
295 xorc #0x8, ccr ; Immediate 8-bit operand (neg flag)
301 xorc #0x4, ccr ; Immediate 8-bit operand (zero flag)
307 xorc #0x2, ccr ; Immediate 8-bit operand (overflow flag)
313 xorc #0x1, ccr ; Immediate 8-bit operand (carry flag)
318 test_gr_a5a5 0 ; Make sure other general regs not disturbed
327 .if (sim_cpu == h8300s || sim_cpu == h8sx) ; Earlier versions, no exr
329 set_grs_a5a5 ; Fill all general regs with a fixed pattern
352 xorc #0x2, exr ; Immediate 8-bit operand (overflow flag)
359 xorc #0x1, exr ; Immediate 8-bit operand (carry flag)
366 test_h_gr32 0xa5a5a500 er0
367 test_gr_a5a5 1 ; Make sure other general regs not disturbed
374 .endif ; not h8300 or h8300h