1 # Hitachi H8 testcase 'subx'
3 # as(h8300): --defsym sim_cpu=0
4 # as(h8300h): --defsym sim_cpu=1
5 # as(h8300s): --defsym sim_cpu=2
6 # as(h8sx): --defsym sim_cpu=3
7 # ld(h8300h): -m h8300helf
8 # ld(h8300s): -m h8300self
9 # ld(h8sx): -m h8300sxelf
11 .include "testutils.inc"
13 # Instructions tested:
14 # subx.b #xx:8, rd8 ; b rd8 xxxxxxxx
15 # subx.b #xx:8, @erd ; 7 d erd ???? b ???? xxxxxxxx
16 # subx.b #xx:8, @erd- ; 0 1 7 6 6 c erd 1??? b ???? xxxxxxxx
17 # subx.b rs8, rd8 ; 1 e rs8 rd8
18 # subx.b rs8, @erd ; 7 d erd ???? 1 e rs8 ????
19 # subx.b rs8, @erd- ; 0 1 7 6 6 c erd 1??? 1 e rs8 ????
20 # subx.b @ers, rd8 ; 7 c ers ???? 1 e ???? rd8
21 # subx.b @ers-, rd8 ; 0 1 7 6 6 c ers 00?? 1 e ???? rd8
22 # subx.b @ers, @erd ; 0 1 7 4 6 8 ers d 0 erd 3 ????
23 # subx.b @ers-, @erd- ; 0 1 7 6 6 c ers d a erd 3 ????
37 long_src: .long 0x50505
44 set_grs_a5a5 ; Fill all general regs with a fixed pattern
47 ;; subx.b #xx:8,Rd ; Subx with carry initially zero.
48 subx.b #5, r0l ; Immediate 8-bit operand
50 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
55 test_h_gr16 0xa5a0 r0 ; sub result: a5 - 5
56 .if (sim_cpu) ; non-zero means h8300h, s, or sx
57 test_h_gr32 0xa5a5a5a0 er0 ; sub result: a5 - 5
59 test_gr_a5a5 1 ; Make sure other general regs not disturbed
68 set_grs_a5a5 ; Fill all general regs with a fixed pattern
71 ;; subx.b #xx:8,Rd ; Subx with carry initially one.
73 subx.b #4, r0l ; Immediate 8-bit operand
75 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
80 test_h_gr16 0xa5a0 r0 ; sub result: a5 - (4 + 1)
81 .if (sim_cpu) ; non-zero means h8300h, s, or sx
82 test_h_gr32 0xa5a5a5a0 er0 ; sub result: a5 - (4 + 1)
84 test_gr_a5a5 1 ; Make sure other general regs not disturbed
94 set_grs_a5a5 ; Fill all general regs with a fixed pattern
96 ;; subx.b #xx:8,@eRd ; Subx to register indirect
102 test_carry_clear ; H=0 N=0 Z=0 V=0 C=0
107 test_h_gr32 byte_dest er0 ; er0 still contains subress
109 test_gr_a5a5 1 ; Make sure other general regs not disturbed
117 ;; Now check the result of the sub to memory.
118 cmp.b #0xa0, @byte_dest
123 subx_b_imm8_rdpostdec:
124 set_grs_a5a5 ; Fill all general regs with a fixed pattern
126 ;; subx.b #xx:8,@eRd- ; Subx to register post-decrement
132 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
137 test_h_gr32 byte_dest-1 er0 ; er0 contains subress minus one
139 test_gr_a5a5 1 ; Make sure other general regs not disturbed
147 ;; Now check the result of the sub to memory.
148 cmp.b #0xa0, @byte_dest
155 set_grs_a5a5 ; Fill all general regs with a fixed pattern
157 ;; subx.b Rs,Rd ; subx with carry initially zero
160 subx.b r0h, r0l ; Register operand
162 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
167 test_h_gr16 0x05a0 r0 ; sub result: a5 - 5
168 .if (sim_cpu) ; non-zero means h8300h, s, or sx
169 test_h_gr32 0xa5a505a0 er0 ; sub result: a5 - 5
171 test_gr_a5a5 1 ; Make sure other general regs not disturbed
180 set_grs_a5a5 ; Fill all general regs with a fixed pattern
182 ;; subx.b Rs,Rd ; subx with carry initially one
186 subx.b r0h, r0l ; Register operand
188 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
193 test_h_gr16 0x04a0 r0 ; sub result: a5 - (4 + 1)
194 .if (sim_cpu) ; non-zero means h8300h, s, or sx
195 test_h_gr32 0xa5a504a0 er0 ; sub result: a5 - (4 + 1)
197 test_gr_a5a5 1 ; Make sure other general regs not disturbed
205 .if (sim_cpu == h8sx)
207 set_grs_a5a5 ; Fill all general regs with a fixed pattern
209 ;; subx.b rs8,@eRd ; Subx to register indirect
216 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
221 test_h_gr32 byte_dest er0 ; er0 still contains subress
222 test_h_gr32 0xa5a5a505 er1 ; er1 has the test load
224 test_gr_a5a5 2 ; Make sure other general regs not disturbed
231 ;; Now check the result of the sub to memory.
232 cmp.b #0xa0, @byte_dest
237 subx_b_reg8_rdpostdec:
238 set_grs_a5a5 ; Fill all general regs with a fixed pattern
240 ;; subx.b rs8,@eRd- ; Subx to register post-decrement
247 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
252 test_h_gr32 byte_dest-1 er0 ; er0 contains subress minus one
253 test_h_gr32 0xa5a5a505 er1 ; er1 contains the test load
255 test_gr_a5a5 2 ; Make sure other general regs not disturbed
262 ;; Now check the result of the sub to memory.
263 cmp.b #0xa0, @byte_dest
269 set_grs_a5a5 ; Fill all general regs with a fixed pattern
271 ;; subx.b @eRs,rd8 ; Subx from reg indirect to reg
276 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
281 test_h_gr32 byte_src er0 ; er0 still contains subress
282 test_h_gr32 0xa5a5a5a0 er1 ; er1 contains the sum
284 test_gr_a5a5 2 ; Make sure other general regs not disturbed
291 subx_b_rspostdec_reg8:
292 set_grs_a5a5 ; Fill all general regs with a fixed pattern
294 ;; subx.b @eRs-,rd8 ; Subx to register post-decrement
299 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
304 test_h_gr32 byte_src-1 er0 ; er0 contains subress minus one
305 test_h_gr32 0xa5a5a5a0 er1 ; er1 contains the sum
307 test_gr_a5a5 2 ; Make sure other general regs not disturbed
315 set_grs_a5a5 ; Fill all general regs with a fixed pattern
317 ;; subx.b @eRs,rd8 ; Subx from reg indirect to reg
324 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
329 test_h_gr32 byte_src er0 ; er0 still contains src subress
330 test_h_gr32 byte_dest er1 ; er1 still contains dst subress
332 test_gr_a5a5 2 ; Make sure other general regs not disturbed
338 ;; Now check the result of the sub to memory.
339 cmp.b #0xa0, @byte_dest
344 subx_b_rspostdec_rdpostdec:
345 set_grs_a5a5 ; Fill all general regs with a fixed pattern
351 ;; subx.b @eRs-,@erd- ; Subx post-decrement to post-decrement
354 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
359 test_h_gr32 byte_src-1 er0 ; er0 contains src subress minus one
360 test_h_gr32 byte_dest-1 er1 ; er1 contains dst subress minus one
362 test_gr_a5a5 2 ; Make sure other general regs not disturbed
368 ;; Now check the result of the sub to memory.
369 cmp.b #0xa0, @byte_dest
375 set_grs_a5a5 ; Fill all general regs with a fixed pattern
378 ;; subx.w #xx:16,Rd ; Subx with carry initially zero.
379 subx.w #0x505, r0 ; Immediate 16-bit operand
381 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
386 test_h_gr16 0xa0a0 r0 ; sub result: 0xa5a5 + 0x505
387 test_h_gr32 0xa5a5a0a0 er0 ; sub result: 0xa5a5 + 0x505
388 test_gr_a5a5 1 ; Make sure other general regs not disturbed
397 set_grs_a5a5 ; Fill all general regs with a fixed pattern
400 ;; subx.w #xx:16,Rd ; Subx with carry initially one.
402 subx.w #0x504, r0 ; Immediate 16-bit operand
404 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
409 test_h_gr16 0xa0a0 r0 ; sub result: 0xa5a5 + 0x505 + 1
410 test_h_gr32 0xa5a5a0a0 er0 ; sub result: 0xa5a5 + 0x505 + 1
411 test_gr_a5a5 1 ; Make sure other general regs not disturbed
420 set_grs_a5a5 ; Fill all general regs with a fixed pattern
422 ;; subx.w #xx:16,@eRd ; Subx to register indirect
428 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
433 test_h_gr32 word_dest er0 ; er0 still contains subress
435 test_gr_a5a5 1 ; Make sure other general regs not disturbed
443 ;; Now check the result of the sub to memory.
444 cmp.w #0xa0a0, @word_dest
449 subx_w_imm16_rdpostdec:
450 set_grs_a5a5 ; Fill all general regs with a fixed pattern
452 ;; subx.w #xx:16,@eRd- ; Subx to register post-decrement
458 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
463 test_h_gr32 word_dest-2 er0 ; er0 contains subress minus one
465 test_gr_a5a5 1 ; Make sure other general regs not disturbed
473 ;; Now check the result of the sub to memory.
474 cmp.w #0xa0a0, @word_dest
480 set_grs_a5a5 ; Fill all general regs with a fixed pattern
482 ;; subx.w Rs,Rd ; subx with carry initially zero
485 subx.w e0, r0 ; Register operand
487 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
492 test_h_gr32 0x0505a0a0 er0 ; sub result:
493 test_gr_a5a5 1 ; Make sure other general regs not disturbed
502 set_grs_a5a5 ; Fill all general regs with a fixed pattern
504 ;; subx.w Rs,Rd ; subx with carry initially one
508 subx.w e0, r0 ; Register operand
510 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
515 test_h_gr32 0x0504a0a0 er0 ; sub result:
516 test_gr_a5a5 1 ; Make sure other general regs not disturbed
525 set_grs_a5a5 ; Fill all general regs with a fixed pattern
527 ;; subx.w rs8,@eRd ; Subx to register indirect
534 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
539 test_h_gr32 word_dest er0 ; er0 still contains subress
540 test_h_gr32 0xa5a50505 er1 ; er1 has the test load
542 test_gr_a5a5 2 ; Make sure other general regs not disturbed
549 ;; Now check the result of the sub to memory.
550 cmp.w #0xa0a0, @word_dest
555 subx_w_reg16_rdpostdec:
556 set_grs_a5a5 ; Fill all general regs with a fixed pattern
558 ;; subx.w rs8,@eRd- ; Subx to register post-decrement
565 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
570 test_h_gr32 word_dest-2 er0 ; er0 contains subress minus one
571 test_h_gr32 0xa5a50505 er1 ; er1 contains the test load
573 test_gr_a5a5 2 ; Make sure other general regs not disturbed
580 ;; Now check the result of the sub to memory.
581 cmp.w #0xa0a0, @word_dest
587 set_grs_a5a5 ; Fill all general regs with a fixed pattern
589 ;; subx.w @eRs,rd8 ; Subx from reg indirect to reg
594 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
599 test_h_gr32 word_src er0 ; er0 still contains subress
600 test_h_gr32 0xa5a5a0a0 er1 ; er1 contains the sum
602 test_gr_a5a5 2 ; Make sure other general regs not disturbed
609 subx_w_rspostdec_reg16:
610 set_grs_a5a5 ; Fill all general regs with a fixed pattern
612 ;; subx.w @eRs-,rd8 ; Subx to register post-decrement
617 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
622 test_h_gr32 word_src-2 er0 ; er0 contains subress minus one
623 test_h_gr32 0xa5a5a0a0 er1 ; er1 contains the sum
625 test_gr_a5a5 2 ; Make sure other general regs not disturbed
633 set_grs_a5a5 ; Fill all general regs with a fixed pattern
635 ;; subx.w @eRs,rd8 ; Subx from reg indirect to reg
642 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
647 test_h_gr32 word_src er0 ; er0 still contains src subress
648 test_h_gr32 word_dest er1 ; er1 still contains dst subress
650 test_gr_a5a5 2 ; Make sure other general regs not disturbed
656 ;; Now check the result of the sub to memory.
657 cmp.w #0xa0a0, @word_dest
662 subx_w_rspostdec_rdpostdec:
663 set_grs_a5a5 ; Fill all general regs with a fixed pattern
665 ;; subx.w @eRs-,rd8 ; Subx to register post-decrement
672 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
677 test_h_gr32 word_src-2 er0 ; er0 contains src subress minus one
678 test_h_gr32 word_dest-2 er1 ; er1 contains dst subress minus one
680 test_gr_a5a5 2 ; Make sure other general regs not disturbed
686 ;; Now check the result of the sub to memory.
687 cmp.w #0xa0a0, @word_dest
693 set_grs_a5a5 ; Fill all general regs with a fixed pattern
696 ;; subx.l #xx:32,Rd ; Subx with carry initially zero.
697 subx.l #0x50505, er0 ; Immediate 32-bit operand
699 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
704 test_h_gr32 0xa5a0a0a0 er0 ; sub result:
705 test_gr_a5a5 1 ; Make sure other general regs not disturbed
714 set_grs_a5a5 ; Fill all general regs with a fixed pattern
717 ;; subx.l #xx:32,Rd ; Subx with carry initially one.
719 subx.l #0x50504, er0 ; Immediate 32-bit operand
721 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
726 test_h_gr32 0xa5a0a0a0 er0 ; sub result:
727 test_gr_a5a5 1 ; Make sure other general regs not disturbed
736 set_grs_a5a5 ; Fill all general regs with a fixed pattern
738 ;; subx.l #xx:32,@eRd ; Subx to register indirect
740 mov.l #0xa5a5a5a5, @er0
742 subx.l #0x50505, @er0
744 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
749 test_h_gr32 long_dest er0 ; er0 still contains subress
751 test_gr_a5a5 1 ; Make sure other general regs not disturbed
759 ;; Now check the result of the sub to memory.
760 cmp.l #0xa5a0a0a0, @long_dest
765 subx_l_imm32_rdpostdec:
766 set_grs_a5a5 ; Fill all general regs with a fixed pattern
768 ;; subx.l #xx:32,@eRd- ; Subx to register post-decrement
770 mov.l #0xa5a5a5a5, @er0
772 subx.l #0x50505, @er0-
774 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
779 test_h_gr32 long_dest-4 er0 ; er0 contains subress minus one
781 test_gr_a5a5 1 ; Make sure other general regs not disturbed
789 ;; Now check the result of the sub to memory.
790 cmp.l #0xa5a0a0a0, @long_dest
796 set_grs_a5a5 ; Fill all general regs with a fixed pattern
798 ;; subx.l Rs,Rd ; subx with carry initially zero
801 subx.l er0, er1 ; Register operand
803 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
808 test_h_gr32 0x50505 er0 ; sub load
809 test_h_gr32 0xa5a0a0a0 er1 ; sub result:
810 test_gr_a5a5 2 ; Make sure other general regs not disturbed
818 set_grs_a5a5 ; Fill all general regs with a fixed pattern
820 ;; subx.l Rs,Rd ; subx with carry initially one
824 subx.l er0, er1 ; Register operand
826 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
831 test_h_gr32 0x50504 er0 ; sub result:
832 test_h_gr32 0xa5a0a0a0 er1 ; sub result:
833 test_gr_a5a5 2 ; Make sure other general regs not disturbed
841 set_grs_a5a5 ; Fill all general regs with a fixed pattern
843 ;; subx.l rs8,@eRd ; Subx to register indirect
850 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
855 test_h_gr32 long_dest er0 ; er0 still contains subress
856 test_h_gr32 0x50505 er1 ; er1 has the test load
858 test_gr_a5a5 2 ; Make sure other general regs not disturbed
865 ;; Now check the result of the sub to memory.
866 cmp.l #0xa5a0a0a0, @long_dest
871 subx_l_reg32_rdpostdec:
872 set_grs_a5a5 ; Fill all general regs with a fixed pattern
874 ;; subx.l rs8,@eRd- ; Subx to register post-decrement
881 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
886 test_h_gr32 long_dest-4 er0 ; er0 contains subress minus one
887 test_h_gr32 0x50505 er1 ; er1 contains the test load
889 test_gr_a5a5 2 ; Make sure other general regs not disturbed
896 ;; Now check the result of the sub to memory.
897 cmp.l #0xa5a0a0a0, @long_dest
903 set_grs_a5a5 ; Fill all general regs with a fixed pattern
905 ;; subx.l @eRs,rd8 ; Subx from reg indirect to reg
910 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
915 test_h_gr32 long_src er0 ; er0 still contains subress
916 test_h_gr32 0xa5a0a0a0 er1 ; er1 contains the sum
918 test_gr_a5a5 2 ; Make sure other general regs not disturbed
925 subx_l_rspostdec_reg32:
926 set_grs_a5a5 ; Fill all general regs with a fixed pattern
928 ;; subx.l @eRs-,rd8 ; Subx to register post-decrement
933 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
938 test_h_gr32 long_src-4 er0 ; er0 contains subress minus one
939 test_h_gr32 0xa5a0a0a0 er1 ; er1 contains the sum
941 test_gr_a5a5 2 ; Make sure other general regs not disturbed
949 set_grs_a5a5 ; Fill all general regs with a fixed pattern
951 ;; subx.l @eRs,rd8 ; Subx from reg indirect to reg
958 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
963 test_h_gr32 long_src er0 ; er0 still contains src subress
964 test_h_gr32 long_dest er1 ; er1 still contains dst subress
966 test_gr_a5a5 2 ; Make sure other general regs not disturbed
972 ;; Now check the result of the sub to memory.
973 cmp.l #0xa5a0a0a0, @long_dest
978 subx_l_rspostdec_rdpostdec:
979 set_grs_a5a5 ; Fill all general regs with a fixed pattern
981 ;; subx.l @eRs-,rd8 ; Subx to register post-decrement
988 test_carry_clear ; H=0 N=1 Z=0 V=0 C=0
993 test_h_gr32 long_src-4 er0 ; er0 contains src subress minus one
994 test_h_gr32 long_dest-4 er1 ; er1 contains dst subress minus one
996 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1002 ;; Now check the result of the sub to memory.
1003 cmp.l #0xa5a0a0a0, @long_dest