1 # Hitachi H8 testcase 'mov.w'
2 # mach(): h8300h h8300s h8sx
3 # as(h8300h): --defsym sim_cpu=1
4 # as(h8300s): --defsym sim_cpu=2
5 # as(h8sx): --defsym sim_cpu=3
6 # ld(h8300h): -m h8300helf
7 # ld(h8300s): -m h8300self
8 # ld(h8sx): -m h8300sxelf
10 .include "testutils.inc"
24 ;; Move word from immediate source
29 set_grs_a5a5 ; Fill all general regs with a fixed pattern
33 mov.w #0x3:3, r0 ; Immediate 3-bit operand
36 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
42 test_h_gr32 0xa5a50003 er0
44 test_gr_a5a5 1 ; Make sure other general regs not disturbed
54 set_grs_a5a5 ; Fill all general regs with a fixed pattern
58 mov.w #0x1234, r0 ; Immediate 16-bit operand
62 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
68 test_h_gr32 0xa5a51234 er0
70 test_gr_a5a5 1 ; Make sure other general regs not disturbed
80 set_grs_a5a5 ; Fill all general regs with a fixed pattern
83 ;; mov.w #xx:4, @aa:16
84 mov.w #0xf:4, @word_dst:16 ; 4-bit imm to 16-bit address-direct
88 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
94 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
95 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
96 test_gr_a5a5 2 ; to examine the destination memory).
103 ;; Now check the result of the move to memory.
104 cmp.w #0xf, @word_dst
108 mov.w #0, @word_dst ; zero it again for the next use.
111 set_grs_a5a5 ; Fill all general regs with a fixed pattern
114 ;; mov.w #xx:4, @aa:32
115 mov.w #0xf:4, @word_dst:32 ; 4-bit imm to 32-bit address-direct
119 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
125 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
126 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
127 test_gr_a5a5 2 ; to examine the destination memory).
134 ;; Now check the result of the move to memory.
135 cmp.w #0xf, @word_dst
139 mov.w #0, @word_dst ; zero it again for the next use.
141 mov_w_imm8_to_indirect:
142 set_grs_a5a5 ; Fill all general regs with a fixed pattern
147 mov.w #0xa5:8, @er1 ; Register indirect operand
151 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
157 test_gr_a5a5 0 ; Make sure other general regs not disturbed
158 test_h_gr32 word_dst, er1
166 ;; Now check the result of the move to memory.
167 cmp.w #0xa5, @word_dst
171 mov.w #0, @word_dst ; zero it again for the next use.
173 mov_w_imm8_to_postinc: ; post-increment from imm8 to mem
174 set_grs_a5a5 ; Fill all general regs with a fixed pattern
177 ;; mov.w #xx:8, @erd+
179 mov.w #0xa5:8, @er1+ ; Imm8, register post-incr operands.
183 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
189 test_gr_a5a5 0 ; Make sure other general regs not disturbed
190 test_h_gr32 word_dst+2, er1
198 ;; Now check the result of the move to memory.
199 cmp.w #0xa5, @word_dst
203 mov.w #0, @word_dst ; zero it again for the next use.
205 mov_w_imm8_to_postdec: ; post-decrement from imm8 to mem
206 set_grs_a5a5 ; Fill all general regs with a fixed pattern
209 ;; mov.w #xx:8, @erd-
211 mov.w #0xa5:8, @er1- ; Imm8, register post-decr operands.
215 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
221 test_gr_a5a5 0 ; Make sure other general regs not disturbed
222 test_h_gr32 word_dst-2, er1
230 ;; Now check the result of the move to memory.
231 cmp.w #0xa5, @word_dst
235 mov.w #0, @word_dst ; zero it again for the next use.
237 mov_w_imm8_to_preinc: ; pre-increment from register to mem
238 set_grs_a5a5 ; Fill all general regs with a fixed pattern
241 ;; mov.w #xx:8, @+erd
242 mov.l #word_dst-2, er1
243 mov.w #0xa5:8, @+er1 ; Imm8, register pre-incr operands
247 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
253 test_gr_a5a5 0 ; Make sure other general regs not disturbed
254 test_h_gr32 word_dst, er1
262 ;; Now check the result of the move to memory.
263 cmp.w #0xa5, @word_dst
267 mov.w #0, @word_dst ; zero it again for the next use.
269 mov_w_imm8_to_predec: ; pre-decrement from register to mem
270 set_grs_a5a5 ; Fill all general regs with a fixed pattern
273 ;; mov.w #xx:8, @-erd
274 mov.l #word_dst+2, er1
275 mov.w #0xa5:8, @-er1 ; Imm8, register pre-decr operands
279 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
285 test_gr_a5a5 0 ; Make sure other general regs not disturbed
286 test_h_gr32 word_dst, er1
294 ;; Now check the result of the move to memory.
295 cmp.w #0xa5, @word_dst
299 mov.w #0, @word_dst ; zero it again for the next use.
302 set_grs_a5a5 ; Fill all general regs with a fixed pattern
305 ;; mov.w #xx:8, @(dd:2, erd)
306 mov.l #word_dst-6, er1
307 mov.w #0xa5:8, @(6:2, er1) ; Imm8, reg plus 2-bit disp. operand
311 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
317 test_gr_a5a5 0 ; Make sure other general regs not disturbed
318 test_h_gr32 word_dst-6, er1
326 ;; Now check the result of the move to memory.
327 cmp.w #0xa5, @word_dst
331 mov.w #0, @word_dst ; zero it again for the next use.
333 mov_w_imm8_to_disp16:
334 set_grs_a5a5 ; Fill all general regs with a fixed pattern
337 ;; mov.w #xx:8, @(dd:16, erd)
338 mov.l #word_dst-4, er1
339 mov.w #0xa5:8, @(4:16, er1) ; Register plus 16-bit disp. operand
344 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
350 test_gr_a5a5 0 ; Make sure other general regs not disturbed
351 test_h_gr32 word_dst-4, er1
359 ;; Now check the result of the move to memory.
360 cmp.w #0xa5, @word_dst
364 mov.w #0, @word_dst ; zero it again for the next use.
366 mov_w_imm8_to_disp32:
367 set_grs_a5a5 ; Fill all general regs with a fixed pattern
370 ;; mov.w #xx:8, @(dd:32, erd)
371 mov.l #word_dst-8, er1
372 mov.w #0xa5:8, @(8:32, er1) ; Register plus 32-bit disp. operand
377 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
383 test_gr_a5a5 0 ; Make sure other general regs not disturbed
384 test_h_gr32 word_dst-8, er1
392 ;; Now check the result of the move to memory.
393 cmp.w #0xa5, @word_dst
397 mov.w #0, @word_dst ; zero it again for the next use.
400 set_grs_a5a5 ; Fill all general regs with a fixed pattern
403 ;; mov.w #xx:8, @aa:16
404 mov.w #0xa5:8, @word_dst:16 ; 16-bit address-direct operand
409 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
415 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
416 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
417 test_gr_a5a5 2 ; to examine the destination memory).
424 ;; Now check the result of the move to memory.
425 cmp.w #0xa5, @word_dst
429 mov.w #0, @word_dst ; zero it again for the next use.
432 set_grs_a5a5 ; Fill all general regs with a fixed pattern
435 ;; mov.w #xx:8, @aa:32
436 mov.w #0xa5:8, @word_dst:32 ; 32-bit address-direct operand
441 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
447 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
448 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
449 test_gr_a5a5 2 ; to examine the destination memory).
456 ;; Now check the result of the move to memory.
457 cmp.w #0xa5, @word_dst
461 mov.w #0, @word_dst ; zero it again for the next use.
463 mov_w_imm16_to_indirect:
464 set_grs_a5a5 ; Fill all general regs with a fixed pattern
467 ;; mov.w #xx:16, @erd
469 mov.w #0xdead:16, @er1 ; Register indirect operand
474 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
480 test_gr_a5a5 0 ; Make sure other general regs not disturbed
481 test_h_gr32 word_dst, er1
489 ;; Now check the result of the move to memory.
490 cmp.w #0xdead, @word_dst
494 mov.w #0, @word_dst ; zero it again for the next use.
496 mov_w_imm16_to_postinc: ; post-increment from imm16 to mem
497 set_grs_a5a5 ; Fill all general regs with a fixed pattern
500 ;; mov.w #xx:16, @erd+
502 mov.w #0xdead:16, @er1+ ; Imm16, register post-incr operands.
507 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
513 test_gr_a5a5 0 ; Make sure other general regs not disturbed
514 test_h_gr32 word_dst+2, er1
522 ;; Now check the result of the move to memory.
523 cmp.w #0xdead, @word_dst
527 mov.w #0, @word_dst ; zero it again for the next use.
529 mov_w_imm16_to_postdec: ; post-decrement from imm16 to mem
530 set_grs_a5a5 ; Fill all general regs with a fixed pattern
533 ;; mov.w #xx:16, @erd-
535 mov.w #0xdead:16, @er1- ; Imm16, register post-decr operands.
540 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
546 test_gr_a5a5 0 ; Make sure other general regs not disturbed
547 test_h_gr32 word_dst-2, er1
555 ;; Now check the result of the move to memory.
556 cmp.w #0xdead, @word_dst
560 mov.w #0, @word_dst ; zero it again for the next use.
562 mov_w_imm16_to_preinc: ; pre-increment from register to mem
563 set_grs_a5a5 ; Fill all general regs with a fixed pattern
566 ;; mov.w #xx:16, @+erd
567 mov.l #word_dst-2, er1
568 mov.w #0xdead:16, @+er1 ; Imm16, register pre-incr operands
573 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
579 test_gr_a5a5 0 ; Make sure other general regs not disturbed
580 test_h_gr32 word_dst, er1
588 ;; Now check the result of the move to memory.
589 cmp.w #0xdead, @word_dst
593 mov.w #0, @word_dst ; zero it again for the next use.
595 mov_w_imm16_to_predec: ; pre-decrement from register to mem
596 set_grs_a5a5 ; Fill all general regs with a fixed pattern
599 ;; mov.w #xx:16, @-erd
600 mov.l #word_dst+2, er1
601 mov.w #0xdead:16, @-er1 ; Imm16, register pre-decr operands
606 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
612 test_gr_a5a5 0 ; Make sure other general regs not disturbed
613 test_h_gr32 word_dst, er1
621 ;; Now check the result of the move to memory.
622 cmp.w #0xdead, @word_dst
626 mov.w #0, @word_dst ; zero it again for the next use.
628 mov_w_imm16_to_disp2:
629 set_grs_a5a5 ; Fill all general regs with a fixed pattern
632 ;; mov.w #xx:16, @(dd:2, erd)
633 mov.l #word_dst-6, er1
634 mov.w #0xdead:16, @(6:2, er1) ; Imm16, reg plus 2-bit disp. operand
639 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
645 test_gr_a5a5 0 ; Make sure other general regs not disturbed
646 test_h_gr32 word_dst-6, er1
654 ;; Now check the result of the move to memory.
655 cmp.w #0xdead, @word_dst
659 mov.w #0, @word_dst ; zero it again for the next use.
661 mov_w_imm16_to_disp16:
662 set_grs_a5a5 ; Fill all general regs with a fixed pattern
665 ;; mov.w #xx:16, @(dd:16, erd)
666 mov.l #word_dst-4, er1
667 mov.w #0xdead:16, @(4:16, er1) ; Register plus 16-bit disp. operand
673 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
679 test_gr_a5a5 0 ; Make sure other general regs not disturbed
680 test_h_gr32 word_dst-4, er1
688 ;; Now check the result of the move to memory.
689 cmp.w #0xdead, @word_dst
693 mov.w #0, @word_dst ; zero it again for the next use.
695 mov_w_imm16_to_disp32:
696 set_grs_a5a5 ; Fill all general regs with a fixed pattern
699 ;; mov.w #xx:16, @(dd:32, erd)
700 mov.l #word_dst-8, er1
701 mov.w #0xdead:16, @(8:32, er1) ; Register plus 32-bit disp. operand
707 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
713 test_gr_a5a5 0 ; Make sure other general regs not disturbed
714 test_h_gr32 word_dst-8, er1
722 ;; Now check the result of the move to memory.
723 cmp.w #0xdead, @word_dst
727 mov.w #0, @word_dst ; zero it again for the next use.
729 mov_w_imm16_to_abs16:
730 set_grs_a5a5 ; Fill all general regs with a fixed pattern
733 ;; mov.w #xx:16, @aa:16
734 mov.w #0xdead:16, @word_dst:16 ; 16-bit address-direct operand
740 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
746 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
747 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
748 test_gr_a5a5 2 ; to examine the destination memory).
755 ;; Now check the result of the move to memory.
756 cmp.w #0xdead, @word_dst
760 mov.w #0, @word_dst ; zero it again for the next use.
762 mov_w_imm16_to_abs32:
763 set_grs_a5a5 ; Fill all general regs with a fixed pattern
766 ;; mov.w #xx:16, @aa:32
767 mov.w #0xdead:16, @word_dst:32 ; 32-bit address-direct operand
773 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
779 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
780 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
781 test_gr_a5a5 2 ; to examine the destination memory).
788 ;; Now check the result of the move to memory.
789 cmp.w #0xdead, @word_dst
793 mov.w #0, @word_dst ; zero it again for the next use.
797 ;; Move word from register source
800 mov_w_reg16_to_reg16:
801 set_grs_a5a5 ; Fill all general regs with a fixed pattern
806 mov.w r1, r0 ; Register 16-bit operand
809 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
814 test_h_gr16 0x1234 r0
815 test_h_gr16 0x1234 r1 ; mov src unchanged
817 test_h_gr32 0xa5a51234 er0
818 test_h_gr32 0xa5a51234 er1 ; mov src unchanged
820 test_gr_a5a5 2 ; Make sure other general regs not disturbed
828 mov_w_reg16_to_indirect:
829 set_grs_a5a5 ; Fill all general regs with a fixed pattern
834 mov.w r0, @er1 ; Register indirect operand
837 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
843 test_gr_a5a5 0 ; Make sure other general regs not disturbed
844 test_h_gr32 word_dst, er1
852 ;; Now check the result of the move to memory.
860 mov.w r0, @word_dst ; zero it again for the next use.
862 .if (sim_cpu == h8sx)
863 mov_w_reg16_to_postinc: ; post-increment from register to mem
864 set_grs_a5a5 ; Fill all general regs with a fixed pattern
869 mov.w r0, @er1+ ; Register post-incr operand
873 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
879 test_gr_a5a5 0 ; Make sure other general regs not disturbed
880 test_h_gr32 word_dst+2, er1
888 ;; Now check the result of the move to memory.
893 mov.w #0, @word_dst ; zero it again for the next use.
895 mov_w_reg16_to_postdec: ; post-decrement from register to mem
896 set_grs_a5a5 ; Fill all general regs with a fixed pattern
901 mov.w r0, @er1- ; Register post-decr operand
905 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
911 test_gr_a5a5 0 ; Make sure other general regs not disturbed
912 test_h_gr32 word_dst-2, er1
920 ;; Now check the result of the move to memory.
925 mov.w #0, @word_dst ; zero it again for the next use.
927 mov_w_reg16_to_preinc: ; pre-increment from register to mem
928 set_grs_a5a5 ; Fill all general regs with a fixed pattern
932 mov.l #word_dst-2, er1
933 mov.w r0, @+er1 ; Register pre-incr operand
937 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
943 test_gr_a5a5 0 ; Make sure other general regs not disturbed
944 test_h_gr32 word_dst, er1
952 ;; Now check the result of the move to memory.
957 mov.w #0, @word_dst ; zero it again for the next use.
960 mov_w_reg16_to_predec: ; pre-decrement from register to mem
961 set_grs_a5a5 ; Fill all general regs with a fixed pattern
965 mov.l #word_dst+2, er1
966 mov.w r0, @-er1 ; Register pre-decr operand
969 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
975 test_gr_a5a5 0 ; Make sure other general regs not disturbed
976 test_h_gr32 word_dst, er1
984 ;; Now check the result of the move to memory.
992 mov.w r0, @word_dst ; zero it again for the next use.
994 .if (sim_cpu == h8sx)
995 mov_w_reg16_to_disp2:
996 set_grs_a5a5 ; Fill all general regs with a fixed pattern
999 ;; mov.w ers, @(dd:2, erd)
1000 mov.l #word_dst-6, er1
1001 mov.w r0, @(6:2, er1) ; Register plus 2-bit disp. operand
1005 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1011 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1012 test_h_gr32 word_dst-6, er1
1020 ;; Now check the result of the move to memory.
1025 mov.w #0, @word_dst ; zero it again for the next use.
1028 mov_w_reg16_to_disp16:
1029 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1032 ;; mov.w ers, @(dd:16, erd)
1033 mov.l #word_dst-4, er1
1034 mov.w r0, @(4:16, er1) ; Register plus 16-bit disp. operand
1038 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1044 test_h_gr32 word_dst-4, er1
1045 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1053 ;; Now check the result of the move to memory.
1061 mov.w r0, @word_dst ; zero it again for the next use.
1063 mov_w_reg16_to_disp32:
1064 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1067 ;; mov.w ers, @(dd:32, erd)
1068 mov.l #word_dst-8, er1
1069 mov.w r0, @(8:32, er1) ; Register plus 32-bit disp. operand
1074 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1080 test_h_gr32 word_dst-8, er1
1081 test_gr_a5a5 0 ; Make sure other general regs not disturbed
1089 ;; Now check the result of the move to memory.
1097 mov.w r0, @word_dst ; zero it again for the next use.
1099 mov_w_reg16_to_abs16:
1100 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1103 ;; mov.w ers, @aa:16
1104 mov.w r0, @word_dst:16 ; 16-bit address-direct operand
1108 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1114 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
1115 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
1116 test_gr_a5a5 2 ; to examine the destination memory).
1123 ;; Now check the result of the move to memory.
1131 mov.w r0, @word_dst ; zero it again for the next use.
1133 mov_w_reg16_to_abs32:
1134 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1137 ;; mov.w ers, @aa:32
1138 mov.w r0, @word_dst:32 ; 32-bit address-direct operand
1142 ;; test ccr ; H=0 N=1 Z=0 V=0 C=0
1148 test_gr_a5a5 0 ; Make sure _ALL_ general regs not disturbed
1149 test_gr_a5a5 1 ; (first, because on h8/300 we must use one
1150 test_gr_a5a5 2 ; to examine the destination memory).
1157 ;; Now check the result of the move to memory.
1165 mov.w r0, @word_dst ; zero it again for the next use.
1168 ;; Move word to register destination.
1171 mov_w_indirect_to_reg16:
1172 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1176 mov.l #word_src, er1
1177 mov.w @er1, r0 ; Register indirect operand
1180 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1186 test_h_gr32 0xa5a57777 er0
1188 test_h_gr32 word_src, er1
1189 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1196 mov_w_postinc_to_reg16: ; post-increment from mem to register
1197 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1202 mov.l #word_src, er1
1203 mov.w @er1+, r0 ; Register post-incr operand
1206 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1212 test_h_gr32 0xa5a57777 er0
1214 test_h_gr32 word_src+2, er1
1215 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1222 .if (sim_cpu == h8sx)
1223 mov_w_postdec_to_reg16: ; post-decrement from mem to register
1224 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1229 mov.l #word_src, er1
1230 mov.w @er1-, r0 ; Register post-decr operand
1234 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1240 test_h_gr32 0xa5a57777 er0
1242 test_h_gr32 word_src-2, er1
1243 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1250 mov_w_preinc_to_reg16: ; pre-increment from mem to register
1251 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1256 mov.l #word_src-2, er1
1257 mov.w @+er1, r0 ; Register pre-incr operand
1261 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1267 test_h_gr32 0xa5a57777 er0
1269 test_h_gr32 word_src, er1
1270 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1277 mov_w_predec_to_reg16: ; pre-decrement from mem to register
1278 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1283 mov.l #word_src+2, er1
1284 mov.w @-er1, r0 ; Register pre-decr operand
1288 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1294 test_h_gr32 0xa5a57777 er0
1296 test_h_gr32 word_src, er1
1297 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1305 mov_w_disp2_to_reg16:
1306 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1309 ;; mov.w @(dd:2, ers), rd
1310 mov.l #word_src-2, er1
1311 mov.w @(2:2, er1), r0 ; Register plus 2-bit disp. operand
1315 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1321 test_h_gr32 0xa5a57777 er0 ; mov result: a5a5 | 7777
1323 test_h_gr32 word_src-2, er1
1324 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1332 mov_w_disp16_to_reg16:
1333 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1336 ;; mov.w @(dd:16, ers), rd
1337 mov.l #word_src+0x1234, er1
1338 mov.w @(-0x1234:16, er1), r0 ; Register plus 16-bit disp. operand
1342 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1348 test_h_gr32 0xa5a57777 er0 ; mov result: a5a5 | 7777
1350 test_h_gr32 word_src+0x1234, er1
1351 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1358 mov_w_disp32_to_reg16:
1359 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1362 ;; mov.w @(dd:32, ers), rd
1363 mov.l #word_src+65536, er1
1364 mov.w @(-65536:32, er1), r0 ; Register plus 32-bit disp. operand
1369 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1375 test_h_gr32 0xa5a57777 er0 ; mov result: a5a5 | 7777
1377 test_h_gr32 word_src+65536, er1
1378 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1385 mov_w_abs16_to_reg16:
1386 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1390 mov.w @word_src:16, r0 ; 16-bit address-direct operand
1394 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1400 test_h_gr32 0xa5a57777 er0
1402 test_gr_a5a5 1 ; Make sure other general regs not disturbed
1410 mov_w_abs32_to_reg16:
1411 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1415 mov.w @word_src:32, r0 ; 32-bit address-direct operand
1419 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1425 test_h_gr32 0xa5a57777 er0
1427 test_gr_a5a5 1 ; Make sure other general regs not disturbed
1435 .if (sim_cpu == h8sx)
1438 ;; Move word from memory to memory
1441 mov_w_indirect_to_indirect: ; reg indirect, memory to memory
1442 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1447 mov.l #word_src, er1
1448 mov.l #word_dst, er0
1453 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1459 ;; Verify the affected registers.
1461 test_h_gr32 word_dst er0
1462 test_h_gr32 word_src er1
1463 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1470 ;; Now check the result of the move to memory.
1471 cmp.w @word_src, @word_dst
1475 ;; Now clear the destination location, and verify that.
1477 cmp.w @word_src, @word_dst
1480 .Lnext56: ; OK, pass on.
1482 mov_w_postinc_to_postinc: ; reg post-increment, memory to memory
1483 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1486 ;; mov.w @ers+, @erd+
1488 mov.l #word_src, er1
1489 mov.l #word_dst, er0
1494 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1500 ;; Verify the affected registers.
1502 test_h_gr32 word_dst+2 er0
1503 test_h_gr32 word_src+2 er1
1504 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1511 ;; Now check the result of the move to memory.
1512 cmp.w @word_src, @word_dst
1516 ;; Now clear the destination location, and verify that.
1518 cmp.w @word_src, @word_dst
1521 .Lnext66: ; OK, pass on.
1523 mov_w_postdec_to_postdec: ; reg post-decrement, memory to memory
1524 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1527 ;; mov.w @ers-, @erd-
1529 mov.l #word_src, er1
1530 mov.l #word_dst, er0
1535 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1541 ;; Verify the affected registers.
1543 test_h_gr32 word_dst-2 er0
1544 test_h_gr32 word_src-2 er1
1545 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1552 ;; Now check the result of the move to memory.
1553 cmp.w @word_src, @word_dst
1557 ;; Now clear the destination location, and verify that.
1559 cmp.w @word_src, @word_dst
1562 .Lnext76: ; OK, pass on.
1564 mov_w_preinc_to_preinc: ; reg pre-increment, memory to memory
1565 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1568 ;; mov.w @+ers, @+erd
1570 mov.l #word_src-2, er1
1571 mov.l #word_dst-2, er0
1576 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1582 ;; Verify the affected registers.
1584 test_h_gr32 word_dst er0
1585 test_h_gr32 word_src er1
1586 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1593 ;; Now check the result of the move to memory.
1594 cmp.w @word_src, @word_dst
1598 ;; Now clear the destination location, and verify that.
1600 cmp.w @word_src, @word_dst
1603 .Lnext86: ; OK, pass on.
1605 mov_w_predec_to_predec: ; reg pre-decrement, memory to memory
1606 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1609 ;; mov.w @-ers, @-erd
1611 mov.l #word_src+2, er1
1612 mov.l #word_dst+2, er0
1617 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1623 ;; Verify the affected registers.
1625 test_h_gr32 word_dst er0
1626 test_h_gr32 word_src er1
1627 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1634 ;; Now check the result of the move to memory.
1635 cmp.w @word_src, @word_dst
1639 ;; Now clear the destination location, and verify that.
1641 cmp.w @word_src, @word_dst
1644 .Lnext96: ; OK, pass on.
1646 mov_w_disp2_to_disp2: ; reg 2-bit disp, memory to memory
1647 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1650 ;; mov.w @(dd:2, ers), @(dd:2, erd)
1652 mov.l #word_src-2, er1
1653 mov.l #word_dst-4, er0
1654 mov.w @(2:2, er1), @(4:2, er0)
1658 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1664 ;; Verify the affected registers.
1666 test_h_gr32 word_dst-4 er0
1667 test_h_gr32 word_src-2 er1
1668 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1675 ;; Now check the result of the move to memory.
1676 cmp.w @word_src, @word_dst
1680 ;; Now clear the destination location, and verify that.
1682 cmp.w @word_src, @word_dst
1685 .Lnext106: ; OK, pass on.
1687 mov_w_disp16_to_disp16: ; reg 16-bit disp, memory to memory
1688 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1691 ;; mov.w @(dd:16, ers), @(dd:16, erd)
1693 mov.l #word_src-1, er1
1694 mov.l #word_dst-2, er0
1695 mov.w @(1:16, er1), @(2:16, er0)
1701 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1707 ;; Verify the affected registers.
1709 test_h_gr32 word_dst-2 er0
1710 test_h_gr32 word_src-1 er1
1711 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1718 ;; Now check the result of the move to memory.
1719 cmp.w @word_src, @word_dst
1723 ;; Now clear the destination location, and verify that.
1725 cmp.w @word_src, @word_dst
1728 .Lnext116: ; OK, pass on.
1730 mov_w_disp32_to_disp32: ; reg 32-bit disp, memory to memory
1731 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1734 ;; mov.w @(dd:32, ers), @(dd:32, erd)
1736 mov.l #word_src-1, er1
1737 mov.l #word_dst-2, er0
1738 mov.w @(1:32, er1), @(2:32, er0)
1744 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1750 ;; Verify the affected registers.
1752 test_h_gr32 word_dst-2 er0
1753 test_h_gr32 word_src-1 er1
1754 test_gr_a5a5 2 ; Make sure other general regs not disturbed
1761 ;; Now check the result of the move to memory.
1762 cmp.w @word_src, @word_dst
1766 ;; Now clear the destination location, and verify that.
1768 cmp.w @word_src, @word_dst
1771 .Lnext126: ; OK, pass on.
1773 mov_w_abs16_to_abs16: ; 16-bit absolute addr, memory to memory
1774 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1777 ;; mov.w @aa:16, @aa:16
1779 mov.w @word_src:16, @word_dst:16
1785 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1792 test_gr_a5a5 0 ; Make sure *NO* general registers are changed
1801 ;; Now check the result of the move to memory.
1802 cmp.w @word_src, @word_dst
1806 ;; Now clear the destination location, and verify that.
1808 cmp.w @word_src, @word_dst
1811 .Lnext136: ; OK, pass on.
1813 mov_w_abs32_to_abs32: ; 32-bit absolute addr, memory to memory
1814 set_grs_a5a5 ; Fill all general regs with a fixed pattern
1817 ;; mov.w @aa:32, @aa:32
1819 mov.w @word_src:32, @word_dst:32
1825 ;; test ccr ; H=0 N=0 Z=0 V=0 C=0
1831 test_gr_a5a5 0 ; Make sure *NO* general registers are changed
1840 ;; Now check the result of the move to memory.
1841 cmp.w @word_src, @word_dst
1845 ;; Now clear the destination location, and verify that.
1847 cmp.w @word_src, @word_dst
1850 .Lnext146: ; OK, pass on.