include/
[external/binutils.git] / sim / testsuite / sim / frv / fcbuglr.cgs
1 # frv testcase for fcbuglr $FCCi,$ccond,$hint
2 # mach: all
3
4         .include "testutils.inc"
5
6         start
7
8         .global fcbuglr
9 fcbuglr:
10         ; ccond is true
11         set_spr_immed   128,lcr
12         set_spr_addr    bad,lr
13         set_fcc         0x0 0
14         fcbuglr         fcc0,0,0
15
16         set_spr_addr    ok2,lr
17         set_fcc         0x1 1
18         fcbuglr         fcc1,0,1
19         fail
20 ok2:
21         set_spr_addr    ok3,lr
22         set_fcc         0x2 2
23         fcbuglr         fcc2,0,2
24         fail
25 ok3:
26         set_spr_addr    ok4,lr
27         set_fcc         0x3 3
28         fcbuglr         fcc3,0,3
29         fail
30 ok4:
31         set_spr_addr    bad,lr
32         set_fcc         0x4 0
33         fcbuglr         fcc0,0,0
34
35         set_spr_addr    ok6,lr
36         set_fcc         0x5 1
37         fcbuglr         fcc1,0,1
38         fail
39 ok6:
40         set_spr_addr    ok7,lr
41         set_fcc         0x6 2
42         fcbuglr         fcc2,0,2
43         fail
44 ok7:
45         set_spr_addr    ok8,lr
46         set_fcc         0x7 3
47         fcbuglr         fcc3,0,3
48         fail
49 ok8:
50         set_spr_addr    bad,lr
51         set_fcc         0x8 0
52         fcbuglr         fcc0,0,0
53
54         set_spr_addr    oka,lr
55         set_fcc         0x9 1
56         fcbuglr         fcc1,0,1
57         fail
58 oka:
59         set_spr_addr    okb,lr
60         set_fcc         0xa 2
61         fcbuglr         fcc2,0,2
62         fail
63 okb:
64         set_spr_addr    okc,lr
65         set_fcc         0xb 3
66         fcbuglr         fcc3,0,3
67         fail
68 okc:
69         set_spr_addr    bad,lr
70         set_fcc         0xc 0
71         fcbuglr         fcc0,0,0
72
73         set_spr_addr    oke,lr
74         set_fcc         0xd 1
75         fcbuglr         fcc1,0,1
76         fail
77 oke:
78         set_spr_addr    okf,lr
79         set_fcc         0xe 2
80         fcbuglr         fcc2,0,2
81         fail
82 okf:
83         set_spr_addr    okg,lr
84         set_fcc         0xf 3
85         fcbuglr         fcc3,0,3
86         fail
87 okg:
88
89         ; ccond is true
90         set_spr_immed   1,lcr
91         set_spr_addr    bad,lr
92         set_fcc         0x0 0
93         fcbuglr         fcc0,1,0
94
95         set_spr_immed   1,lcr
96         set_spr_addr    oki,lr
97         set_fcc         0x1 1
98         fcbuglr         fcc1,1,1
99         fail
100 oki:
101         set_spr_immed   1,lcr
102         set_spr_addr    okj,lr
103         set_fcc         0x2 2
104         fcbuglr         fcc2,1,2
105         fail
106 okj:
107         set_spr_immed   1,lcr
108         set_spr_addr    okk,lr
109         set_fcc         0x3 3
110         fcbuglr         fcc3,1,3
111         fail
112 okk:
113         set_spr_immed   1,lcr
114         set_spr_addr    bad,lr
115         set_fcc         0x4 0
116         fcbuglr         fcc0,1,0
117
118         set_spr_immed   1,lcr
119         set_spr_addr    okm,lr
120         set_fcc         0x5 1
121         fcbuglr         fcc1,1,1
122         fail
123 okm:
124         set_spr_immed   1,lcr
125         set_spr_addr    okn,lr
126         set_fcc         0x6 2
127         fcbuglr         fcc2,1,2
128         fail
129 okn:
130         set_spr_immed   1,lcr
131         set_spr_addr    oko,lr
132         set_fcc         0x7 3
133         fcbuglr         fcc3,1,3
134         fail
135 oko:
136         set_spr_immed   1,lcr
137         set_spr_addr    bad,lr
138         set_fcc         0x8 0
139         fcbuglr         fcc0,1,0
140
141         set_spr_immed   1,lcr
142         set_spr_addr    okq,lr
143         set_fcc         0x9 1
144         fcbuglr         fcc1,1,1
145         fail
146 okq:
147         set_spr_immed   1,lcr
148         set_spr_addr    okr,lr
149         set_fcc         0xa 2
150         fcbuglr         fcc2,1,2
151         fail
152 okr:
153         set_spr_immed   1,lcr
154         set_spr_addr    oks,lr
155         set_fcc         0xb 3
156         fcbuglr         fcc3,1,3
157         fail
158 oks:
159         set_spr_immed   1,lcr
160         set_spr_addr    bad,lr
161         set_fcc         0xc 0
162         fcbuglr         fcc0,1,0
163
164         set_spr_immed   1,lcr
165         set_spr_addr    oku,lr
166         set_fcc         0xd 1
167         fcbuglr         fcc1,1,1
168         fail
169 oku:
170         set_spr_immed   1,lcr
171         set_spr_addr    okv,lr
172         set_fcc         0xe 2
173         fcbuglr         fcc2,1,2
174         fail
175 okv:
176         set_spr_immed   1,lcr
177         set_spr_addr    okw,lr
178         set_fcc         0xf 3
179         fcbuglr         fcc3,1,3
180         fail
181 okw:
182         ; ccond is false
183         set_spr_immed   128,lcr
184
185         set_fcc         0x0 0
186         fcbuglr fcc0,1,0
187         set_fcc         0x1 1
188         fcbuglr fcc1,1,1
189         set_fcc         0x2 2
190         fcbuglr fcc2,1,2
191         set_fcc         0x3 3
192         fcbuglr fcc3,1,3
193         set_fcc         0x4 0
194         fcbuglr fcc0,1,0
195         set_fcc         0x5 1
196         fcbuglr fcc1,1,1
197         set_fcc         0x6 2
198         fcbuglr fcc2,1,2
199         set_fcc         0x7 3
200         fcbuglr fcc3,1,3
201         set_fcc         0x8 0
202         fcbuglr fcc0,1,0
203         set_fcc         0x9 1
204         fcbuglr fcc1,1,1
205         set_fcc         0xa 2
206         fcbuglr fcc2,1,2
207         set_fcc         0xb 3
208         fcbuglr fcc3,1,3
209         set_fcc         0xc 0
210         fcbuglr fcc0,1,0
211         set_fcc         0xd 1
212         fcbuglr fcc1,1,1
213         set_fcc         0xe 2
214         fcbuglr fcc2,1,2
215         set_fcc         0xf 3
216         fcbuglr fcc3,1,3
217
218         ; ccond is false
219         set_spr_immed   1,lcr
220         set_fcc         0x0 0
221         fcbuglr fcc0,0,0
222         set_spr_immed   1,lcr
223         set_fcc         0x1 1
224         fcbuglr fcc1,0,1
225         set_spr_immed   1,lcr
226         set_fcc         0x2 2
227         fcbuglr fcc2,0,2
228         set_spr_immed   1,lcr
229         set_fcc         0x3 3
230         fcbuglr fcc3,0,3
231         set_spr_immed   1,lcr
232         set_fcc         0x4 0
233         fcbuglr fcc0,0,0
234         set_spr_immed   1,lcr
235         set_fcc         0x5 1
236         fcbuglr fcc1,0,1
237         set_spr_immed   1,lcr
238         set_fcc         0x6 2
239         fcbuglr fcc2,0,2
240         set_spr_immed   1,lcr
241         set_fcc         0x7 3
242         fcbuglr fcc3,0,3
243         set_spr_immed   1,lcr
244         set_fcc         0x8 0
245         fcbuglr fcc0,0,0
246         set_spr_immed   1,lcr
247         set_fcc         0x9 1
248         fcbuglr fcc1,0,1
249         set_spr_immed   1,lcr
250         set_fcc         0xa 2
251         fcbuglr fcc2,0,2
252         set_spr_immed   1,lcr
253         set_fcc         0xb 3
254         fcbuglr fcc3,0,3
255         set_spr_immed   1,lcr
256         set_fcc         0xc 0
257         fcbuglr fcc0,0,0
258         set_spr_immed   1,lcr
259         set_fcc         0xd 1
260         fcbuglr fcc1,0,1
261         set_spr_immed   1,lcr
262         set_fcc         0xe 2
263         fcbuglr fcc2,0,2
264         set_spr_immed   1,lcr
265         set_fcc         0xf 3
266         fcbuglr fcc3,0,3
267
268         pass
269 bad:
270         fail