1 //Original:/proj/frio/dv/testcases/seq/se_ssstep_dagprotviol/se_ssstep_dagprotviol.dsp
2 // Description: prioritize DAG Protection Violation and Supervisor Single Step
4 # sim: --environment operating
7 .include "testutils.inc"
11 // Constants and Defines
15 include(selfcheck.inc)
21 #define STACKSIZE 0x10 // change for how much stack you need
24 #define ITABLE 0xF0000000
27 GEN_INT_INIT(ITABLE) // set location for interrupt table
30 // Reset/Bootstrap Code
31 // (Here we should set the processor operating modes, initialize registers,
36 INIT_R_REGS(0); // initialize general purpose regs
38 INIT_P_REGS(0); // initialize the pointers
40 INIT_I_REGS(0); // initialize the dsp address regs
45 CLI R1; // inhibit events during MMR writes
47 LD32_LABEL(sp, USTACK); // setup the user stack pointer
50 LD32_LABEL(sp, KSTACK); // setup the kernel stack pointer
51 FP = SP; // and frame pointer
53 LD32(p0, EVT0); // Setup Event Vectors and Handlers
55 P0 += 4; // EVT0 not used (Emulation)
57 P0 += 4; // EVT1 not used (Reset)
59 LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2)
62 LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3)
65 P0 += 4; // EVT4 not used (Global Interrupt Enable)
67 LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
70 LD32_LABEL(r0, THANDLE); // Timer Handler (Int6)
73 LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
76 LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
79 LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
82 LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
85 LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
88 LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
91 LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
94 LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
97 LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
100 LD32(p0, EVT_OVERRIDE);
104 R1 = -1; // Change this to mask interrupts (*)
105 CSYNC; // wait for MMR writes to finish
106 STI R1; // sync and reenable events (implicit write to IMASK)
112 LT0 = r0; // set loop counters to something deterministic
119 ASTAT = r0; // reset other internal regs
120 RETS = r0; // prevent X's breaking LINK instruction
123 SYSCFG = r0; // enable ssstep
126 // The following code sets up the test for running in USER mode
128 LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
129 // ReturnFromInterrupt (RTI)
130 RETI = r0; // We need to load the return address
132 // Comment the following line for a USER Mode test
134 // JUMP STARTSUP; // jump to code start for SUPERVISOR mode
139 LD32_LABEL(p1, BEGIN);
143 CLI R1; // inhibit events during write to MMR
144 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start
145 CSYNC; // wait for it
146 STI R1; // reenable events with proper imask
148 RAISE 15; // after we RTI, INT 15 should be taken
158 LINK 0; // change for how much stack frame space you need.
162 //*********************************************************************
166 // COMMENT the following line for USER MODE tests
167 // [--sp] = RETI; // enable interrupts in supervisor mode
169 // **** YOUR CODE GOES HERE ****
171 // PUT YOUR TEST HERE!
177 R7 = [ P0 ]; // cause DAG PROTECTION VIOLATION (p0 is an MMR)
181 EXCPT 2; // turn off SSSTEP
183 CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC);
185 CHECKREG(r5, 7); // check the flag (# SSSTEP)
186 CHECKREG(r4, 1); // check the flag (# illegal opcodes)
189 dbg_pass; // End the test
191 //*********************************************************************
194 // Handlers for Events
197 NHANDLE: // NMI Handler 2
200 XHANDLE: // Exception Handler 3
202 [ -- SP ] = ASTAT; // save what we damage
203 [ -- SP ] = ( R7:6 );
206 R7 >>= 26; // only want EXCAUSE
207 R6 = 0x02; // EXCAUSE 0x02 means EXCPT 2
211 R6 = 0x10; // EXCAUSE 0x10 means Single Step
213 IF CC JUMP SSSTEP (BP);
215 R6 = 0x23; // EXCAUSE 0x23 means DAG Protection Violation
217 IF CC JUMP DAGPROTVIOL (BP);
219 JUMP.S OUT; // if the EXCAUSE is wrong the test will infinite loop
221 EXCPT2: // turn off SSSTEP
227 R5 += 1; // increment a counter
233 RETX = R7; // skip offending instruction
235 R4 += 1; // increment another counter
238 ( R7:6 ) = [ SP ++ ];
242 HWHANDLE: // HW Error Handler 5
245 THANDLE: // Timer Handler 6
248 I7HANDLE: // IVG 7 Handler
251 I8HANDLE: // IVG 8 Handler
254 I9HANDLE: // IVG 9 Handler
257 I10HANDLE: // IVG 10 Handler
260 I11HANDLE: // IVG 11 Handler
263 I12HANDLE: // IVG 12 Handler
266 I13HANDLE: // IVG 13 Handler
269 I14HANDLE: // IVG 14 Handler
272 I15HANDLE: // IVG 15 Handler
276 // padding for the icache
278 EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0;
284 .section MEM_DATA_ADDR_1 //.data 0xE0000000,"aw"
291 // Stack Segments (Both Kernel and User)