1 //Original:/proj/frio/dv/testcases/debug/dbg_tr_umode/dbg_tr_umode.dsp
2 // Description: Verify the basic functionality of TBUFPWR and TBUFEN in
5 # sim: --environment operating
8 .include "testutils.inc"
13 include(selfcheck.inc)
16 #define ITABLE 0xF0000000
19 #define STACKSIZE 0x20
22 // This test embeds .text offsets, so pad our test so it lines up.
28 INIT_R_REGS(0); // Initialize Dregs
29 INIT_P_REGS(0); // Initialize Pregs
31 CHECK_INIT(p5, 0x00BFFFFC);
33 LD32(p0, EVT0); // Setup Event Vectors and Handlers
35 LD32_LABEL(r0, EHANDLE); // Emulation Handler (Int0)
38 LD32_LABEL(r0, RHANDLE); // Reset Handler (Int1)
41 LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2)
44 LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3)
47 [ P0 ++ ] = R0; // IVT4 not used
49 LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
52 LD32_LABEL(r0, THANDLE); // Timer Handler (Int6)
55 LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
58 LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
61 LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
64 LD32_LABEL(r0, I10HANDLE); // IVG10 Handler
67 LD32_LABEL(r0, I11HANDLE); // IVG11 Handler
70 LD32_LABEL(r0, I12HANDLE); // IVG12 Handler
73 LD32_LABEL(r0, I13HANDLE); // IVG13 Handler
76 LD32_LABEL(r0, I14HANDLE); // IVG14 Handler
79 LD32_LABEL(r0, I15HANDLE); // IVG15 Handler
82 LD32(p0, EVT_OVERRIDE);
85 R0 = -1; // Change this to mask interrupts (*)
88 LD32_LABEL(p1, START);
91 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start
93 LD32_LABEL(r7, DUMMY);
95 RAISE 15; // after we RTI, INT 15 should be taken
97 NOP; // Workaround for Bug 217
110 WR_MMR(TBUFCTL, 0x00000001, p0, r0); // Turn ON trace Buffer
111 WR_MMR(TBUFCTL, 0x00000003, p0, r0); // Turn ON trace Buffer
121 // The following code sets up the test for running in USER mode
123 LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
124 // ReturnFromInterrupt (RTI)
125 RETI = r0; // We need to load the return address
130 LD32_LABEL(sp, USTACK); // setup the stack pointer
131 FP = SP; // set frame pointer
134 //*********************************************************************
148 label2: R5.H = 0x7777;
158 label1: R4.H = 0x5555;
181 // Checks the contents of the Trace Buffer
185 CHECKREG(r2, 0x00000006);
186 CHECKREG(r1, 0x00000416);
187 CHECKREG(r0, 0x000002aa);
188 CHECKREG(r3, 0x0000029a);
189 CHECKREG(r4, 0x00000262);
190 CHECKREG(r5, 0x00000004);
191 CHECKREG(r6, 0x0000025a);
192 CHECKREG(r7, 0x00000288);
198 CHECKREG(r2, 0x00000005);
199 CHECKREG(r1, 0x00000416);
200 CHECKREG(r0, 0x00000304);
201 CHECKREG(r3, 0x000002ac);
202 CHECKREG(r4, 0x00000470);
203 CHECKREG(r5, 0x00000003);
204 CHECKREG(r6, 0x00000276);
205 CHECKREG(r7, 0x0000024a);
211 CHECKREG(r2, 0x00000004);
212 CHECKREG(r1, 0x00000416);
213 CHECKREG(r0, 0x0000035e);
214 CHECKREG(r3, 0x00000306);
215 CHECKREG(r4, 0x00000470);
216 CHECKREG(r5, 0x00000002);
217 CHECKREG(r6, 0x00000244);
218 CHECKREG(r7, 0x00000242);
223 CHECKREG(r2, 0x00000003);
224 CHECKREG(r1, 0x00000416);
225 CHECKREG(r0, 0x000003b0);
226 CHECKREG(r3, 0x00000360);
227 CHECKREG(r4, 0x00000470);
228 CHECKREG(r5, 0x00000001);
229 CHECKREG(r6, 0x00000238);
230 CHECKREG(r7, 0x00000236);
239 dbg_pass; // Call Endtest Macro
243 //*********************************************************************
245 // Handlers for Events
248 EHANDLE: // Emulation Handler 0
251 RHANDLE: // Reset Handler 1
254 NHANDLE: // NMI Handler 2
257 XHANDLE: // Exception Handler 3
260 RD_MMR(TBUFSTAT, p0, r2);
261 RD_MMR(TBUF, p0, r1);
262 RD_MMR(TBUF, p0, r0);
263 RD_MMR(TBUF, p0, r3);
264 RD_MMR(TBUF, p0, r4);
265 RD_MMR(TBUFSTAT, p0, r5);
266 RD_MMR(TBUF, p0, r6);
267 RD_MMR(TBUF, p0, r7);
276 HWHANDLE: // HW Error Handler 5
279 THANDLE: // Timer Handler 6
282 I7HANDLE: // IVG 7 Handler
285 I8HANDLE: // IVG 8 Handler
288 I9HANDLE: // IVG 9 Handler
291 I10HANDLE: // IVG 10 Handler
294 I11HANDLE: // IVG 11 Handler
297 I12HANDLE: // IVG 12 Handler
300 I13HANDLE: // IVG 13 Handler
303 I14HANDLE: // IVG 14 Handler
306 I15HANDLE: // IVG 15 Handler