Add support to GDB for the Renesas rl78 architecture.
[external/binutils.git] / sim / testsuite / sim / bfin / cec-ifetch.S
1 # Blackfin testcase for making sure RETX is the excepting insn
2 # and not the target of the insn (like indirect jumps)
3 # mach: bfin
4 # sim: --environment operating
5
6 #include "test.h"
7         .include "testutils.inc"
8
9         start
10
11         # Set our handler
12         imm32 P5, EVT3;
13         loadsym R1, _evtx;
14         [P5] = R1;
15
16         # Lower ourselves below EVT3
17         loadsym R4, _i_rts;
18         RETI = R4;
19         RAISE 12;
20         RTI;
21
22 _i_rts:
23         # Check unaligned RETS
24         loadsym R6, 1f;
25         loadsym R5, 2f;
26         R0 = 1;
27         RETS = R0;
28 1:      RTS;
29 2:
30
31 _i_jump:
32         # Check unaligned indirect jump
33         loadsym R6, 1f;
34         loadsym R5, 2f;
35         P0 = 1;
36 1:      JUMP (P0);
37 2:
38
39 _i_jump_off:
40         # Check unaligned indirect jump (pc-relative)
41         loadsym R6, 1f;
42         loadsym R5, 2f;
43         P0 = 1;
44 1:      JUMP (PC + P0);
45 2:
46
47 _i_call:
48         # Check unaligned indirect call
49         loadsym R6, 1f;
50         loadsym R5, 2f;
51         P0 = 1;
52 1:      CALL (P0);
53 2:
54
55 _pass_lvl:
56         dbg_pass
57
58 _evtx:
59         # Make sure R6 matches RETX
60         R7 = RETX;
61         CC = R6 == R7;
62         if !CC jump _fail_lvl;
63
64         # Move on to next test
65         RETX = R5;
66         RTX;
67
68 _fail_lvl:
69         dbg_fail