sim/testsuite/sim/bfin/c_regmv_imlb_dep_stall.s

   1 //Original:/proj/frio/dv/testcases/core/c_regmv_imlb_dep_stall/c_regmv_imlb_dep_stall.dsp
   2 // Spec Reference: regmv imlb-depepency  stall
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8 // R-reg to I,M-reg to R-reg: stall
   9         imm32 r0, 0x00001110;
  10         imm32 r1, 0x00213330;
  11         imm32 r2, 0x04015550;
  12         imm32 r3, 0x06607770;
  13         imm32 r4, 0x08010990;
  14         imm32 r5, 0x0a01b0b0;
  15         imm32 r6, 0x0c01dd00;
  16         imm32 r7, 0x0e01f0f0;
  17         I0 = R0;
  18         R7 = I0;
  19         I1 = R1;
  20         R0 = I1;
  21         I2 = R2;
  22         R1 = I2;
  23         I3 = R3;
  24         R2 = I3;
  25         M0 = R4;
  26         R3 = M0;
  27         M1 = R5;
  28         R4 = M1;
  29         M2 = R6;
  30         R5 = M2;
  31         M3 = R7;
  32         R6 = M3;
  33
  34         CHECKREG r0, 0x00213330;
  35         CHECKREG r1, 0x04015550;
  36         CHECKREG r2, 0x06607770;
  37         CHECKREG r3, 0x08010990;
  38         CHECKREG r4, 0x0A01B0B0;
  39         CHECKREG r5, 0x0C01DD00;
  40         CHECKREG r6, 0x00001110;
  41         CHECKREG r7, 0x00001110;
  42
  43         R0 = M3;
  44         R1 = M2;
  45         R2 = M1;
  46         R3 = M0;
  47         R4 = I3;
  48         R5 = I2;
  49         R6 = I1;
  50         R7 = I0;
  51         CHECKREG r0, 0x00001110;
  52         CHECKREG r1, 0x0C01DD00;
  53         CHECKREG r2, 0x0A01B0B0;
  54         CHECKREG r3, 0x08010990;
  55         CHECKREG r4, 0x06607770;
  56         CHECKREG r5, 0x04015550;
  57         CHECKREG r6, 0x00213330;
  58         CHECKREG r7, 0x00001110;
  59
  60 // R-to-M,I and to P-reg: stall
  61         imm32 i0, 0x00001111;
  62         imm32 i1, 0x12213341;
  63         imm32 i2, 0x14415541;
  64         imm32 i3, 0x16617741;
  65         imm32 m0, 0x18819941;
  66         imm32 m1, 0x1aa1bb41;
  67         imm32 m2, 0x1cc1dd41;
  68         imm32 m3, 0x1ee1ff41;
  69         M0 = R0;
  70         R0 = M0;
  71         M1 = R1;
  72         P1 = M1;
  73         M2 = R2;
  74         P2 = M2;
  75         M3 = R3;
  76         P3 = M3;
  77         I0 = R4;
  78         P4 = I0;
  79         I1 = R5;
  80         P5 = I1;
  81         I2 = R6;
  82         SP = I2;
  83         I3 = R7;
  84         FP = I3;
  85
  86         CHECKREG r0, 0x00001110;
  87         CHECKREG p1, 0x0C01DD00;
  88         CHECKREG p2, 0x0A01B0B0;
  89         CHECKREG p3, 0x08010990;
  90         CHECKREG p4, 0x06607770;
  91         CHECKREG p5, 0x04015550;
  92         CHECKREG sp, 0x00213330;
  93         CHECKREG fp, 0x00001110;
  94         R0 = M0;
  95         R1 = M1;
  96         R2 = M2;
  97         R3 = M3;
  98         R4 = I0;
  99         R5 = I1;
 100         R6 = I2;
 101         R7 = I3;
 102         CHECKREG r0, 0x00001110;
 103         CHECKREG r1, 0x0C01DD00;
 104         CHECKREG r2, 0x0A01B0B0;
 105         CHECKREG r3, 0x08010990;
 106         CHECKREG r4, 0x06607770;
 107         CHECKREG r5, 0x04015550;
 108         CHECKREG r6, 0x00213330;
 109         CHECKREG r7, 0x00001110;
 110
 111 // R-reg to L,B-reg to R-reg: stall
 112         imm32 r0, 0x20001112;
 113         imm32 r1, 0x22213332;
 114         imm32 r2, 0x21215552;
 115         imm32 r3, 0x21627772;
 116         imm32 r4, 0x21812992;
 117         imm32 r5, 0x21a1b2b2;
 118         imm32 r6, 0x21c1d222;
 119         imm32 r7, 0x21e1ff22;
 120         L0 = R1;
 121         R0 = L0;
 122         L1 = R2;
 123         R1 = L1;
 124         L2 = R3;
 125         R2 = L2;
 126         L3 = R4;
 127         R3 = L3;
 128         B0 = R5;
 129         R4 = B0;
 130         B1 = R6;
 131         R5 = B1;
 132         B2 = R7;
 133         R6 = B2;
 134         B3 = R0;
 135         R7 = B3;
 136
 137         CHECKREG r0, 0x22213332;
 138         CHECKREG r1, 0x21215552;
 139         CHECKREG r2, 0x21627772;
 140         CHECKREG r3, 0x21812992;
 141         CHECKREG r4, 0x21A1B2B2;
 142         CHECKREG r5, 0x21C1D222;
 143         CHECKREG r6, 0x21E1FF22;
 144         CHECKREG r7, 0x22213332;
 145
 146         R0 = L3;
 147         R1 = L2;
 148         R2 = L1;
 149         R3 = L0;
 150         R4 = B3;
 151         R5 = B2;
 152         R6 = B1;
 153         R7 = B0;
 154         CHECKREG r0, 0x21812992;
 155         CHECKREG r1, 0x21627772;
 156         CHECKREG r2, 0x21215552;
 157         CHECKREG r3, 0x22213332;
 158         CHECKREG r4, 0x22213332;
 159         CHECKREG r5, 0x21E1FF22;
 160         CHECKREG r6, 0x21C1D222;
 161         CHECKREG r7, 0x21A1B2B2;
 162
 163 // R-reg to L,B-reg to P-reg: stall
 164         imm32 r0, 0x50001115;
 165         imm32 r1, 0x51213335;
 166         imm32 r2, 0x51415555;
 167         imm32 r3, 0x51617775;
 168         imm32 r4, 0x51819995;
 169         imm32 r5, 0x51a1bbb5;
 170         imm32 r6, 0x51c1ddd5;
 171         imm32 r7, 0x51e1fff5;
 172         L0 = R1;
 173         R0 = L0;
 174         L1 = R2;
 175         SP = L1;
 176         L2 = R3;
 177         FP = L2;
 178         L3 = R4;
 179         P1 = L3;
 180         B0 = R5;
 181         P2 = B0;
 182         B1 = R6;
 183         P3 = B1;
 184         B2 = R7;
 185         P4 = B2;
 186         B3 = R0;
 187         P5 = B3;
 188
 189         CHECKREG r0, 0x51213335;
 190         CHECKREG p1, 0x51819995;
 191         CHECKREG p2, 0x51A1BBB5;
 192         CHECKREG p3, 0x51C1DDD5;
 193         CHECKREG p4, 0x51E1FFF5;
 194         CHECKREG p5, 0x51213335;
 195         CHECKREG sp, 0x51415555;
 196         CHECKREG fp, 0x51617775;
 197
 198         R0 = L3;
 199         R1 = L2;
 200         R2 = L1;
 201         R3 = L0;
 202         R4 = B3;
 203         R5 = B2;
 204         R6 = B1;
 205         R7 = B0;
 206         CHECKREG r0, 0x51819995;
 207         CHECKREG r1, 0x51617775;
 208         CHECKREG r2, 0x51415555;
 209         CHECKREG r3, 0x51213335;
 210         CHECKREG r4, 0x51213335;
 211         CHECKREG r5, 0x51E1FFF5;
 212         CHECKREG r6, 0x51C1DDD5;
 213         CHECKREG r7, 0x51A1BBB5;
 214
 215 // R-reg to I,M-reg to L,B-reg:  stall
 216         imm32 r0, 0x00001111;
 217         imm32 r1, 0x72213337;
 218         imm32 r2, 0x74415557;
 219         imm32 r3, 0x76617777;
 220         imm32 r4, 0x78819997;
 221         imm32 r5, 0x7aa1bbb7;
 222         imm32 r6, 0x7cc1ddd7;
 223         imm32 r7, 0x77e1fff7;
 224         I0 = R0;
 225         L0 = I0;
 226         I1 = R1;
 227         L1 = I1;
 228         I2 = R2;
 229         L2 = I2;
 230         I3 = R3;
 231         L3 = I3;
 232         M0 = R4;
 233         B0 = M0;
 234         M1 = R5;
 235         B1 = M1;
 236         M2 = R6;
 237         B2 = M2;
 238         M3 = R7;
 239         B3 = M3;
 240
 241         R0 = L3;
 242         R1 = L2;
 243         R2 = L1;
 244         R3 = L0;
 245         R4 = B3;
 246         R5 = B2;
 247         R6 = B1;
 248         R7 = B0;
 249         CHECKREG r0, 0x76617777;
 250         CHECKREG r1, 0x74415557;
 251         CHECKREG r2, 0x72213337;
 252         CHECKREG r3, 0x00001111;
 253         CHECKREG r4, 0x77E1FFF7;
 254         CHECKREG r5, 0x7CC1DDD7;
 255         CHECKREG r6, 0x7AA1BBB7;
 256         CHECKREG r7, 0x78819997;
 257
 258         R0 = M3;
 259         R1 = M2;
 260         R2 = M1;
 261         R3 = M0;
 262         R4 = I3;
 263         R5 = I2;
 264         R6 = I1;
 265         R7 = I0;
 266         CHECKREG r0, 0x77E1FFF7;
 267         CHECKREG r1, 0x7CC1DDD7;
 268         CHECKREG r2, 0x7AA1BBB7;
 269         CHECKREG r3, 0x78819997;
 270         CHECKREG r4, 0x76617777;
 271         CHECKREG r5, 0x74415557;
 272         CHECKREG r6, 0x72213337;
 273         CHECKREG r7, 0x00001111;
 274
 275 // R-reg to L,B-reg to I,M reg:  stall
 276         imm32 r0, 0x00001111;
 277         imm32 r1, 0x81213338;
 278         imm32 r2, 0x81415558;
 279         imm32 r3, 0x81617778;
 280         imm32 r4, 0x81819998;
 281         imm32 r5, 0x81a1bbb8;
 282         imm32 r6, 0x81c1ddd8;
 283         imm32 r7, 0x81e1fff8;
 284         L0 = R0;
 285         I0 = L0;
 286         L1 = R1;
 287         I1 = L1;
 288         L2 = R2;
 289         I2 = L2;
 290         L3 = R3;
 291         I3 = L3;
 292         B0 = R4;
 293         M0 = B0;
 294         B1 = R5;
 295         M1 = B1;
 296         B2 = R6;
 297         M2 = B2;
 298         B3 = R7;
 299         M3 = B3;
 300
 301         R0 = M0;
 302         R1 = M1;
 303         R2 = M2;
 304         R3 = M3;
 305         R4 = I0;
 306         R5 = I1;
 307         R6 = I2;
 308         R7 = I3;
 309         CHECKREG r0, 0x81819998;
 310         CHECKREG r1, 0x81A1BBB8;
 311         CHECKREG r2, 0x81C1DDD8;
 312         CHECKREG r3, 0x81E1FFF8;
 313         CHECKREG r4, 0x00001111;
 314         CHECKREG r5, 0x81213338;
 315         CHECKREG r6, 0x81415558;
 316         CHECKREG r7, 0x81617778;
 317
 318         R0 = L3;
 319         R1 = L2;
 320         R2 = L1;
 321         R3 = L0;
 322         R4 = B3;
 323         R5 = B2;
 324         R6 = B1;
 325         R7 = B0;
 326         CHECKREG r0, 0x81617778;
 327         CHECKREG r1, 0x81415558;
 328         CHECKREG r2, 0x81213338;
 329         CHECKREG r3, 0x00001111;
 330         CHECKREG r4, 0x81E1FFF8;
 331         CHECKREG r5, 0x81C1DDD8;
 332         CHECKREG r6, 0x81A1BBB8;
 333         CHECKREG r7, 0x81819998;
 334
 335         pass