Add support to GDB for the Renesas rl78 architecture.
[external/binutils.git] / sim / testsuite / sim / bfin / c_regmv_imlb_dep_nostall.s
1 //Original:/proj/frio/dv/testcases/core/c_regmv_imlb_dep_nostall/c_regmv_imlb_dep_nostall.dsp
2 // Spec Reference: regmv imlb-dep no stall
3 # mach: bfin
4
5 .include "testutils.inc"
6         start
7
8 // P-reg to I,M-reg to R-reg: no stall
9 //imm32 p0, 0x00001111;
10         imm32 p1, 0x12213330;
11         imm32 p2, 0x14415550;
12         imm32 p3, 0x16617770;
13         imm32 p4, 0x18819990;
14         imm32 p5, 0x1aa1bbb0;
15         imm32 fp, 0x1cc1ddd0;
16         imm32 sp, 0x1ee1fff0;
17         I0 = P0;
18         R0 = I0;
19         I1 = P1;
20         R1 = I1;
21         I2 = P2;
22         R2 = I2;
23         I3 = P3;
24         R3 = I3;
25         M0 = P4;
26         R4 = M0;
27         M1 = P5;
28         R5 = M1;
29         M2 = SP;
30         R6 = M2;
31         M3 = FP;
32         R7 = M3;
33
34         CHECKREG r1, 0x12213330;
35         CHECKREG r2, 0x14415550;
36         CHECKREG r3, 0x16617770;
37         CHECKREG r4, 0x18819990;
38         CHECKREG r5, 0x1aa1bbb0;
39         CHECKREG r6, 0x1EE1FFF0;
40         CHECKREG r7, 0x1CC1DDD0;
41
42         R0 = M3;
43         R1 = M2;
44         R2 = M1;
45         R3 = M0;
46         R4 = I3;
47         R5 = I2;
48         R6 = I1;
49         R7 = I0;
50         CHECKREG r0, 0x1CC1DDD0;
51         CHECKREG r1, 0x1EE1FFF0;
52         CHECKREG r2, 0x1AA1BBB0;
53         CHECKREG r3, 0x18819990;
54         CHECKREG r4, 0x16617770;
55         CHECKREG r5, 0x14415550;
56         CHECKREG r6, 0x12213330;
57
58 // P-reg to L,B-reg to R-reg: no stall
59 //imm32 p0, 0x00001111;
60         imm32 p1, 0x21213331;
61         imm32 p2, 0x21415551;
62         imm32 p3, 0x21617771;
63         imm32 p4, 0x21819991;
64         imm32 p5, 0x21a1bbb1;
65         imm32 fp, 0x21c1ddd1;
66         imm32 sp, 0x21e1fff1;
67         L0 = P0;
68         R0 = L0;
69         L1 = P1;
70         R1 = L1;
71         L2 = P2;
72         R2 = L2;
73         L3 = P3;
74         R3 = L3;
75         B0 = P4;
76         R4 = B0;
77         B1 = P5;
78         R5 = B1;
79         B2 = SP;
80         R6 = B2;
81         B3 = FP;
82         R7 = B3;
83
84         CHECKREG r1, 0x21213331;
85         CHECKREG r2, 0x21415551;
86         CHECKREG r3, 0x21617771;
87         CHECKREG r4, 0x21819991;
88         CHECKREG r5, 0x21a1bbb1;
89         CHECKREG r6, 0x21E1FFF1;
90         CHECKREG r7, 0x21C1DDD1;
91
92         R0 = L3;
93         R1 = L2;
94         R2 = L1;
95         R3 = L0;
96         R4 = B3;
97         R5 = B2;
98         R6 = B1;
99         R7 = B0;
100         CHECKREG r0, 0x21617771;
101         CHECKREG r1, 0x21415551;
102         CHECKREG r2, 0x21213331;
103         CHECKREG r4, 0x21C1DDD1;
104         CHECKREG r5, 0x21E1FFF1;
105         CHECKREG r6, 0x21A1BBB1;
106         CHECKREG r7, 0x21819991;
107
108 // P-reg to I,M-reg to L,B-reg: no stall
109 //imm32 p0, 0x00001111;
110         imm32 p1, 0x72213337;
111         imm32 p2, 0x74415557;
112         imm32 p3, 0x76617777;
113         imm32 p4, 0x78819997;
114         imm32 p5, 0x7aa1bbb7;
115         imm32 fp, 0x7cc1ddd7;
116         imm32 sp, 0x77e1fff7;
117         I0 = P0;
118         L0 = I0;
119         I1 = P1;
120         L1 = I1;
121         I2 = P2;
122         L2 = I2;
123         I3 = P3;
124         L3 = I3;
125         M0 = P4;
126         B0 = M0;
127         M1 = P5;
128         B1 = M1;
129         M2 = SP;
130         B2 = M2;
131         M3 = FP;
132         B3 = M3;
133
134         R0 = L3;
135         R1 = L2;
136         R2 = L1;
137         R3 = L0;
138         R4 = B3;
139         R5 = B2;
140         R6 = B1;
141         R7 = B0;
142         CHECKREG r0, 0x76617777;
143         CHECKREG r1, 0x74415557;
144         CHECKREG r2, 0x72213337;
145         CHECKREG r4, 0x7CC1DDD7;
146         CHECKREG r5, 0x77E1FFF7;
147         CHECKREG r6, 0x7AA1BBB7;
148         CHECKREG r7, 0x78819997;
149
150         R0 = M3;
151         R1 = M2;
152         R2 = M1;
153         R3 = M0;
154         R4 = I3;
155         R5 = I2;
156         R6 = I1;
157         R7 = I0;
158         CHECKREG r0, 0x7CC1DDD7;
159         CHECKREG r1, 0x77E1FFF7;
160         CHECKREG r2, 0x7AA1BBB7;
161         CHECKREG r3, 0x78819997;
162         CHECKREG r4, 0x76617777;
163         CHECKREG r5, 0x74415557;
164         CHECKREG r6, 0x72213337;
165
166 // P-reg to L,B-reg to I,Mreg: no stall
167 //imm32 p0, 0x00001111;
168         imm32 p1, 0x81213338;
169         imm32 p2, 0x81415558;
170         imm32 p3, 0x81617778;
171         imm32 p4, 0x81819998;
172         imm32 p5, 0x81a1bbb8;
173         imm32 fp, 0x81c1ddd8;
174         imm32 sp, 0x81e1fff8;
175         L0 = P0;
176         I0 = L0;
177         L1 = P1;
178         I1 = L1;
179         L2 = P2;
180         I2 = L2;
181         L3 = P3;
182         I3 = L3;
183         B0 = P4;
184         M0 = B0;
185         B1 = P5;
186         M1 = B1;
187         B2 = SP;
188         M2 = B2;
189         B3 = FP;
190         M3 = B3;
191
192         R0 = M0;
193         R1 = M1;
194         R2 = M2;
195         R3 = M3;
196         R4 = I0;
197         R5 = I1;
198         R6 = I2;
199         R7 = I3;
200         CHECKREG r0, 0x81819998;
201         CHECKREG r1, 0x81A1BBB8;
202         CHECKREG r2, 0x81E1FFF8;
203         CHECKREG r3, 0x81C1DDD8;
204         CHECKREG r5, 0x81213338;
205         CHECKREG r6, 0x81415558;
206         CHECKREG r7, 0x81617778;
207
208         R0 = L3;
209         R1 = L2;
210         R2 = L1;
211         R3 = L0;
212         R4 = B3;
213         R5 = B2;
214         R6 = B1;
215         R7 = B0;
216         CHECKREG r0, 0x81617778;
217         CHECKREG r1, 0x81415558;
218         CHECKREG r2, 0x81213338;
219         CHECKREG r4, 0x81C1DDD8;
220         CHECKREG r5, 0x81E1FFF8;
221         CHECKREG r6, 0x81A1BBB8;
222         CHECKREG r7, 0x81819998;
223
224 // I-to-M, I-to-I and to R-reg: no stall
225         imm32 i0, 0x30001111;
226         imm32 i1, 0x23213332;
227         imm32 i2, 0x14315552;
228         imm32 i3, 0x01637772;
229         imm32 m0, 0x80113992;
230         imm32 m1, 0xaa01b3b2;
231         imm32 m2, 0xccc01d32;
232         imm32 m3, 0xeee101f3;
233         M0 = I0;
234         R4 = M0;
235         M1 = I1;
236         R5 = M1;
237         M2 = I2;
238         R6 = M2;
239         M3 = I3;
240         R7 = M3;
241         I0 = I3;
242         R0 = I0;
243         I1 = I2;
244         R1 = I1;
245         I3 = I0;
246         R2 = I3;
247         I2 = I1;
248         R3 = I2;
249
250         CHECKREG r0, 0x01637772;
251         CHECKREG r1, 0x14315552;
252         CHECKREG r2, 0x01637772;
253         CHECKREG r3, 0x14315552;
254         CHECKREG r4, 0x30001111;
255         CHECKREG r5, 0x23213332;
256         CHECKREG r6, 0x14315552;
257         CHECKREG r7, 0x01637772;
258         R0 = M0;
259         R1 = M1;
260         R2 = M2;
261         R3 = M3;
262         R4 = I0;
263         R5 = I1;
264         R6 = I2;
265         R7 = I3;
266         CHECKREG r0, 0x30001111;
267         CHECKREG r1, 0x23213332;
268         CHECKREG r2, 0x14315552;
269         CHECKREG r3, 0x01637772;
270         CHECKREG r4, 0x01637772;
271         CHECKREG r5, 0x14315552;
272         CHECKREG r6, 0x14315552;
273         CHECKREG r7, 0x01637772;
274
275 // I-to-M, I-to-I and to P-reg: no stall
276         imm32 i0, 0x00001111;
277         imm32 i1, 0x42213342;
278         imm32 i2, 0x44415542;
279         imm32 i3, 0x46617742;
280         imm32 m0, 0x48819942;
281         imm32 m1, 0x4aa1bb42;
282         imm32 m2, 0x4cc1dd42;
283         imm32 m3, 0x4ee1ff42;
284         M0 = I0;
285         R0 = M0;
286         M1 = I1;
287         P1 = M1;
288         M2 = I2;
289         P2 = M2;
290         M3 = I3;
291         P3 = M3;
292         I0 = I3;
293         P4 = I0;
294         I1 = I2;
295         P5 = I1;
296         I2 = I0;
297         SP = I2;
298         I3 = I1;
299         FP = I3;
300
301         CHECKREG r0, 0x00001111;
302         CHECKREG p1, 0x42213342;
303         CHECKREG p2, 0x44415542;
304         CHECKREG p3, 0x46617742;
305         CHECKREG p4, 0x46617742;
306         CHECKREG p5, 0x44415542;
307         CHECKREG sp, 0x46617742;
308         CHECKREG fp, 0x44415542;
309         R0 = M0;
310         R1 = M1;
311         R2 = M2;
312         R3 = M3;
313         R4 = I0;
314         R5 = I1;
315         R6 = I2;
316         R7 = I3;
317         CHECKREG r0, 0x00001111;
318         CHECKREG r1, 0x42213342;
319         CHECKREG r2, 0x44415542;
320         CHECKREG r3, 0x46617742;
321         CHECKREG r4, 0x46617742;
322         CHECKREG r5, 0x44415542;
323         CHECKREG r6, 0x46617742;
324         CHECKREG r7, 0x44415542;
325
326 // L-to-B, L-to-L and to R-reg: no stall
327         imm32 l0, 0x40001114;
328         imm32 l1, 0x24213334;
329         imm32 l2, 0x54415554;
330         imm32 l3, 0x05647774;
331         imm32 b0, 0x60514994;
332         imm32 b1, 0xa605b4b4;
333         imm32 b2, 0xcc605d44;
334         imm32 b3, 0xeee605f4;
335         B0 = L0;
336         R4 = B0;
337         B1 = L1;
338         R5 = B1;
339         B2 = L2;
340         R6 = B2;
341         B3 = L3;
342         R7 = B3;
343         L0 = L3;
344         R0 = L0;
345         L1 = L2;
346         R1 = L1;
347         L3 = L0;
348         R2 = L3;
349         L2 = L1;
350         R3 = L2;
351
352         CHECKREG r0, 0x05647774;
353         CHECKREG r1, 0x54415554;
354         CHECKREG r2, 0x05647774;
355         CHECKREG r3, 0x54415554;
356         CHECKREG r4, 0x40001114;
357         CHECKREG r5, 0x24213334;
358         CHECKREG r6, 0x54415554;
359         CHECKREG r7, 0x05647774;
360         R0 = L0;
361         R1 = L1;
362         R2 = L2;
363         R3 = L3;
364         R4 = B0;
365         R5 = B1;
366         R6 = B2;
367         R7 = B3;
368         CHECKREG r0, 0x05647774;
369         CHECKREG r1, 0x54415554;
370         CHECKREG r2, 0x54415554;
371         CHECKREG r3, 0x05647774;
372         CHECKREG r4, 0x40001114;
373         CHECKREG r5, 0x24213334;
374         CHECKREG r6, 0x54415554;
375         CHECKREG r7, 0x05647774;
376
377 // L-to-B, L-to-L and to P-reg: no stall
378         imm32 l0, 0x60001116;
379         imm32 l1, 0x46213346;
380         imm32 l2, 0x74615546;
381         imm32 l3, 0x47667746;
382         imm32 b0, 0x48716946;
383         imm32 b1, 0x8aa7b646;
384         imm32 b2, 0x48c17d66;
385         imm32 b3, 0x4e81f746;
386         M0 = I0;
387         R0 = M0;
388         M1 = I1;
389         P1 = M1;
390         M2 = I2;
391         P2 = M2;
392         M3 = I3;
393         P3 = M3;
394         I0 = I3;
395         P4 = I0;
396         I1 = I2;
397         P5 = I1;
398         I2 = I0;
399         SP = I2;
400         I3 = I1;
401         FP = I3;
402
403         CHECKREG r0, 0x46617742;
404         CHECKREG p1, 0x44415542;
405         CHECKREG p2, 0x46617742;
406         CHECKREG p3, 0x44415542;
407         CHECKREG p4, 0x44415542;
408         CHECKREG p5, 0x46617742;
409         CHECKREG sp, 0x44415542;
410         CHECKREG fp, 0x46617742;
411         R0 = M0;
412         R1 = M1;
413         R2 = M2;
414         R3 = M3;
415         R4 = I0;
416         R5 = I1;
417         R6 = I2;
418         R7 = I3;
419         CHECKREG r0, 0x46617742;
420         CHECKREG r1, 0x44415542;
421         CHECKREG r2, 0x46617742;
422         CHECKREG r3, 0x44415542;
423         CHECKREG r4, 0x44415542;
424         CHECKREG r5, 0x46617742;
425         CHECKREG r6, 0x44415542;
426         CHECKREG r7, 0x46617742;
427
428 // I-to-M-to-L, I-to-I-to-B -reg: no stall
429         imm32 i0, 0x90001119;
430         imm32 i1, 0x93213339;
431         imm32 i2, 0x94315559;
432         imm32 i3, 0x91637779;
433         imm32 m0, 0x90113999;
434         imm32 m1, 0x9a01b3b9;
435         imm32 m2, 0x9cc01d39;
436         imm32 m3, 0x9ee101f9;
437         M0 = I0;
438         L0 = M0;
439         M1 = I1;
440         L1 = M1;
441         M2 = I2;
442         L2 = M2;
443         M3 = I3;
444         L3 = M3;
445         I0 = I3;
446         B0 = I0;
447         I1 = I2;
448         B1 = I1;
449         I3 = I0;
450         B2 = I3;
451         I2 = I1;
452         B3 = I2;
453
454         R0 = L0;
455         R1 = L1;
456         R2 = L2;
457         R3 = L3;
458         R4 = B0;
459         R5 = B1;
460         R6 = B2;
461         R7 = B3;
462         CHECKREG r0, 0x90001119;
463         CHECKREG r1, 0x93213339;
464         CHECKREG r2, 0x94315559;
465         CHECKREG r3, 0x91637779;
466         CHECKREG r4, 0x91637779;
467         CHECKREG r5, 0x94315559;
468         CHECKREG r6, 0x91637779;
469         CHECKREG r7, 0x94315559;
470         R0 = M0;
471         R1 = M1;
472         R2 = M2;
473         R3 = M3;
474         R4 = I0;
475         R5 = I1;
476         R6 = I2;
477         R7 = I3;
478         CHECKREG r0, 0x90001119;
479         CHECKREG r1, 0x93213339;
480         CHECKREG r2, 0x94315559;
481         CHECKREG r3, 0x91637779;
482         CHECKREG r4, 0x91637779;
483         CHECKREG r5, 0x94315559;
484         CHECKREG r6, 0x94315559;
485         CHECKREG r7, 0x91637779;
486
487 // I-to-M-B, I-to-I-L reg: no stall
488         imm32 i0, 0xa000111a;
489         imm32 i1, 0xaa21334a;
490         imm32 i2, 0xa4a1554a;
491         imm32 i3, 0xa66a774a;
492         imm32 m0, 0xa881a94a;
493         imm32 m1, 0xaaa1ba4a;
494         imm32 m2, 0xacc1ddaa;
495         imm32 m3, 0xaee1ff4a;
496         M0 = I0;
497         B3 = M0;
498         M1 = I1;
499         B2 = M1;
500         M2 = I2;
501         B1 = M2;
502         M3 = I3;
503         B0 = M3;
504         I0 = I3;
505         L1 = I0;
506         I1 = I2;
507         L2 = I1;
508         I2 = I0;
509         L3 = I2;
510         I3 = I1;
511         L0 = I3;
512
513         R0 = L0;
514         R1 = L1;
515         R2 = L2;
516         R3 = L3;
517         R4 = B0;
518         R5 = B1;
519         R6 = B2;
520         R7 = B3;
521         CHECKREG r0, 0xA4A1554A;
522         CHECKREG r1, 0xA66A774A;
523         CHECKREG r2, 0xA4A1554A;
524         CHECKREG r3, 0xA66A774A;
525         CHECKREG r4, 0xA66A774A;
526         CHECKREG r5, 0xA4A1554A;
527         CHECKREG r6, 0xAA21334A;
528         CHECKREG r7, 0xA000111A;
529         R0 = M0;
530         R1 = M1;
531         R2 = M2;
532         R3 = M3;
533         R4 = I0;
534         R5 = I1;
535         R6 = I2;
536         R7 = I3;
537         CHECKREG r0, 0xA000111A;
538         CHECKREG r1, 0xAA21334A;
539         CHECKREG r2, 0xA4A1554A;
540         CHECKREG r3, 0xA66A774A;
541         CHECKREG r4, 0xA66A774A;
542         CHECKREG r5, 0xA4A1554A;
543         CHECKREG r6, 0xA66A774A;
544         CHECKREG r7, 0xA4A1554A;
545
546 // L-to-B-to-I, L-to-L-to-M reg: no stall
547         imm32 l0, 0xb000111b;
548         imm32 l1, 0xb421333b;
549         imm32 l2, 0xb441555b;
550         imm32 l3, 0xb564777b;
551         imm32 b0, 0xb051499b;
552         imm32 b1, 0xb605b4bb;
553         imm32 b2, 0xbc605d4b;
554         imm32 b3, 0xbee605fb;
555         B0 = L0;
556         I2 = B0;
557         B1 = L1;
558         I3 = B1;
559         B2 = L2;
560         I0 = B2;
561         B3 = L3;
562         I1 = B3;
563         L0 = L3;
564         M0 = L0;
565         L1 = L2;
566         M1 = L1;
567         L3 = L0;
568         M2 = L3;
569         L2 = L1;
570         M3 = L2;
571
572         R0 = I0;
573         R1 = I1;
574         R2 = I2;
575         R3 = I3;
576         R4 = M0;
577         R5 = M1;
578         R6 = M2;
579         R7 = M3;
580         CHECKREG r0, 0xB441555B;
581         CHECKREG r1, 0xB564777B;
582         CHECKREG r2, 0xB000111B;
583         CHECKREG r3, 0xB421333B;
584         CHECKREG r4, 0xB564777B;
585         CHECKREG r5, 0xB441555B;
586         CHECKREG r6, 0xB564777B;
587         CHECKREG r7, 0xB441555B;
588         R0 = L0;
589         R1 = L1;
590         R2 = L2;
591         R3 = L3;
592         R4 = B0;
593         R5 = B1;
594         R6 = B2;
595         R7 = B3;
596         CHECKREG r0, 0xB564777B;
597         CHECKREG r1, 0xB441555B;
598         CHECKREG r2, 0xB441555B;
599         CHECKREG r3, 0xB564777B;
600         CHECKREG r4, 0xB000111B;
601         CHECKREG r5, 0xB421333B;
602         CHECKREG r6, 0xB441555B;
603         CHECKREG r7, 0xB564777B;
604
605 // B-to-L-to-M, B-to-B-to-I reg: no stall
606         imm32 l0, 0xc000111c;
607         imm32 l1, 0xc621334c;
608         imm32 l2, 0xc461554c;
609         imm32 l3, 0xc766774c;
610         imm32 b0, 0xc871694c;
611         imm32 b1, 0xcaa7b64c;
612         imm32 b2, 0xc8c17d6c;
613         imm32 b3, 0xce81f74c;
614         L0 = B0;
615         M1 = L0;
616         L1 = B1;
617         M2 = L1;
618         L2 = B2;
619         M3 = L2;
620         L3 = B3;
621         M0 = L3;
622         B3 = B0;
623         I0 = B3;
624         B0 = B1;
625         I1 = B0;
626         B1 = B2;
627         I2 = B1;
628         B2 = B3;
629         I3 = B2;
630
631         R0 = L0;
632         R1 = L1;
633         R2 = L2;
634         R3 = L3;
635         R4 = B0;
636         R5 = B1;
637         R6 = B2;
638         R7 = B3;
639         CHECKREG r0, 0xC871694C;
640         CHECKREG r1, 0xCAA7B64C;
641         CHECKREG r2, 0xC8C17D6C;
642         CHECKREG r3, 0xCE81F74C;
643         CHECKREG r4, 0xCAA7B64C;
644         CHECKREG r5, 0xC8C17D6C;
645         CHECKREG r6, 0xC871694C;
646         CHECKREG r7, 0xC871694C;
647         R0 = M0;
648         R1 = M1;
649         R2 = M2;
650         R3 = M3;
651         R4 = I0;
652         R5 = I1;
653         R6 = I2;
654         R7 = I3;
655         CHECKREG r0, 0xCE81F74C;
656         CHECKREG r1, 0xC871694C;
657         CHECKREG r2, 0xCAA7B64C;
658         CHECKREG r3, 0xC8C17D6C;
659         CHECKREG r4, 0xC871694C;
660         CHECKREG r5, 0xCAA7B64C;
661         CHECKREG r6, 0xC8C17D6C;
662         CHECKREG r7, 0xC871694C;
663
664         pass