Add support to GDB for the Renesas rl78 architecture.
[external/binutils.git] / sim / testsuite / sim / bfin / c_dspldst_st_drhi_ipp.s
1 //Original:testcases/core/c_dspldst_st_drhi_ipp/c_dspldst_st_drhi_ipp.dsp
2 // Spec Reference: c_dspldst st_drhi_ipp
3 # mach: bfin
4
5 .include "testutils.inc"
6         start
7
8 // set all regs
9
10 INIT_I_REGS -1;
11 init_b_regs 0;
12 init_l_regs 0;
13 init_m_regs -1;
14
15 // Half reg 16 bit mem store
16
17         imm32 r0, 0x0a123456;
18         imm32 r1, 0x11b12345;
19         imm32 r2, 0x222c1234;
20         imm32 r3, 0x3344d012;
21         imm32 r4, 0x5566e012;
22         imm32 r5, 0x789abf01;
23         imm32 r6, 0xabcd0123;
24         imm32 r7, 0x01234567;
25
26 // initial values
27         loadsym i0, DATA_ADDR_3;
28         loadsym i1, DATA_ADDR_4;
29         loadsym i2, DATA_ADDR_5;
30         loadsym i3, DATA_ADDR_6;
31
32         W [ I0 ++ ] = R0.H;
33         W [ I1 ++ ] = R1.H;
34         W [ I2 ++ ] = R2.H;
35         W [ I3 ++ ] = R3.H;
36         W [ I0 ++ ] = R1.H;
37         W [ I1 ++ ] = R2.H;
38         W [ I2 ++ ] = R3.H;
39         W [ I3 ++ ] = R4.H;
40
41         W [ I0 ++ ] = R3.H;
42         W [ I1 ++ ] = R4.H;
43         W [ I2 ++ ] = R5.H;
44         W [ I3 ++ ] = R6.H;
45
46         W [ I0 ++ ] = R4.H;
47         W [ I1 ++ ] = R5.H;
48         W [ I2 ++ ] = R6.H;
49         W [ I3 ++ ] = R7.H;
50         loadsym i0, DATA_ADDR_3;
51         loadsym i1, DATA_ADDR_4;
52         loadsym i2, DATA_ADDR_5;
53         loadsym i3, DATA_ADDR_6;
54         R0 = [ I0 ++ ];
55         R1 = [ I1 ++ ];
56         R2 = [ I2 ++ ];
57         R3 = [ I3 ++ ];
58         R4 = [ I0 ++ ];
59         R5 = [ I1 ++ ];
60         R6 = [ I2 ++ ];
61         R7 = [ I3 ++ ];
62         CHECKREG r0, 0x11B10A12;
63         CHECKREG r1, 0x222C11B1;
64         CHECKREG r2, 0x3344222C;
65         CHECKREG r3, 0x55663344;
66         CHECKREG r4, 0x55663344;
67         CHECKREG r5, 0x789A5566;
68         CHECKREG r6, 0xABCD789A;
69         CHECKREG r7, 0x0123ABCD;
70
71         R0 = [ I0 ++ ];
72         R1 = [ I1 ++ ];
73         R2 = [ I2 ++ ];
74         R3 = [ I3 ++ ];
75         R4 = [ I0 ++ ];
76         R5 = [ I1 ++ ];
77         R6 = [ I2 ++ ];
78         R7 = [ I3 ++ ];
79         CHECKREG r0, 0x08090A0B;
80         CHECKREG r1, 0x28292A2B;
81         CHECKREG r2, 0x48494A4B;
82         CHECKREG r3, 0x68696A6B;
83         CHECKREG r4, 0x0C0D0E0F;
84         CHECKREG r5, 0x2C2D2E2F;
85         CHECKREG r6, 0x4C4D4E4F;
86         CHECKREG r7, 0x6C6D6E6F;
87
88 // initial values
89
90         imm32 r0, 0x01b2c3d4;
91         imm32 r1, 0x10145618;
92         imm32 r2, 0xa2016729;
93         imm32 r3, 0xbb30183a;
94         imm32 r4, 0xdec4014b;
95         imm32 r5, 0x5f7d501c;
96         imm32 r6, 0x3089eb01;
97         imm32 r7, 0x719abf70;
98
99         loadsym i0, DATA_ADDR_3, 0x20;
100         loadsym i1, DATA_ADDR_4, 0x20;
101         loadsym i2, DATA_ADDR_5, 0x20;
102         loadsym i3, DATA_ADDR_6, 0x20;
103
104         W [ I0 -- ] = R0.H;
105         W [ I1 -- ] = R1.H;
106         W [ I2 -- ] = R2.H;
107         W [ I3 -- ] = R3.H;
108         W [ I0 -- ] = R1.H;
109         W [ I1 -- ] = R2.H;
110         W [ I2 -- ] = R3.H;
111         W [ I3 -- ] = R4.H;
112
113         W [ I0 -- ] = R3.H;
114         W [ I1 -- ] = R4.H;
115         W [ I2 -- ] = R5.H;
116         W [ I3 -- ] = R6.H;
117         W [ I0 -- ] = R4.H;
118         W [ I1 -- ] = R5.H;
119         W [ I2 -- ] = R6.H;
120         W [ I3 -- ] = R7.H;
121         loadsym i0, DATA_ADDR_3, 0x20;
122         loadsym i1, DATA_ADDR_4, 0x20;
123         loadsym i2, DATA_ADDR_5, 0x20;
124         loadsym i3, DATA_ADDR_6, 0x20;
125         R0 = [ I0 -- ];
126         R1 = [ I1 -- ];
127         R2 = [ I2 -- ];
128         R3 = [ I3 -- ];
129         R4 = [ I0 -- ];
130         R5 = [ I1 -- ];
131         R6 = [ I2 -- ];
132         R7 = [ I3 -- ];
133         CHECKREG r0, 0x000001B2;
134         CHECKREG r1, 0x00001014;
135         CHECKREG r2, 0x0000A201;
136         CHECKREG r3, 0x0000BB30;
137         CHECKREG r4, 0x1014BB30;
138         CHECKREG r5, 0xA201DEC4;
139         CHECKREG r6, 0xBB305F7D;
140         CHECKREG r7, 0xDEC43089;
141
142         R0 = [ I0 -- ];
143         R1 = [ I1 -- ];
144         R2 = [ I2 -- ];
145         R3 = [ I3 -- ];
146         R4 = [ I0 -- ];
147         R5 = [ I1 -- ];
148         R6 = [ I2 -- ];
149         R7 = [ I3 -- ];
150         CHECKREG r0, 0xDEC41A1B;
151         CHECKREG r1, 0x5F7D3A3B;
152         CHECKREG r2, 0x30895A5B;
153         CHECKREG r3, 0x719A7A7B;
154         CHECKREG r4, 0x14151617;
155         CHECKREG r5, 0x34353637;
156         CHECKREG r6, 0x54555657;
157         CHECKREG r7, 0x74757677;
158
159         pass
160
161 // Pre-load memory with known data
162 // More data is defined than will actually be used
163
164         .data
165 DATA_ADDR_3:
166         .dd 0x00010203
167         .dd 0x04050607
168         .dd 0x08090A0B
169         .dd 0x0C0D0E0F
170         .dd 0x10111213
171         .dd 0x14151617
172         .dd 0x18191A1B
173         .dd 0x1C1D1E1F
174         .dd 0x00000000
175         .dd 0x00000000
176         .dd 0x00000000
177         .dd 0x00000000
178         .dd 0x00000000
179         .dd 0x00000000
180         .dd 0x00000000
181         .dd 0x00000000
182         .dd 0x00000000
183         .dd 0x00000000
184         .dd 0x00000000
185         .dd 0x00000000
186         .dd 0x00000000
187         .dd 0x00000000
188         .dd 0x00000000
189         .dd 0x00000000
190         .dd 0x00000000
191         .dd 0x00000000
192         .dd 0x00000000
193         .dd 0x00000000
194         .dd 0x00000000
195         .dd 0x00000000
196         .dd 0x00000000
197         .dd 0x00000000
198         .dd 0x00000000
199
200 DATA_ADDR_4:
201         .dd 0x20212223
202         .dd 0x24252627
203         .dd 0x28292A2B
204         .dd 0x2C2D2E2F
205         .dd 0x30313233
206         .dd 0x34353637
207         .dd 0x38393A3B
208         .dd 0x3C3D3E3F
209         .dd 0x00000000
210         .dd 0x00000000
211         .dd 0x00000000
212         .dd 0x00000000
213         .dd 0x00000000
214         .dd 0x00000000
215         .dd 0x00000000
216         .dd 0x00000000
217         .dd 0x00000000
218         .dd 0x00000000
219         .dd 0x00000000
220         .dd 0x00000000
221         .dd 0x00000000
222         .dd 0x00000000
223         .dd 0x00000000
224         .dd 0x00000000
225
226 DATA_ADDR_5:
227         .dd 0x40414243
228         .dd 0x44454647
229         .dd 0x48494A4B
230         .dd 0x4C4D4E4F
231         .dd 0x50515253
232         .dd 0x54555657
233         .dd 0x58595A5B
234         .dd 0x5C5D5E5F
235         .dd 0x00000000
236         .dd 0x00000000
237         .dd 0x00000000
238         .dd 0x00000000
239         .dd 0x00000000
240         .dd 0x00000000
241         .dd 0x00000000
242         .dd 0x00000000
243         .dd 0x00000000
244         .dd 0x00000000
245         .dd 0x00000000
246         .dd 0x00000000
247         .dd 0x00000000
248         .dd 0x00000000
249         .dd 0x00000000
250         .dd 0x00000000
251         .dd 0x00000000
252         .dd 0x00000000
253         .dd 0x00000000
254         .dd 0x00000000
255         .dd 0x00000000
256         .dd 0x00000000
257         .dd 0x00000000
258         .dd 0x00000000
259         .dd 0x00000000
260
261 DATA_ADDR_6:
262         .dd 0x60616263
263         .dd 0x64656667
264         .dd 0x68696A6B
265         .dd 0x6C6D6E6F
266         .dd 0x70717273
267         .dd 0x74757677
268         .dd 0x78797A7B
269         .dd 0x7C7D7E7F
270         .dd 0x00000000
271         .dd 0x00000000
272         .dd 0x00000000
273         .dd 0x00000000
274         .dd 0x00000000
275         .dd 0x00000000
276         .dd 0x00000000
277         .dd 0x00000000
278         .dd 0x00000000
279         .dd 0x00000000
280         .dd 0x00000000
281         .dd 0x00000000
282         .dd 0x00000000
283         .dd 0x00000000
284         .dd 0x00000000
285         .dd 0x00000000
286         .dd 0x00000000
287         .dd 0x00000000
288         .dd 0x00000000
289         .dd 0x00000000
290         .dd 0x00000000
291         .dd 0x00000000
292         .dd 0x00000000
293         .dd 0x00000000
294         .dd 0x00000000
295
296 DATA_ADDR_7:
297         .dd 0x80818283
298         .dd 0x84858687
299         .dd 0x88898A8B
300         .dd 0x8C8D8E8F
301         .dd 0x90919293
302         .dd 0x94959697
303         .dd 0x98999A9B
304         .dd 0x9C9D9E9F
305         .dd 0x00000000
306         .dd 0x00000000
307         .dd 0x00000000
308         .dd 0x00000000
309         .dd 0x00000000
310         .dd 0x00000000
311         .dd 0x00000000
312         .dd 0x00000000
313         .dd 0x00000000
314         .dd 0x00000000
315         .dd 0x00000000
316         .dd 0x00000000
317         .dd 0x00000000
318         .dd 0x00000000
319         .dd 0x00000000
320         .dd 0x00000000
321         .dd 0x00000000
322         .dd 0x00000000
323         .dd 0x00000000
324         .dd 0x00000000
325         .dd 0x00000000
326         .dd 0x00000000
327         .dd 0x00000000
328         .dd 0x00000000
329         .dd 0x00000000
330
331 DATA_ADDR_8:
332         .dd 0xA0A1A2A3
333         .dd 0xA4A5A6A7
334         .dd 0xA8A9AAAB
335         .dd 0xACADAEAF
336         .dd 0xB0B1B2B3
337         .dd 0xB4B5B6B7
338         .dd 0xB8B9BABB
339         .dd 0xBCBDBEBF
340         .dd 0xC0C1C2C3
341         .dd 0xC4C5C6C7
342         .dd 0xC8C9CACB
343         .dd 0xCCCDCECF
344         .dd 0xD0D1D2D3
345         .dd 0xD4D5D6D7
346         .dd 0xD8D9DADB
347         .dd 0xDCDDDEDF
348         .dd 0xE0E1E2E3
349         .dd 0xE4E5E6E7
350         .dd 0xE8E9EAEB
351         .dd 0xECEDEEEF
352         .dd 0xF0F1F2F3
353         .dd 0xF4F5F6F7
354         .dd 0xF8F9FAFB
355         .dd 0xFCFDFEFF