sim/testsuite/sim/bfin/c_dsp32shift_lf.s

   1 //Original:/testcases/core/c_dsp32shift_lf/c_dsp32shift_lf.dsp
   2 // Spec Reference: dsp32shift lshift
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10 // lshift : mix data, count (+)= (half reg)
  11 // d_reg = lshift (d BY d_lo)
  12 // Rx by RLx
  13 imm32 r0, 0x01210001;
  14 imm32 r1, 0x12315678;
  15 imm32 r2, 0x23416789;
  16 imm32 r3, 0x3451789a;
  17 imm32 r4, 0x856189ab;
  18 imm32 r5, 0x96719abc;
  19 imm32 r6, 0xa781abcd;
  20 imm32 r7, 0xb891bcde;
  21 R7 = LSHIFT R0 BY R0.L;
  22 R6 = LSHIFT R1 BY R0.L;
  23 R0 = LSHIFT R2 BY R0.L;
  24 R1 = LSHIFT R3 BY R0.L;
  25 R2 = LSHIFT R4 BY R0.L;
  26 R3 = LSHIFT R5 BY R0.L;
  27 R4 = LSHIFT R6 BY R0.L;
  28 R5 = LSHIFT R7 BY R0.L;
  29 CHECKREG r0, 0x4682CF12;
  30 CHECKREG r1, 0xE2680000;
  31 CHECKREG r2, 0x26AC0000;
  32 CHECKREG r3, 0x6AF00000;
  33 CHECKREG r4, 0xB3C00000;
  34 CHECKREG r5, 0x00080000;
  35 CHECKREG r6, 0x2462ACF0;
  36 CHECKREG r7, 0x02420002;
  37
  38 imm32 r0, 0x01220002;
  39 imm32 r1, 0x12325678;
  40 imm32 r2, 0x23426789;
  41 imm32 r3, 0x3452789a;
  42 imm32 r4, 0x956289ab;
  43 imm32 r5, 0xa6729abc;
  44 imm32 r6, 0xb782abcd;
  45 imm32 r7, 0xc892bcde;
  46 R1.L = 2;
  47 R3 = LSHIFT R0 BY R1.L;
  48 R4 = LSHIFT R1 BY R1.L;
  49 R5 = LSHIFT R2 BY R1.L;
  50 R6 = LSHIFT R3 BY R1.L;
  51 R7 = LSHIFT R4 BY R1.L;
  52 R0 = LSHIFT R5 BY R1.L;
  53 R1 = LSHIFT R6 BY R1.L;
  54 R2 = LSHIFT R7 BY R1.L;
  55 CHECKREG r0, 0x34267890;
  56 CHECKREG r1, 0x48800080;
  57 CHECKREG r2, 0x23200020;
  58 CHECKREG r3, 0x04880008;
  59 CHECKREG r4, 0x48C80008;
  60 CHECKREG r5, 0x8D099E24;
  61 CHECKREG r6, 0x12200020;
  62 CHECKREG r7, 0x23200020;
  63
  64 imm32 r0, 0x01230002;
  65 imm32 r1, 0x12335678;
  66 imm32 r2, 0x23436789;
  67 imm32 r3, 0x3453789a;
  68 imm32 r4, 0x456389ab;
  69 imm32 r5, 0x56739abc;
  70 imm32 r6, 0x6783abcd;
  71 imm32 r7, 0x789abcde;
  72 R2 = 14;
  73 R0 = LSHIFT R4 BY R2.L;
  74 R1 = LSHIFT R5 BY R2.L;
  75 R2 = LSHIFT R6 BY R2.L;
  76 R3 = LSHIFT R7 BY R2.L;
  77 CHECKREG r0, 0xE26AC000;
  78 CHECKREG r1, 0xE6AF0000;
  79 CHECKREG r2, 0xEAF34000;
  80 CHECKREG r3, 0x789ABCDE;
  81
  82 imm32 r0, 0x01240002;
  83 imm32 r1, 0x12345678;
  84 imm32 r2, 0x23446789;
  85 imm32 r3, 0x3454789a;
  86 imm32 r4, 0xa56489ab;
  87 imm32 r5, 0xb6749abc;
  88 imm32 r6, 0xc784abcd;
  89 imm32 r7, 0xd894bcde;
  90 R3.L = 15;
  91 R4 = LSHIFT R0 BY R3.L;
  92 R5 = LSHIFT R1 BY R3.L;
  93 R6 = LSHIFT R2 BY R3.L;
  94 R7 = LSHIFT R3 BY R3.L;
  95 R0 = LSHIFT R4 BY R3.L;
  96 R1 = LSHIFT R5 BY R3.L;
  97 R2 = LSHIFT R6 BY R3.L;
  98 R3 = LSHIFT R7 BY R3.L;
  99 CHECKREG r0, 0x80000000;
 100 CHECKREG r1, 0x00000000;
 101 CHECKREG r2, 0x40000000;
 102 CHECKREG r3, 0xC0000000;
 103 CHECKREG r4, 0x00010000;
 104 CHECKREG r5, 0x2B3C0000;
 105 CHECKREG r6, 0x33C48000;
 106 CHECKREG r7, 0x00078000;
 107
 108 imm32 r0, 0x01250002;
 109 imm32 r1, 0x12355678;
 110 imm32 r2, 0x23456789;
 111 imm32 r3, 0x3455789a;
 112 imm32 r4, 0x456589ab;
 113 imm32 r5, 0x56759abc;
 114 imm32 r6, 0x6785abcd;
 115 imm32 r7, 0x7895bcde;
 116 R4.L = -1;
 117 R7 = LSHIFT R0 BY R4.L;
 118 R6 = LSHIFT R1 BY R4.L;
 119 R5 = LSHIFT R2 BY R4.L;
 120 R3 = LSHIFT R4 BY R4.L;
 121 R2 = LSHIFT R5 BY R4.L;
 122 R1 = LSHIFT R6 BY R4.L;
 123 R0 = LSHIFT R7 BY R4.L;
 124 R4 = LSHIFT R3 BY R4.L;
 125 CHECKREG r0, 0x00494000;
 126 CHECKREG r1, 0x048D559E;
 127 CHECKREG r2, 0x08D159E2;
 128 CHECKREG r3, 0x22B2FFFF;
 129 CHECKREG r4, 0x11597FFF;
 130 CHECKREG r5, 0x11A2B3C4;
 131 CHECKREG r6, 0x091AAB3C;
 132 CHECKREG r7, 0x00928001;
 133
 134 imm32 r0, 0x01260002;
 135 imm32 r1, 0x82365678;
 136 imm32 r2, 0x93466789;
 137 imm32 r3, 0xa456789a;
 138 imm32 r4, 0xb56689ab;
 139 imm32 r5, 0xc6769abc;
 140 imm32 r6, 0xd786abcd;
 141 imm32 r7, 0xe896bcde;
 142 R5.L = -8;
 143 R6 = LSHIFT R0 BY R5.L;
 144 R7 = LSHIFT R1 BY R5.L;
 145 R0 = LSHIFT R2 BY R5.L;
 146 R1 = LSHIFT R3 BY R5.L;
 147 R2 = LSHIFT R4 BY R5.L;
 148 R3 = LSHIFT R5 BY R5.L;
 149 R4 = LSHIFT R6 BY R5.L;
 150 R5 = LSHIFT R7 BY R5.L;
 151 CHECKREG r0, 0x00934667;
 152 CHECKREG r1, 0x00A45678;
 153 CHECKREG r2, 0x00B56689;
 154 CHECKREG r3, 0x00C676FF;
 155 CHECKREG r4, 0x00000126;
 156 CHECKREG r5, 0x00008236;
 157 CHECKREG r6, 0x00012600;
 158 CHECKREG r7, 0x00823656;
 159
 160 imm32 r0, 0x01270002;
 161 imm32 r1, 0x12375678;
 162 imm32 r2, 0x23476789;
 163 imm32 r3, 0x3457789a;
 164 imm32 r4, 0x456789ab;
 165 imm32 r5, 0x56779abc;
 166 imm32 r6, 0x6787abcd;
 167 imm32 r7, 0x7897bcde;
 168 R6.L = -15;
 169 R7 = LSHIFT R0 BY R6.L;
 170 R0 = LSHIFT R1 BY R6.L;
 171 R1 = LSHIFT R2 BY R6.L;
 172 R2 = LSHIFT R3 BY R6.L;
 173 R3 = LSHIFT R4 BY R6.L;
 174 R4 = LSHIFT R5 BY R6.L;
 175 R5 = LSHIFT R6 BY R6.L;
 176 R6 = LSHIFT R7 BY R6.L;
 177 CHECKREG r0, 0x0000246E;
 178 CHECKREG r1, 0x0000468E;
 179 CHECKREG r2, 0x000068AE;
 180 CHECKREG r3, 0x00008ACF;
 181 CHECKREG r4, 0x0000ACEF;
 182 CHECKREG r5, 0x0000CF0F;
 183 CHECKREG r6, 0x00000000;
 184 CHECKREG r7, 0x0000024E;
 185
 186 imm32 r0, 0x01280002;
 187 imm32 r1, 0x82385678;
 188 imm32 r2, 0x93486789;
 189 imm32 r3, 0xa458789a;
 190 imm32 r4, 0xb56889ab;
 191 imm32 r5, 0xc6789abc;
 192 imm32 r6, 0xd788abcd;
 193 imm32 r7, 0xe898bcde;
 194 R7.L = -16;
 195 R0 = LSHIFT R0 BY R7.L;
 196 R1 = LSHIFT R1 BY R7.L;
 197 R2 = LSHIFT R2 BY R7.L;
 198 R3 = LSHIFT R3 BY R7.L;
 199 R4 = LSHIFT R4 BY R7.L;
 200 R5 = LSHIFT R5 BY R7.L;
 201 R6 = LSHIFT R6 BY R7.L;
 202 R7 = LSHIFT R7 BY R7.L;
 203 CHECKREG r0, 0x00000128;
 204 CHECKREG r1, 0x00008238;
 205 CHECKREG r2, 0x00009348;
 206 CHECKREG r3, 0x0000A458;
 207 CHECKREG r4, 0x0000B568;
 208 CHECKREG r5, 0x0000C678;
 209 CHECKREG r6, 0x0000D788;
 210 CHECKREG r7, 0x0000E898;
 211
 212 imm32 r0, 0x81290002;
 213 imm32 r1, 0x92395678;
 214 imm32 r2, 0xa3496789;
 215 imm32 r3, 0xb459789a;
 216 imm32 r4, 0xc56989ab;
 217 imm32 r5, 0xd6799abc;
 218 imm32 r6, 0xe789abcd;
 219 imm32 r7, 0xf899bcde;
 220 R0.L = 4;
 221 //r0 = lshift (r0 by rl0);
 222 R1 = LSHIFT R1 BY R0.L;
 223 R2 = LSHIFT R2 BY R0.L;
 224 R3 = LSHIFT R3 BY R0.L;
 225 R4 = LSHIFT R4 BY R0.L;
 226 R5 = LSHIFT R5 BY R0.L;
 227 R6 = LSHIFT R6 BY R0.L;
 228 R7 = LSHIFT R7 BY R0.L;
 229 CHECKREG r1, 0x23956780;
 230 CHECKREG r2, 0x34967890;
 231 CHECKREG r3, 0x459789A0;
 232 CHECKREG r4, 0x56989AB0;
 233 CHECKREG r5, 0x6799ABC0;
 234 CHECKREG r6, 0x789ABCD0;
 235 CHECKREG r7, 0x899BCDE0;
 236
 237 imm32 r0, 0x012a0002;
 238 imm32 r1, 0x123a5678;
 239 imm32 r2, 0x234a6789;
 240 imm32 r3, 0x345a789a;
 241 imm32 r4, 0x456a89ab;
 242 imm32 r5, 0x567a9abc;
 243 imm32 r6, 0x678aabcd;
 244 imm32 r7, 0xf89abcde;
 245 R1.L = 2;
 246 R7 = LSHIFT R0 BY R1.L;
 247 R6 = LSHIFT R1 BY R1.L;
 248 R5 = LSHIFT R2 BY R1.L;
 249 R4 = LSHIFT R3 BY R1.L;
 250 R3 = LSHIFT R4 BY R1.L;
 251 R2 = LSHIFT R5 BY R1.L;
 252 R0 = LSHIFT R6 BY R1.L;
 253 R1 = LSHIFT R7 BY R1.L;
 254 CHECKREG r0, 0x23A00020;
 255 CHECKREG r1, 0x12A00020;
 256 CHECKREG r2, 0x34A67890;
 257 CHECKREG r3, 0x45A789A0;
 258 CHECKREG r4, 0xD169E268;
 259 CHECKREG r5, 0x8D299E24;
 260 CHECKREG r6, 0x48E80008;
 261 CHECKREG r7, 0x04A80008;
 262
 263
 264 imm32 r0, 0x012b0002;
 265 imm32 r1, 0x123b5678;
 266 imm32 r2, 0x234b6789;
 267 imm32 r3, 0x345b789a;
 268 imm32 r4, 0x456b89ab;
 269 imm32 r5, 0x567b9abc;
 270 imm32 r6, 0x678babcd;
 271 imm32 r7, 0x789bbcde;
 272 R2.L = 15;
 273 R0 = LSHIFT R0 BY R2.L;
 274 R1 = LSHIFT R1 BY R2.L;
 275 R3 = LSHIFT R3 BY R2.L;
 276 R4 = LSHIFT R4 BY R2.L;
 277 R5 = LSHIFT R5 BY R2.L;
 278 R6 = LSHIFT R6 BY R2.L;
 279 R7 = LSHIFT R7 BY R2.L;
 280 R2 = LSHIFT R2 BY R2.L;
 281 CHECKREG r0, 0x80010000;
 282 CHECKREG r1, 0xAB3C0000;
 283 CHECKREG r2, 0x80078000;
 284 CHECKREG r3, 0xBC4D0000;
 285 CHECKREG r4, 0xC4D58000;
 286 CHECKREG r5, 0xCD5E0000;
 287 CHECKREG r6, 0xD5E68000;
 288 CHECKREG r7, 0xDE6F0000;
 289
 290 imm32 r0, 0x012c0002;
 291 imm32 r1, 0x123c5678;
 292 imm32 r2, 0x234c6789;
 293 imm32 r3, 0x345c789a;
 294 imm32 r4, 0x456c89ab;
 295 imm32 r5, 0x567c9abc;
 296 imm32 r6, 0x678cabcd;
 297 imm32 r7, 0x789cbcde;
 298 R3.L = 16;
 299 R0 = LSHIFT R0 BY R3.L;
 300 R1 = LSHIFT R1 BY R3.L;
 301 R2 = LSHIFT R2 BY R3.L;
 302 R4 = LSHIFT R4 BY R3.L;
 303 R5 = LSHIFT R5 BY R3.L;
 304 R6 = LSHIFT R6 BY R3.L;
 305 R7 = LSHIFT R7 BY R3.L;
 306 R3 = LSHIFT R3 BY R3.L;
 307 CHECKREG r0, 0x00020000;
 308 CHECKREG r1, 0x56780000;
 309 CHECKREG r2, 0x67890000;
 310 CHECKREG r3, 0x00100000;
 311 CHECKREG r4, 0x89AB0000;
 312 CHECKREG r5, 0x9ABC0000;
 313 CHECKREG r6, 0xABCD0000;
 314 CHECKREG r7, 0xBCDE0000;
 315
 316 imm32 r0, 0x012d0002;
 317 imm32 r1, 0x123d5678;
 318 imm32 r2, 0x234d6789;
 319 imm32 r3, 0x345d789a;
 320 imm32 r4, 0x456d89ab;
 321 imm32 r5, 0x567d9abc;
 322 imm32 r6, 0x678dabcd;
 323 imm32 r7, 0x789dbcde;
 324 R4.L = -9;
 325 R7 = LSHIFT R0 BY R4.L;
 326 R0 = LSHIFT R1 BY R4.L;
 327 R1 = LSHIFT R2 BY R4.L;
 328 R2 = LSHIFT R3 BY R4.L;
 329 //r4 = lshift (r4 by rl4);
 330 R3 = LSHIFT R5 BY R4.L;
 331 R5 = LSHIFT R6 BY R4.L;
 332 R6 = LSHIFT R7 BY R4.L;
 333 CHECKREG r0, 0x00091EAB;
 334 CHECKREG r1, 0x0011A6B3;
 335 CHECKREG r2, 0x001A2EBC;
 336 CHECKREG r3, 0x002B3ECD;
 337 CHECKREG r4, 0x456DFFF7;
 338 CHECKREG r5, 0x0033C6D5;
 339 CHECKREG r6, 0x0000004B;
 340 CHECKREG r7, 0x00009680;
 341
 342 imm32 r0, 0x012e0002;
 343 imm32 r1, 0x123e5678;
 344 imm32 r2, 0x234e6789;
 345 imm32 r3, 0x345e789a;
 346 imm32 r4, 0x456e89ab;
 347 imm32 r5, 0x567e9abc;
 348 imm32 r6, 0x678eabcd;
 349 imm32 r7, 0x789ebcde;
 350 R5.L = -14;
 351 R0 = LSHIFT R0 BY R5.L;
 352 R1 = LSHIFT R1 BY R5.L;
 353 R2 = LSHIFT R2 BY R5.L;
 354 R3 = LSHIFT R3 BY R5.L;
 355 R4 = LSHIFT R4 BY R5.L;
 356 //r5 = lshift (r5 by rl5);
 357 R6 = LSHIFT R6 BY R5.L;
 358 R7 = LSHIFT R7 BY R5.L;
 359 CHECKREG r0, 0x000004B8;
 360 CHECKREG r1, 0x000048F9;
 361 CHECKREG r2, 0x00008D39;
 362 CHECKREG r3, 0x0000D179;
 363 CHECKREG r4, 0x000115BA;
 364 CHECKREG r5, 0x567EFFF2;
 365 CHECKREG r6, 0x00019E3A;
 366 CHECKREG r7, 0x0001E27A;
 367
 368
 369 imm32 r0, 0x012f0002;
 370 imm32 r1, 0x623f5678;
 371 imm32 r2, 0x734f6789;
 372 imm32 r3, 0x845f789a;
 373 imm32 r4, 0x956f89ab;
 374 imm32 r5, 0xa67f9abc;
 375 imm32 r6, 0xc78fabcd;
 376 imm32 r7, 0xd89fbcde;
 377 R6.L = -15;
 378 R0 = LSHIFT R0 BY R6.L;
 379 R1 = LSHIFT R1 BY R6.L;
 380 R2 = LSHIFT R2 BY R6.L;
 381 R3 = LSHIFT R3 BY R6.L;
 382 R4 = LSHIFT R4 BY R6.L;
 383 R5 = LSHIFT R5 BY R6.L;
 384 //r6 = lshift (r6 by rl6);
 385 R7 = LSHIFT R7 BY R6.L;
 386 CHECKREG r0, 0x0000025E;
 387 CHECKREG r1, 0x0000C47E;
 388 CHECKREG r2, 0x0000E69E;
 389 CHECKREG r3, 0x000108BE;
 390 CHECKREG r4, 0x00012ADF;
 391 CHECKREG r5, 0x00014CFF;
 392 CHECKREG r6, 0xC78FFFF1;
 393 CHECKREG r7, 0x0001B13F;
 394
 395 imm32 r0, 0x71230072;
 396 imm32 r1, 0x82345678;
 397 imm32 r2, 0x93456779;
 398 imm32 r3, 0xa456787a;
 399 imm32 r4, 0xb567897b;
 400 imm32 r5, 0xc6789a7c;
 401 imm32 r6, 0x6789ab7d;
 402 imm32 r7, 0x789abc7e;
 403 R7.L = -16;
 404 R0 = LSHIFT R0 BY R7.L;
 405 R1 = LSHIFT R1 BY R7.L;
 406 R2 = LSHIFT R2 BY R7.L;
 407 R3 = LSHIFT R3 BY R7.L;
 408 R4 = LSHIFT R4 BY R7.L;
 409 R5 = LSHIFT R5 BY R7.L;
 410 R6 = LSHIFT R6 BY R7.L;
 411 R7 = LSHIFT R7 BY R7.L;
 412 CHECKREG r0, 0x00007123;
 413 CHECKREG r1, 0x00008234;
 414 CHECKREG r2, 0x00009345;
 415 CHECKREG r3, 0x0000A456;
 416 CHECKREG r4, 0x0000B567;
 417 CHECKREG r5, 0x0000C678;
 418 CHECKREG r6, 0x00006789;
 419 CHECKREG r7, 0x0000789A;
 420
 421
 422 pass