binutils/
[external/binutils.git] / sim / testsuite / sim / bfin / c_dsp32shift_fextx.s
1 //Original:/testcases/core/c_dsp32shift_fextx/c_dsp32shift_fextx.dsp
2 // Spec Reference: dsp32shift fext x
3 # mach: bfin
4
5 .include "testutils.inc"
6         start
7
8 imm32 r0, 0x00000001;
9 imm32 r1, 0x01000801;
10 imm32 r2, 0x08200802;
11 imm32 r3, 0x08030803;
12 imm32 r4, 0x08004804;
13 imm32 r5, 0x08000505;
14 imm32 r6, 0x08000866;
15 imm32 r7, 0x08000807;
16 R1 = EXTRACT( R1, R0.L ) (Z);
17 R2 = EXTRACT( R2, R0.L ) (Z);
18 R3 = EXTRACT( R3, R0.L ) (Z);
19 R4 = EXTRACT( R4, R0.L ) (X);
20 R5 = EXTRACT( R5, R0.L ) (Z);
21 R6 = EXTRACT( R6, R0.L ) (Z);
22 R7 = EXTRACT( R7, R0.L ) (X);
23 R0 = EXTRACT( R0, R0.L ) (Z);
24 CHECKREG r0, 0x00000001;
25 CHECKREG r1, 0x00000001;
26 CHECKREG r2, 0x00000000;
27 CHECKREG r3, 0x00000001;
28 CHECKREG r4, 0x00000000;
29 CHECKREG r5, 0x00000001;
30 CHECKREG r6, 0x00000000;
31 CHECKREG r7, 0xFFFFFFFF;
32
33 imm32 r0, 0x0900d001;
34 imm32 r1, 0x09000002;
35 imm32 r2, 0x09000002;
36 imm32 r3, 0x09100003;
37 imm32 r4, 0x09020004;
38 imm32 r5, 0x09003005;
39 imm32 r6, 0x09000406;
40 imm32 r7, 0x09000057;
41 R0 = EXTRACT( R0, R1.L ) (Z);
42 R2 = EXTRACT( R2, R1.L ) (Z);
43 R3 = EXTRACT( R3, R1.L ) (Z);
44 R4 = EXTRACT( R4, R1.L ) (Z);
45 R5 = EXTRACT( R5, R1.L ) (X);
46 R6 = EXTRACT( R6, R1.L ) (Z);
47 R7 = EXTRACT( R7, R1.L ) (X);
48 R1 = EXTRACT( R1, R1.L ) (Z);
49 CHECKREG r0, 0x00000001;
50 CHECKREG r1, 0x00000002;
51 CHECKREG r2, 0x00000002;
52 CHECKREG r3, 0x00000003;
53 CHECKREG r4, 0x00000000;
54 CHECKREG r5, 0x00000001;
55 CHECKREG r6, 0x00000002;
56 CHECKREG r7, 0xFFFFFFFF;
57
58
59 imm32 r0, 0x0a00e001;
60 imm32 r1, 0x0a00e001;
61 imm32 r2, 0x0a00000f;
62 imm32 r3, 0x0a000010;
63 imm32 r4, 0x0a00e004;
64 imm32 r5, 0x0a00e005;
65 imm32 r6, 0x0a00e006;
66 imm32 r7, 0x0a00e007;
67 R0 = EXTRACT( R0, R2.L ) (Z);
68 R1 = EXTRACT( R1, R2.L ) (Z);
69 R3 = EXTRACT( R3, R2.L ) (Z);
70 R4 = EXTRACT( R4, R2.L ) (Z);
71 R5 = EXTRACT( R5, R2.L ) (Z);
72 R6 = EXTRACT( R6, R2.L ) (Z);
73 R7 = EXTRACT( R7, R2.L ) (Z);
74 R2 = EXTRACT( R2, R2.L ) (Z);
75 CHECKREG r0, 0x00006001;
76 CHECKREG r1, 0x00006001;
77 CHECKREG r2, 0x0000000F;
78 CHECKREG r3, 0x00000010;
79 CHECKREG r4, 0x00006004;
80 CHECKREG r5, 0x00006005;
81 CHECKREG r6, 0x00006006;
82 CHECKREG r7, 0x00006007;
83
84 imm32 r0, 0x0b00f001;
85 imm32 r1, 0x0b00f001;
86 imm32 r2, 0x0b00f002;
87 imm32 r3, 0x0b000010;
88 imm32 r4, 0x0b00f004;
89 imm32 r5, 0x0b00f005;
90 imm32 r6, 0x0b00f006;
91 imm32 r7, 0x0b00f007;
92 R0 = EXTRACT( R0, R3.L ) (Z);
93 R1 = EXTRACT( R1, R3.L ) (Z);
94 R2 = EXTRACT( R2, R3.L ) (X);
95 R4 = EXTRACT( R4, R3.L ) (Z);
96 R5 = EXTRACT( R5, R3.L ) (Z);
97 R6 = EXTRACT( R6, R3.L ) (X);
98 R7 = EXTRACT( R7, R3.L ) (Z);
99 R3 = EXTRACT( R3, R3.L ) (Z);
100 CHECKREG r0, 0x0000F001;
101 CHECKREG r1, 0x0000F001;
102 CHECKREG r2, 0xFFFFF002;
103 CHECKREG r3, 0x00000010;
104 CHECKREG r4, 0x0000F004;
105 CHECKREG r5, 0x0000F005;
106 CHECKREG r6, 0xFFFFF006;
107 CHECKREG r7, 0x0000F007;
108
109 imm32 r0, 0x0c0000c0;
110 imm32 r1, 0x0c0100c0;
111 imm32 r2, 0x0c0200c0;
112 imm32 r3, 0x0c0300c0;
113 imm32 r4, 0x0c04000c;
114 imm32 r5, 0x0c0500c0;
115 imm32 r6, 0x0c0600c0;
116 imm32 r7, 0x0c0700c0;
117 R0 = EXTRACT( R0, R4.L ) (Z);
118 R1 = EXTRACT( R1, R4.L ) (Z);
119 R2 = EXTRACT( R2, R4.L ) (Z);
120 R3 = EXTRACT( R3, R4.L ) (Z);
121 R5 = EXTRACT( R5, R4.L ) (X);
122 R6 = EXTRACT( R6, R4.L ) (Z);
123 R7 = EXTRACT( R7, R4.L ) (Z);
124 R4 = EXTRACT( R4, R4.L ) (Z);
125 CHECKREG r0, 0x000000C0;
126 CHECKREG r1, 0x000000C0;
127 CHECKREG r2, 0x000000C0;
128 CHECKREG r3, 0x000000C0;
129 CHECKREG r4, 0x0000000C;
130 CHECKREG r5, 0x000000C0;
131 CHECKREG r6, 0x000000C0;
132 CHECKREG r7, 0x000000C0;
133
134 imm32 r0, 0xa00100d0;
135 imm32 r1, 0xa00100d1;
136 imm32 r2, 0xa00200d0;
137 imm32 r3, 0xa00300d0;
138 imm32 r4, 0xa00400d0;
139 imm32 r5, 0xa0050007;
140 imm32 r6, 0xa00600d0;
141 imm32 r7, 0xa00700d0;
142 R0 = EXTRACT( R0, R5.L ) (Z);
143 R1 = EXTRACT( R1, R5.L ) (X);
144 R2 = EXTRACT( R2, R5.L ) (Z);
145 R3 = EXTRACT( R3, R5.L ) (Z);
146 R4 = EXTRACT( R4, R5.L ) (X);
147 R6 = EXTRACT( R6, R5.L ) (Z);
148 R7 = EXTRACT( R7, R5.L ) (Z);
149 R5 = EXTRACT( R5, R5.L ) (Z);
150 CHECKREG r0, 0x00000050;
151 CHECKREG r1, 0xFFFFFFD1;
152 CHECKREG r2, 0x00000050;
153 CHECKREG r3, 0x00000050;
154 CHECKREG r4, 0xFFFFFFD0;
155 CHECKREG r5, 0x00000007;
156 CHECKREG r6, 0x00000050;
157 CHECKREG r7, 0x00000050;
158
159 imm32 r0, 0xb0010000;
160 imm32 r1, 0xb0010000;
161 imm32 r2, 0xb002000f;
162 imm32 r3, 0xb0030000;
163 imm32 r4, 0xb0040000;
164 imm32 r5, 0xb0050000;
165 imm32 r6, 0xb0060009;
166 imm32 r7, 0xb0070000;
167 R0 = EXTRACT( R0, R6.L ) (Z);
168 R1 = EXTRACT( R1, R6.L ) (Z);
169 R2 = EXTRACT( R2, R6.L ) (Z);
170 R3 = EXTRACT( R3, R6.L ) (X);
171 R4 = EXTRACT( R4, R6.L ) (Z);
172 R5 = EXTRACT( R5, R6.L ) (Z);
173 R6 = EXTRACT( R6, R6.L ) (Z);
174 R7 = EXTRACT( R7, R6.L ) (Z);
175 CHECKREG r0, 0x00000000;
176 CHECKREG r1, 0x00000000;
177 CHECKREG r2, 0x0000000F;
178 CHECKREG r3, 0x00000000;
179 CHECKREG r4, 0x00000000;
180 CHECKREG r5, 0x00000000;
181 CHECKREG r6, 0x00000009;
182 CHECKREG r7, 0x00000000;
183
184 imm32 r0, 0xd00100e0;
185 imm32 r1, 0xd00100e0;
186 imm32 r2, 0xd00200e0;
187 imm32 r3, 0xd00300e0;
188 imm32 r4, 0xd00400e0;
189 imm32 r5, 0xd00500e0;
190 imm32 r6, 0xd00600e0;
191 imm32 r7, 0xd0070023;
192 R1 = EXTRACT( R0, R7.L ) (Z);
193 R2 = EXTRACT( R1, R7.L ) (Z);
194 R3 = EXTRACT( R2, R7.L ) (Z);
195 R4 = EXTRACT( R3, R7.L ) (Z);
196 R5 = EXTRACT( R4, R7.L ) (X);
197 R6 = EXTRACT( R5, R7.L ) (Z);
198 R7 = EXTRACT( R6, R7.L ) (X);
199 R0 = EXTRACT( R7, R7.L ) (Z);
200 CHECKREG r0, 0x00000000;
201 CHECKREG r1, 0x00000000;
202 CHECKREG r2, 0x00000000;
203 CHECKREG r3, 0x00000000;
204 CHECKREG r4, 0x00000000;
205 CHECKREG r5, 0x00000000;
206 CHECKREG r6, 0x00000000;
207 CHECKREG r7, 0x00000000;
208
209
210 pass