sim/testsuite/sim/bfin/c_dsp32alu_rm.s

   1 //Original:/testcases/core/c_dsp32alu_rm/c_dsp32alu_rm.dsp
   2 // Spec Reference: dsp32alu
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 imm32 r0, 0x35678911;
  12 imm32 r1, 0x2389ab1d;
  13 imm32 r2, 0x34345515;
  14 imm32 r3, 0x46637717;
  15 imm32 r4, 0x5567391b;
  16 imm32 r5, 0x6789a31d;
  17 imm32 r6, 0x744455a5;
  18 imm32 r7, 0x866677a7;
  19 R0 = R0 - R0 (NS);
  20 R1 = R0 - R1 (NS);
  21 R2 = R0 - R2 (NS);
  22 R3 = R0 - R3 (NS);
  23 R4 = R0 - R4 (NS);
  24 R5 = R0 - R5 (NS);
  25 R6 = R0 - R6 (NS);
  26 R7 = R0 - R7 (NS);
  27 CHECKREG r0, 0x00000000;
  28 CHECKREG r1, 0xDC7654E3;
  29 CHECKREG r2, 0xCBCBAAEB;
  30 CHECKREG r3, 0xB99C88E9;
  31 CHECKREG r4, 0xAA98C6E5;
  32 CHECKREG r5, 0x98765CE3;
  33 CHECKREG r6, 0x8BBBAA5B;
  34 CHECKREG r7, 0x79998859;
  35
  36 imm32 r0, 0xa5678911;
  37 imm32 r1, 0x4a89ab1d;
  38 imm32 r2, 0x54a45515;
  39 imm32 r3, 0x466a7717;
  40 imm32 r4, 0x5567a91b;
  41 imm32 r5, 0x6789ab1d;
  42 imm32 r6, 0x74445a15;
  43 imm32 r7, 0x866677a7;
  44 R0 = R1 - R0 (NS);
  45 R1 = R1 - R1 (NS);
  46 R2 = R1 - R2 (NS);
  47 R3 = R1 - R3 (NS);
  48 R4 = R1 - R4 (NS);
  49 R5 = R1 - R5 (NS);
  50 R6 = R1 - R6 (NS);
  51 R7 = R1 - R7 (NS);
  52 CHECKREG r0, 0xA522220C;
  53 CHECKREG r1, 0x00000000;
  54 CHECKREG r2, 0xAB5BAAEB;
  55 CHECKREG r3, 0xB99588E9;
  56 CHECKREG r4, 0xAA9856E5;
  57 CHECKREG r5, 0x987654E3;
  58 CHECKREG r6, 0x8BBBA5EB;
  59 CHECKREG r7, 0x79998859;
  60
  61 imm32 r0, 0xda678911;
  62 imm32 r1, 0x27c9ab1d;
  63 imm32 r2, 0x344c5515;
  64 imm32 r3, 0x4666c717;
  65 imm32 r4, 0x5567891b;
  66 imm32 r5, 0x6789ab1d;
  67 imm32 r6, 0x744455b5;
  68 imm32 r7, 0x8666777b;
  69 R0 = R2 - R0 (NS);
  70 R1 = R2 - R1 (NS);
  71 R2 = R2 - R2 (NS);
  72 R3 = R2 - R3 (NS);
  73 R4 = R2 - R4 (NS);
  74 R5 = R2 - R5 (NS);
  75 R6 = R2 - R6 (NS);
  76 R7 = R2 - R7 (NS);
  77 CHECKREG r0, 0x59E4CC04;
  78 CHECKREG r1, 0x0C82A9F8;
  79 CHECKREG r2, 0x00000000;
  80 CHECKREG r3, 0xB99938E9;
  81 CHECKREG r4, 0xAA9876E5;
  82 CHECKREG r5, 0x987654E3;
  83 CHECKREG r6, 0x8BBBAA4B;
  84 CHECKREG r7, 0x79998885;
  85
  86 imm32 r0, 0x65678911;
  87 imm32 r1, 0x7289ab1d;
  88 imm32 r2, 0x84345515;
  89 imm32 r3, 0x96647717;
  90 imm32 r4, 0x5567591b;
  91 imm32 r5, 0x6789a61d;
  92 imm32 r6, 0x744d5515;
  93 imm32 r7, 0x8666b777;
  94 R0 = R3 - R0 (NS);
  95 R1 = R3 - R1 (NS);
  96 R2 = R3 - R2 (NS);
  97 R3 = R3 - R3 (NS);
  98 R4 = R3 - R4 (NS);
  99 R5 = R3 - R5 (NS);
 100 R6 = R3 - R6 (NS);
 101 R7 = R3 - R7 (NS);
 102 CHECKREG r0, 0x30FCEE06;
 103 CHECKREG r1, 0x23DACBFA;
 104 CHECKREG r2, 0x12302202;
 105 CHECKREG r3, 0x00000000;
 106 CHECKREG r4, 0xAA98A6E5;
 107 CHECKREG r5, 0x987659E3;
 108 CHECKREG r6, 0x8BB2AAEB;
 109 CHECKREG r7, 0x79994889;
 110
 111 imm32 r0, 0x15678911;
 112 imm32 r1, 0x2789ab1d;
 113 imm32 r2, 0x34445515;
 114 imm32 r3, 0x46667717;
 115 imm32 r4, 0x5567891b;
 116 imm32 r5, 0x6789ab1d;
 117 imm32 r6, 0x74445515;
 118 imm32 r7, 0x86667777;
 119 R0 = R4 - R0 (NS);
 120 R1 = R4 - R1 (NS);
 121 R2 = R4 - R2 (NS);
 122 R3 = R4 - R3 (NS);
 123 R4 = R4 - R4 (NS);
 124 R5 = R4 - R5 (NS);
 125 R6 = R4 - R6 (NS);
 126 R7 = R4 - R7 (NS);
 127 CHECKREG r0, 0x4000000A;
 128 CHECKREG r1, 0x2DDDDDFE;
 129 CHECKREG r2, 0x21233406;
 130 CHECKREG r3, 0x0F011204;
 131 CHECKREG r4, 0x00000000;
 132 CHECKREG r5, 0x987654E3;
 133 CHECKREG r6, 0x8BBBAAEB;
 134 CHECKREG r7, 0x79998889;
 135
 136 imm32 r0, 0x95678911;
 137 imm32 r1, 0x8789ab1d;
 138 imm32 r2, 0x74445515;
 139 imm32 r3, 0x36667717;
 140 imm32 r4, 0x3567891b;
 141 imm32 r5, 0x6e89ab1d;
 142 imm32 r6, 0x74e45515;
 143 imm32 r7, 0x866e7777;
 144 R0 = R5 - R0 (NS);
 145 R1 = R5 - R1 (NS);
 146 R2 = R5 - R2 (NS);
 147 R3 = R5 - R3 (NS);
 148 R4 = R5 - R4 (NS);
 149 R5 = R5 - R5 (NS);
 150 R6 = R5 - R6 (NS);
 151 R7 = R5 - R7 (NS);
 152 CHECKREG r0, 0xD922220C;
 153 CHECKREG r1, 0xE7000000;
 154 CHECKREG r2, 0xFA455608;
 155 CHECKREG r3, 0x38233406;
 156 CHECKREG r4, 0x39222202;
 157 CHECKREG r5, 0x00000000;
 158 CHECKREG r6, 0x8B1BAAEB;
 159 CHECKREG r7, 0x79918889;
 160
 161 imm32 r0, 0x5a678911;
 162 imm32 r1, 0x67c9ab1d;
 163 imm32 r2, 0x744d5515;
 164 imm32 r3, 0x8666b717;
 165 imm32 r4, 0x9567891b;
 166 imm32 r5, 0x6789db1d;
 167 imm32 r6, 0x74445f15;
 168 imm32 r7, 0x866677f7;
 169 R0 = R6 - R0 (NS);
 170 R1 = R6 - R1 (NS);
 171 R2 = R6 - R2 (NS);
 172 R3 = R6 - R3 (NS);
 173 R4 = R6 - R4 (NS);
 174 R5 = R6 - R5 (NS);
 175 R6 = R6 - R6 (NS);
 176 R7 = R6 - R7 (NS);
 177 CHECKREG r0, 0x19DCD604;
 178 CHECKREG r1, 0x0C7AB3F8;
 179 CHECKREG r2, 0xFFF70A00;
 180 CHECKREG r3, 0xEDDDA7FE;
 181 CHECKREG r4, 0xDEDCD5FA;
 182 CHECKREG r5, 0x0CBA83F8;
 183 CHECKREG r6, 0x00000000;
 184 CHECKREG r7, 0x79998809;
 185
 186 imm32 r0, 0x25678911;
 187 imm32 r1, 0x2389ab1d;
 188 imm32 r2, 0x3a455515;
 189 imm32 r3, 0x46d66717;
 190 imm32 r4, 0x556b891b;
 191 imm32 r5, 0x6789cb1d;
 192 imm32 r6, 0x74445515;
 193 imm32 r7, 0x86667777;
 194 R0 = R7 - R0 (NS);
 195 R1 = R7 - R1 (NS);
 196 R2 = R7 - R2 (NS);
 197 R3 = R7 - R3 (NS);
 198 R4 = R7 - R4 (NS);
 199 R5 = R7 - R5 (NS);
 200 R6 = R7 - R6 (NS);
 201 R7 = R7 - R7 (NS);
 202 CHECKREG r0, 0x60FEEE66;
 203 CHECKREG r1, 0x62DCCC5A;
 204 CHECKREG r2, 0x4C212262;
 205 CHECKREG r3, 0x3F901060;
 206 CHECKREG r4, 0x30FAEE5C;
 207 CHECKREG r5, 0x1EDCAC5A;
 208 CHECKREG r6, 0x12222262;
 209 CHECKREG r7, 0x00000000;
 210
 211 imm32 r0, 0xd5678911;
 212 imm32 r1, 0x2e89ab1d;
 213 imm32 r2, 0x34f45515;
 214 imm32 r3, 0x466b7717;
 215 imm32 r4, 0x5567c91b;
 216 imm32 r5, 0x6789ab1d;
 217 imm32 r6, 0x74445115;
 218 imm32 r7, 0x866a7d77;
 219 R3 = R1 - R4 (S);
 220 R7 = R4 - R6 (S);
 221 R2 = R7 - R7 (S);
 222 R4 = R5 - R0 (S);
 223 R5 = R3 - R1 (S);
 224 R6 = R2 - R3 (S);
 225 R0 = R0 - R2 (S);
 226 R1 = R6 - R5 (S);
 227 CHECKREG r0, 0xD5678911;
 228 CHECKREG r1, 0x7C45E719;
 229 CHECKREG r2, 0x00000000;
 230 CHECKREG r3, 0xD921E202;
 231 CHECKREG r4, 0x7FFFFFFF;
 232 CHECKREG r5, 0xAA9836E5;
 233 CHECKREG r6, 0x26DE1DFE;
 234 CHECKREG r7, 0xE1237806;
 235
 236 imm32 r0, 0x15678911;
 237 imm32 r1, 0x2789ab1d;
 238 imm32 r2, 0x34445515;
 239 imm32 r3, 0x46667717;
 240 imm32 r4, 0x5567891b;
 241 imm32 r5, 0x6789ab1d;
 242 imm32 r6, 0x74445515;
 243 imm32 r7, 0x86667777;
 244 R3 = R3 - R3 (S);
 245 R1 = R7 - R6 (S);
 246 R4 = R1 - R2 (S);
 247 R7 = R4 - R0 (S);
 248 R5 = R6 - R4 (S);
 249 R2 = R5 - R5 (S);
 250 R6 = R2 - R1 (S);
 251 R0 = R0 - R7 (S);
 252 CHECKREG r0, 0x7FFFFFFF;
 253 CHECKREG r1, 0x80000000;
 254 CHECKREG r2, 0x00000000;
 255 CHECKREG r3, 0x00000000;
 256 CHECKREG r4, 0x80000000;
 257 CHECKREG r5, 0x7FFFFFFF;
 258 CHECKREG r6, 0x7FFFFFFF;
 259 CHECKREG r7, 0x80000000;
 260
 261
 262 pass