sim/testsuite/sim/bfin/c_dsp32alu_alhwx.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_alhwx/c_dsp32alu_alhwx.dsp
   2 // Spec Reference: dsp32alu alhwx
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         R0 = 0;
   9         ASTAT = R0;
  10         A1 = A0 = 0;
  11
  12         imm32 r0, 0xa5678911;
  13         imm32 r1, 0xaa89ab1d;
  14         imm32 r2, 0xd4b45515;
  15         imm32 r3, 0xf66e7717;
  16         imm32 r4, 0xe567f91b;
  17         imm32 r5, 0x6789ae1d;
  18         imm32 r6, 0xb4445515;
  19         imm32 r7, 0x8666a7d7;
  20         A0.L = R0.L;
  21         A0.H = R0.H;
  22         A0.x = R1.L;
  23         R7 = A0.w;
  24         R6 = A0.x;
  25         R5.L = A0.x;
  26         A1.L = R4.L;
  27         A1.H = R4.H;
  28         A1.x = R3.L;
  29         R0 = A1.w;
  30         R1 = A1.x;
  31         R2.L = A1.x;
  32         CHECKREG r0, 0xE567F91B;
  33         CHECKREG r1, 0x00000017;
  34         CHECKREG r2, 0xD4B40017;
  35         CHECKREG r3, 0xF66E7717;
  36         CHECKREG r4, 0xE567F91B;
  37         CHECKREG r5, 0x6789001D;
  38         CHECKREG r6, 0x0000001D;
  39         CHECKREG r7, 0xA5678911;
  40
  41         imm32 r0, 0xe5678911;
  42         imm32 r1, 0xaa89ab1d;
  43         imm32 r2, 0xdfb45515;
  44         imm32 r3, 0xf66e7717;
  45         imm32 r4, 0xe5d7f91b;
  46         imm32 r5, 0x67e9ae1d;
  47         imm32 r6, 0xb4445515;
  48         imm32 r7, 0x866aa7b7;
  49         A0.L = R1.L;
  50         A0.H = R1.H;
  51         A0.x = R2.L;
  52         R5 = A0.w;
  53         R7 = A0.x;
  54         R6.L = A0.x;
  55         A1.L = R3.L;
  56         A1.H = R3.H;
  57         A1.x = R4.L;
  58         R1 = A1.w;
  59         R2 = A1.x;
  60         R0.L = A1.x;
  61         CHECKREG r0, 0xE567001B;
  62         CHECKREG r1, 0xF66E7717;
  63         CHECKREG r2, 0x0000001B;
  64         CHECKREG r3, 0xF66E7717;
  65         CHECKREG r4, 0xE5D7F91B;
  66         CHECKREG r5, 0xAA89AB1D;
  67         CHECKREG r6, 0xB4440015;
  68         CHECKREG r7, 0x00000015;
  69
  70         imm32 r0, 0x35678911;
  71         imm32 r1, 0xa489ab1d;
  72         imm32 r2, 0xd4545515;
  73         imm32 r3, 0xf6667717;
  74         imm32 r4, 0x9567f91b;
  75         imm32 r5, 0x6a89ae1d;
  76         imm32 r6, 0xb4445515;
  77         imm32 r7, 0x8666a7d7;
  78         A0.L = R3.L;
  79         A0.H = R3.H;
  80         A0.x = R4.L;
  81         R0 = A0.w;
  82         R1 = A0.x;
  83         R2.L = A0.x;
  84         A1.L = R5.L;
  85         A1.H = R6.H;
  86         A1.x = R7.L;
  87         R7 = A1.w;
  88         R5 = A1.x;
  89         R5.L = A1.x;
  90         CHECKREG r0, 0xF6667717;
  91         CHECKREG r1, 0x0000001B;
  92         CHECKREG r2, 0xD454001B;
  93         CHECKREG r3, 0xF6667717;
  94         CHECKREG r4, 0x9567F91B;
  95         CHECKREG r5, 0xffffffD7;
  96         CHECKREG r6, 0xB4445515;
  97         CHECKREG r7, 0xB444AE1D;
  98
  99         imm32 r0, 0xd5678911;
 100         imm32 r1, 0x2a89ab1d;
 101         imm32 r2, 0xd3b45515;
 102         imm32 r3, 0xf66e7717;
 103         imm32 r4, 0xe5d7f91b;
 104         imm32 r5, 0x67e9ae1d;
 105         imm32 r6, 0xb4445515;
 106         imm32 r7, 0x889aa7b7;
 107         A0.L = R4.L;
 108         A0.H = R5.H;
 109         A0.x = R6.L;
 110         R1 = A0.w;
 111         R2 = A0.x;
 112         R3.L = A0.x;
 113         A1.L = R0.L;
 114         A1.H = R0.H;
 115         A1.x = R7.L;
 116         R4 = A1.w;
 117         R5 = A1.x;
 118         R6.L = A1.x;
 119         CHECKREG r0, 0xD5678911;
 120         CHECKREG r1, 0x67E9F91B;
 121         CHECKREG r2, 0x00000015;
 122         CHECKREG r3, 0xF66E0015;
 123         CHECKREG r4, 0xD5678911;
 124         CHECKREG r5, 0xffffffB7;
 125         CHECKREG r6, 0xB444ffB7;
 126         CHECKREG r7, 0x889AA7B7;
 127
 128         pass