sim/testsuite/sim/bfin/c_ccflag_pr_imm3.s

   1 //Original:/testcases/core/c_ccflag_pr_imm3/c_ccflag_pr_imm3.dsp
   2 // Spec Reference: ccflag pr-imm3
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9 INIT_R_REGS 0;
  10
  11 //imm32 p0, 0x00000001;
  12 imm32 p1, 0x00000001;
  13 imm32 p2, 0x00000002;
  14 imm32 p3, 0x00000003;
  15 imm32 p4, 0x00000001;
  16 imm32 p5, 0x00000002;
  17 imm32 sp, 0x00000003;
  18 imm32 fp, 0x00000003;
  19
  20 R0 = 0;
  21 ASTAT = R0;
  22 // positive dreg EQUAL to positive imm3
  23 CC = P1 == 1;
  24 R0 = ASTAT;
  25 CC = P1 < 1;
  26 R1 = ASTAT;
  27 CC = P1 <= 1;
  28 R2 = ASTAT;
  29 CC = P2 == 2;
  30 R3 = ASTAT;
  31 CC = P2 < 2;
  32 R4 = ASTAT;
  33 CC = P2 <= 2;
  34 R5 = ASTAT;
  35 CHECKREG r0, 0x00000020;
  36 CHECKREG r1, 0x00000000;
  37 CHECKREG r2, 0x00000020;
  38 CHECKREG r3, 0x00000020;
  39 CHECKREG r4, 0x00000000;
  40 CHECKREG r5, 0x00000020;
  41
  42 CC = P3 == 3;
  43 R0 = ASTAT;
  44 CC = P3 < 3;
  45 R1 = ASTAT;
  46 CC = P3 <= 3;
  47 R2 = ASTAT;
  48 CC = P4 == 1;
  49 R3 = ASTAT;
  50 CC = P4 < 1;
  51 R4 = ASTAT;
  52 CC = P4 <= 1;
  53 R5 = ASTAT;
  54 CHECKREG r0, 0x00000020;
  55 CHECKREG r1, 0x00000000;
  56 CHECKREG r2, 0x00000020;
  57 CHECKREG r3, 0x00000020;
  58 CHECKREG r4, 0x00000000;
  59 CHECKREG r5, 0x00000020;
  60
  61 CC = P5 == 2;
  62 R0 = ASTAT;
  63 CC = P5 < 2;
  64 R1 = ASTAT;
  65 CC = P5 <= 2;
  66 R2 = ASTAT;
  67 CC = SP == 3;
  68 R3 = ASTAT;
  69 CC = SP < 3;
  70 R4 = ASTAT;
  71 CC = SP <= 3;
  72 R5 = ASTAT;
  73 CHECKREG r0, 0x00000020;
  74 CHECKREG r1, 0x00000000;
  75 CHECKREG r2, 0x00000020;
  76 CHECKREG r3, 0x00000020;
  77 CHECKREG r4, 0x00000000;
  78 CHECKREG r5, 0x00000020;
  79
  80 CC = FP == 3;
  81 R5 = ASTAT;
  82 CC = FP < 3;
  83 R6 = ASTAT;
  84 CC = FP <= 3;
  85 R7 = ASTAT;
  86 CHECKREG r5, 0x00000020;
  87 CHECKREG r6, 0x00000000;
  88 CHECKREG r7, 0x00000020;
  89
  90 // positive dreg GREATER than positive imm3
  91 imm32 p1, 0x00000002;
  92 imm32 p2, 0x00000002;
  93 imm32 p3, 0x00000003;
  94 imm32 p4, 0x00000002;
  95 imm32 p5, 0x00000002;
  96 imm32 sp, 0x00000003;
  97 imm32 fp, 0x00000003;
  98 CC = P1 == 0;
  99 R0 = ASTAT;
 100 CC = P1 < 0;
 101 R1 = ASTAT;
 102 CC = P1 <= 0;
 103 R2 = ASTAT;
 104 CC = P2 == 1;
 105 R3 = ASTAT;
 106 CC = P2 < 1;
 107 R4 = ASTAT;
 108 CC = P2 <= 1;
 109 R5 = ASTAT;
 110 CHECKREG r0, 0x00000000;
 111 CHECKREG r1, 0x00000000;
 112 CHECKREG r2, 0x00000000;
 113 CHECKREG r3, 0x00000000;
 114 CHECKREG r4, 0x00000000;
 115 CHECKREG r5, 0x00000000;
 116
 117 CC = P3 == 2;
 118 R0 = ASTAT;
 119 CC = P3 < 2;
 120 R1 = ASTAT;
 121 CC = P3 <= 2;
 122 R2 = ASTAT;
 123 CC = P4 == 0;
 124 R3 = ASTAT;
 125 CC = P4 < 0;
 126 R4 = ASTAT;
 127 CC = P4 <= 0;
 128 R5 = ASTAT;
 129 CHECKREG r0, 0x00000000;
 130 CHECKREG r1, 0x00000000;
 131 CHECKREG r2, 0x00000000;
 132 CHECKREG r3, 0x00000000;
 133 CHECKREG r4, 0x00000000;
 134 CHECKREG r5, 0x00000000;
 135
 136 CC = P5 == 1;
 137 R0 = ASTAT;
 138 CC = P5 < 1;
 139 R1 = ASTAT;
 140 CC = P5 <= 1;
 141 R2 = ASTAT;
 142 CC = SP == 2;
 143 R3 = ASTAT;
 144 CC = SP < 2;
 145 R4 = ASTAT;
 146 CC = SP <= 2;
 147 R5 = ASTAT;
 148 CHECKREG r0, 0x00000000;
 149 CHECKREG r1, 0x00000000;
 150 CHECKREG r2, 0x00000000;
 151 CHECKREG r3, 0x00000000;
 152 CHECKREG r4, 0x00000000;
 153 CHECKREG r5, 0x00000000;
 154
 155 CC = FP == 2;
 156 R5 = ASTAT;
 157 CC = FP < 2;
 158 R6 = ASTAT;
 159 CC = FP <= 2;
 160 R7 = ASTAT;
 161 CHECKREG r5, 0x00000000;
 162 CHECKREG r6, 0x00000000;
 163 CHECKREG r7, 0x00000000;
 164
 165 // positive dreg LESS than positive imm3
 166 imm32 p1, 0x00000001;
 167 imm32 p2, 0x00000002;
 168 imm32 p3, 0x00000002;
 169 imm32 p4, 0x00000001;
 170 imm32 p5, 0x00000001;
 171 imm32 sp, 0x00000002;
 172 imm32 fp, 0x00000002;
 173 CC = P1 == 2;
 174 R0 = ASTAT;
 175 CC = P1 < 2;
 176 R1 = ASTAT;
 177 CC = P1 <= 2;
 178 R2 = ASTAT;
 179 CC = P2 == 3;
 180 R3 = ASTAT;
 181 CC = P2 < 3;
 182 R4 = ASTAT;
 183 CC = P2 <= 3;
 184 R5 = ASTAT;
 185 CHECKREG r0, 0x00000000;
 186 CHECKREG r1, 0x00000020;
 187 CHECKREG r2, 0x00000020;
 188 CHECKREG r3, 0x00000000;
 189 CHECKREG r4, 0x00000020;
 190 CHECKREG r5, 0x00000020;
 191
 192 CC = P3 == 3;
 193 R0 = ASTAT;
 194 CC = P3 < 3;
 195 R1 = ASTAT;
 196 CC = P3 <= 3;
 197 R2 = ASTAT;
 198 CC = P4 == 3;
 199 R3 = ASTAT;
 200 CC = P4 < 3;
 201 R4 = ASTAT;
 202 CC = P4 <= 3;
 203 R5 = ASTAT;
 204 CHECKREG r0, 0x00000000;
 205 CHECKREG r1, 0x00000020;
 206 CHECKREG r2, 0x00000020;
 207 CHECKREG r3, 0x00000000;
 208 CHECKREG r4, 0x00000020;
 209 CHECKREG r5, 0x00000020;
 210
 211 CC = P5 == 3;
 212 R0 = ASTAT;
 213 CC = P5 < 3;
 214 R1 = ASTAT;
 215 CC = P5 <= 3;
 216 R2 = ASTAT;
 217 CC = SP == 3;
 218 R3 = ASTAT;
 219 CC = SP < 3;
 220 R4 = ASTAT;
 221 CC = SP <= 3;
 222 R5 = ASTAT;
 223 CHECKREG r0, 0x00000000;
 224 CHECKREG r1, 0x00000020;
 225 CHECKREG r2, 0x00000020;
 226 CHECKREG r3, 0x00000000;
 227 CHECKREG r4, 0x00000020;
 228 CHECKREG r5, 0x00000020;
 229
 230 CC = FP == 3;
 231 R5 = ASTAT;
 232 CC = FP < 3;
 233 R6 = ASTAT;
 234 CC = FP <= 3;
 235 R7 = ASTAT;
 236 CHECKREG r5, 0x00000000;
 237 CHECKREG r6, 0x00000020;
 238 CHECKREG r7, 0x00000020;
 239
 240
 241 // positive dreg GREATER than neg imm3
 242 CC = P1 == -1;
 243 R0 = ASTAT;
 244 CC = P1 < -1;
 245 R1 = ASTAT;
 246 CC = P1 <= -1;
 247 R2 = ASTAT;
 248 CC = P2 == -2;
 249 R3 = ASTAT;
 250 CC = P2 < -2;
 251 R4 = ASTAT;
 252 CC = P2 <= -2;
 253 R5 = ASTAT;
 254 CHECKREG r0, 0x00000000;
 255 CHECKREG r1, 0x00000000;
 256 CHECKREG r2, 0x00000000;
 257 CHECKREG r3, 0x00000000;
 258 CHECKREG r4, 0x00000000;
 259 CHECKREG r5, 0x00000000;
 260
 261 CC = P3 == -3;
 262 R0 = ASTAT;
 263 CC = P3 < -3;
 264 R1 = ASTAT;
 265 CC = P3 <= -3;
 266 R2 = ASTAT;
 267 CC = P4 == -4;
 268 R3 = ASTAT;
 269 CC = P4 < -4;
 270 R4 = ASTAT;
 271 CC = P4 <= -4;
 272 R5 = ASTAT;
 273 CHECKREG r0, 0x00000000;
 274 CHECKREG r1, 0x00000000;
 275 CHECKREG r2, 0x00000000;
 276 CHECKREG r3, 0x00000000;
 277 CHECKREG r4, 0x00000000;
 278 CHECKREG r5, 0x00000000;
 279
 280 CC = P5 == -1;
 281 R0 = ASTAT;
 282 CC = P5 < -1;
 283 R1 = ASTAT;
 284 CC = P5 <= -1;
 285 R2 = ASTAT;
 286 CC = SP == -2;
 287 R3 = ASTAT;
 288 CC = SP < -2;
 289 R4 = ASTAT;
 290 CC = SP <= -2;
 291 R5 = ASTAT;
 292 CHECKREG r0, 0x00000000;
 293 CHECKREG r1, 0x00000000;
 294 CHECKREG r2, 0x00000000;
 295 CHECKREG r3, 0x00000000;
 296 CHECKREG r4, 0x00000000;
 297 CHECKREG r5, 0x00000000;
 298
 299 CC = FP == -4;
 300 R5 = ASTAT;
 301 CC = FP < -4;
 302 R6 = ASTAT;
 303 CC = FP <= -4;
 304 R7 = ASTAT;
 305 CHECKREG r5, 0x00000000;
 306 CHECKREG r6, 0x00000000;
 307 CHECKREG r7, 0x00000000;
 308
 309
 310
 311 imm32 p1, -1;
 312 imm32 p2, -2;
 313 imm32 p3, -3;
 314 imm32 p4, -4;
 315 imm32 p5, -1;
 316 imm32 sp, -2;
 317 imm32 fp, -3;
 318 // negative dreg equal negative imm3
 319 CC = P1 == -1;
 320 R0 = ASTAT;
 321 CC = P1 < -1;
 322 R1 = ASTAT;
 323 CC = P1 <= -1;
 324 R2 = ASTAT;
 325 CC = P2 == -2;
 326 R3 = ASTAT;
 327 CC = P2 < -2;
 328 R4 = ASTAT;
 329 CC = P2 <= -2;
 330 R5 = ASTAT;
 331 CHECKREG r0, 0x00000020;
 332 CHECKREG r1, 0x00000000;
 333 CHECKREG r2, 0x00000020;
 334 CHECKREG r3, 0x00000020;
 335 CHECKREG r4, 0x00000000;
 336 CHECKREG r5, 0x00000020;
 337
 338 CC = P3 == -3;
 339 R0 = ASTAT;
 340 CC = P3 < -3;
 341 R1 = ASTAT;
 342 CC = P3 <= -3;
 343 R2 = ASTAT;
 344 CC = P4 == -4;
 345 R3 = ASTAT;
 346 CC = P4 < -4;
 347 R4 = ASTAT;
 348 CC = P4 <= -4;
 349 R5 = ASTAT;
 350 CHECKREG r0, 0x00000020;
 351 CHECKREG r1, 0x00000000;
 352 CHECKREG r2, 0x00000020;
 353 CHECKREG r3, 0x00000020;
 354 CHECKREG r4, 0x00000000;
 355 CHECKREG r5, 0x00000020;
 356
 357 CC = P5 == -1;
 358 R0 = ASTAT;
 359 CC = P5 < -1;
 360 R1 = ASTAT;
 361 CC = P5 <= -1;
 362 R2 = ASTAT;
 363 CC = SP == -2;
 364 R3 = ASTAT;
 365 CC = SP < -2;
 366 R4 = ASTAT;
 367 CC = SP <= -2;
 368 R5 = ASTAT;
 369 CHECKREG r0, 0x00000020;
 370 CHECKREG r1, 0x00000000;
 371 CHECKREG r2, 0x00000020;
 372 CHECKREG r3, 0x00000020;
 373 CHECKREG r4, 0x00000000;
 374 CHECKREG r5, 0x00000020;
 375
 376 CC = FP == -3;
 377 R5 = ASTAT;
 378 CC = FP < -3;
 379 R6 = ASTAT;
 380 CC = FP <= -3;
 381 R7 = ASTAT;
 382 CHECKREG r5, 0x00000020;
 383 CHECKREG r6, 0x00000000;
 384 CHECKREG r7, 0x00000020;
 385
 386
 387 // negative dreg GREATER neg imm3
 388 imm32 p1, -1;
 389 imm32 p2, -1;
 390 imm32 p3, -2;
 391 imm32 p4, -3;
 392 imm32 p5, -1;
 393 imm32 sp, -2;
 394 imm32 fp, -3;
 395 CC = P1 == -2;
 396 R0 = ASTAT;
 397 CC = P1 < -2;
 398 R1 = ASTAT;
 399 CC = P1 <= -2;
 400 R2 = ASTAT;
 401 CC = P2 == -3;
 402 R3 = ASTAT;
 403 CC = P2 < -3;
 404 R4 = ASTAT;
 405 CC = P2 <= -3;
 406 R5 = ASTAT;
 407 CHECKREG r0, 0x00000000;
 408 CHECKREG r1, 0x00000000;
 409 CHECKREG r2, 0x00000000;
 410 CHECKREG r3, 0x00000000;
 411 CHECKREG r4, 0x00000000;
 412 CHECKREG r5, 0x00000000;
 413
 414 CC = P3 == -4;
 415 R0 = ASTAT;
 416 CC = P3 < -4;
 417 R1 = ASTAT;
 418 CC = P3 <= -4;
 419 R2 = ASTAT;
 420 CC = P4 == -4;
 421 R3 = ASTAT;
 422 CC = P4 < -4;
 423 R4 = ASTAT;
 424 CC = P4 <= -4;
 425 R5 = ASTAT;
 426 CHECKREG r0, 0x00000000;
 427 CHECKREG r1, 0x00000000;
 428 CHECKREG r2, 0x00000000;
 429 CHECKREG r3, 0x00000000;
 430 CHECKREG r4, 0x00000000;
 431 CHECKREG r5, 0x00000000;
 432
 433 CC = P5 == -2;
 434 R0 = ASTAT;
 435 CC = P5 < -2;
 436 R1 = ASTAT;
 437 CC = P5 <= -2;
 438 R2 = ASTAT;
 439 CC = SP == -3;
 440 R3 = ASTAT;
 441 CC = SP < -3;
 442 R4 = ASTAT;
 443 CC = SP <= -3;
 444 R5 = ASTAT;
 445 CHECKREG r0, 0x00000000;
 446 CHECKREG r1, 0x00000000;
 447 CHECKREG r2, 0x00000000;
 448 CHECKREG r3, 0x00000000;
 449 CHECKREG r4, 0x00000000;
 450 CHECKREG r5, 0x00000000;
 451
 452 CC = FP == -4;
 453 R5 = ASTAT;
 454 CC = FP < -4;
 455 R6 = ASTAT;
 456 CC = FP <= -4;
 457 R7 = ASTAT;
 458 CHECKREG r5, 0x00000000;
 459 CHECKREG r6, 0x00000000;
 460 CHECKREG r7, 0x00000000;
 461
 462 // negative dreg LESS than neg imm3
 463 imm32 p1, -2;
 464 imm32 p2, -2;
 465 imm32 p3, -3;
 466 imm32 p4, -3;
 467 imm32 p5, -4;
 468 imm32 sp, -4;
 469 imm32 fp, -4;
 470 imm32 p4, -4;
 471 CC = P1 == -1;
 472 R0 = ASTAT;
 473 CC = P1 < -1;
 474 R1 = ASTAT;
 475 CC = P1 <= -1;
 476 R2 = ASTAT;
 477 CC = P2 == -1;
 478 R3 = ASTAT;
 479 CC = P2 < -1;
 480 R4 = ASTAT;
 481 CC = P2 <= -1;
 482 R5 = ASTAT;
 483 CHECKREG r0, 0x00000000;
 484 CHECKREG r1, 0x00000020;
 485 CHECKREG r2, 0x00000020;
 486 CHECKREG r3, 0x00000000;
 487 CHECKREG r4, 0x00000020;
 488 CHECKREG r5, 0x00000020;
 489
 490 CC = P3 == -2;
 491 R0 = ASTAT;
 492 CC = P3 < -2;
 493 R1 = ASTAT;
 494 CC = P3 <= -2;
 495 R2 = ASTAT;
 496 CC = P4 == -2;
 497 R3 = ASTAT;
 498 CC = P4 < -2;
 499 R4 = ASTAT;
 500 CC = P4 <= -2;
 501 R5 = ASTAT;
 502 CHECKREG r0, 0x00000000;
 503 CHECKREG r1, 0x00000020;
 504 CHECKREG r2, 0x00000020;
 505 CHECKREG r3, 0x00000000;
 506 CHECKREG r4, 0x00000020;
 507 CHECKREG r5, 0x00000020;
 508
 509 CC = P5 == -3;
 510 R0 = ASTAT;
 511 CC = P5 < -3;
 512 R1 = ASTAT;
 513 CC = P5 <= -3;
 514 R2 = ASTAT;
 515 CC = SP == -3;
 516 R3 = ASTAT;
 517 CC = SP < -3;
 518 R4 = ASTAT;
 519 CC = SP <= -3;
 520 R5 = ASTAT;
 521 CHECKREG r0, 0x00000000;
 522 CHECKREG r1, 0x00000020;
 523 CHECKREG r2, 0x00000020;
 524 CHECKREG r3, 0x00000000;
 525 CHECKREG r4, 0x00000020;
 526 CHECKREG r5, 0x00000020;
 527
 528 CC = FP == -3;
 529 R5 = ASTAT;
 530 CC = FP < -3;
 531 R6 = ASTAT;
 532 CC = FP <= -3;
 533 R7 = ASTAT;
 534 CHECKREG r5, 0x00000000;
 535 CHECKREG r6, 0x00000020;
 536 CHECKREG r7, 0x00000020;
 537
 538
 539 pass