1 /* Disassemble V850 instructions.
2 Copyright 1996, 1997, 1998, 2000, 2001, 2002, 2003, 2005, 2007, 2010,
3 2012 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
25 #include "opcode/v850.h"
29 static const char *const v850_reg_names[] =
31 "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7",
32 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
33 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
34 "r24", "r25", "r26", "r27", "r28", "r29", "ep", "lp"
37 static const char *const v850_sreg_names[] =
39 "eipc/vip/mpm", "eipsw/mpc", "fepc/tid", "fepsw/ppa", "ecr/vmecr", "psw/vmtid",
40 "sr6/fpsr/vmadr/dcc", "sr7/fpepc/dc0",
41 "sr8/fpst/vpecr/dcv1", "sr9/fpcc/vptid", "sr10/fpcfg/vpadr/spal", "sr11/spau",
42 "sr12/vdecr/ipa0l", "eiic/vdtid/ipa0u", "feic/ipa1l", "dbic/ipa1u",
43 "ctpc/ipa2l", "ctpsw/ipa2u", "dbpc/ipa3l", "dbpsw/ipa3u", "ctbp/dpa0l",
44 "dir/dpa0u", "bpc/dpa0u", "asid/dpa1l",
45 "bpav/dpa1u", "bpam/dpa2l", "bpdv/dpa2u", "bpdm/dpa3l", "eiwr/dpa3u",
46 "fewr", "dbwr", "bsel"
49 static const char *const v850_cc_names[] =
51 "v", "c/l", "z", "nh", "s/n", "t", "lt", "le",
52 "nv", "nc/nl", "nz", "h", "ns/p", "sa", "ge", "gt"
55 static const char *const v850_float_cc_names[] =
57 "f/t", "un/or", "eq/neq", "ueq/ogl", "olt/uge", "ult/oge", "ole/ugt", "ule/ogt",
58 "sf/st", "ngle/gle", "seq/sne", "ngl/gl", "lt/nlt", "nge/ge", "le/nle", "ngt/gt"
63 print_value (int flags, bfd_vma memaddr, struct disassemble_info *info, long value)
65 if (flags & V850_PCREL)
67 bfd_vma addr = value + memaddr;
68 info->print_address_func (addr, info);
70 else if (flags & V850_OPERAND_DISP)
72 if (flags & V850_OPERAND_SIGNED)
74 info->fprintf_func (info->stream, "%ld", value);
78 info->fprintf_func (info->stream, "%lu", value);
81 else if (flags & V850E_IMMEDIATE32)
83 info->fprintf_func (info->stream, "0x%lx", value);
87 if (flags & V850_OPERAND_SIGNED)
89 info->fprintf_func (info->stream, "%ld", value);
93 info->fprintf_func (info->stream, "%lu", value);
99 get_operand_value (const struct v850_operand *operand,
103 struct disassemble_info * info,
110 if ((operand->flags & V850E_IMMEDIATE16)
111 || (operand->flags & V850E_IMMEDIATE16HI))
113 int status = info->read_memory_func (memaddr + bytes_read, buffer, 2, info);
117 value = bfd_getl16 (buffer);
119 if (operand->flags & V850E_IMMEDIATE16HI)
126 info->memory_error_func (status, memaddr + bytes_read, info);
131 if (operand->flags & V850E_IMMEDIATE23)
133 int status = info->read_memory_func (memaddr + 2, buffer, 4, info);
137 value = bfd_getl32 (buffer);
139 value = (operand->extract) (value, invalid);
145 info->memory_error_func (status, memaddr + bytes_read, info);
150 if (operand->flags & V850E_IMMEDIATE32)
152 int status = info->read_memory_func (memaddr + bytes_read, buffer, 4, info);
157 value = bfd_getl32 (buffer);
163 info->memory_error_func (status, memaddr + bytes_read, info);
168 if (operand->extract)
169 value = (operand->extract) (insn, invalid);
172 if (operand->bits == -1)
173 value = (insn & operand->shift);
175 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
177 if (operand->flags & V850_OPERAND_SIGNED)
178 value = ((long)(value << (sizeof (long)*8 - operand->bits))
179 >> (sizeof (long)*8 - operand->bits));
187 disassemble (bfd_vma memaddr, struct disassemble_info *info, int bytes_read, unsigned long insn)
189 struct v850_opcode *op = (struct v850_opcode *)v850_opcodes;
190 const struct v850_operand *operand;
192 int target_processor;
198 target_processor = PROCESSOR_V850;
202 target_processor = PROCESSOR_V850E;
205 case bfd_mach_v850e1:
206 target_processor = PROCESSOR_V850E;
209 case bfd_mach_v850e2:
210 target_processor = PROCESSOR_V850E2;
213 case bfd_mach_v850e2v3:
214 target_processor = PROCESSOR_V850E2V3;
218 /* If this is a two byte insn, then mask off the high bits. */
222 /* Find the opcode. */
225 if ((op->mask & insn) == op->opcode
226 && (op->processors & target_processor)
227 && !(op->processors & PROCESSOR_OPTION_ALIAS))
229 /* Code check start. */
230 const unsigned char *opindex_ptr;
234 for (opindex_ptr = op->operands, opnum = 1;
236 opindex_ptr++, opnum++)
241 operand = &v850_operands[*opindex_ptr];
243 value = get_operand_value (operand, insn, bytes_read, memaddr, info, 1, &invalid);
248 if ((operand->flags & V850_NOT_R0) && value == 0 && (op->memop) <=2)
251 if ((operand->flags & V850_NOT_SA) && value == 0xd)
254 if ((operand->flags & V850_NOT_IMM0) && value == 0)
258 /* Code check end. */
261 (*info->fprintf_func) (info->stream, "%s\t", op->name);
263 fprintf (stderr, "match: insn: %lx, mask: %lx, opcode: %lx, name: %s\n",
264 insn, op->mask, op->opcode, op->name );
268 /* Now print the operands.
270 MEMOP is the operand number at which a memory
271 address specification starts, or zero if this
272 instruction has no memory addresses.
274 A memory address is always two arguments.
276 This information allows us to determine when to
277 insert commas into the output stream as well as
278 when to insert disp[reg] expressions onto the
281 for (opindex_ptr = op->operands, opnum = 1;
283 opindex_ptr++, opnum++)
285 bfd_boolean square = FALSE;
290 operand = &v850_operands[*opindex_ptr];
292 value = get_operand_value (operand, insn, bytes_read, memaddr, info, 0, 0);
294 /* The first operand is always output without any
297 For the following arguments:
299 If memop && opnum == memop + 1, then we need '[' since
300 we're about to output the register used in a memory
303 If memop && opnum == memop + 2, then we need ']' since
304 we just finished the register in a memory reference. We
305 also need a ',' before this operand.
307 Else we just need a comma.
309 We may need to output a trailing ']' if the last operand
310 in an instruction is the register for a memory address.
312 The exception (and there's always an exception) are the
313 "jmp" insn which needs square brackets around it's only
314 register argument, and the clr1/not1/set1/tst1 insns
315 which [...] around their second register argument. */
318 if (operand->flags & V850_OPERAND_BANG)
322 else if (operand->flags & V850_OPERAND_PERCENT)
327 if (opnum == 1 && opnum == memop)
329 info->fprintf_func (info->stream, "%s[", prefix);
333 && (v850_operands[*(opindex_ptr - 1)].flags & V850_OPERAND_DISP) != 0
336 info->fprintf_func (info->stream, "%s[", prefix);
340 && ( op->opcode == 0x00e407e0 /* clr1 */
341 || op->opcode == 0x00e207e0 /* not1 */
342 || op->opcode == 0x00e007e0 /* set1 */
343 || op->opcode == 0x00e607e0 /* tst1 */
346 info->fprintf_func (info->stream, ", %s[", prefix);
350 info->fprintf_func (info->stream, ", %s", prefix);
352 /* Extract the flags, ignoring ones which do not effect disassembly output. */
353 flag = operand->flags & (V850_OPERAND_REG
357 | V850E_OPERAND_REG_LIST
359 | V850_OPERAND_FLOAT_CC);
363 case V850_OPERAND_REG: info->fprintf_func (info->stream, "%s", v850_reg_names[value]); break;
364 case (V850_OPERAND_REG|V850_REG_EVEN): info->fprintf_func (info->stream, "%s", v850_reg_names[value*2]); break;
365 case V850_OPERAND_EP: info->fprintf_func (info->stream, "ep"); break;
366 case V850_OPERAND_SRG: info->fprintf_func (info->stream, "%s", v850_sreg_names[value]); break;
368 case V850E_OPERAND_REG_LIST:
370 static int list12_regs[32] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
371 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
374 unsigned long int mask = 0;
378 switch (operand->shift)
380 case 0xffe00001: regs = list12_regs; break;
382 /* xgettext:c-format */
383 fprintf (stderr, _("unknown operand shift: %x\n"), operand->shift );
387 for (i = 0; i < 32; i++)
389 if (value & (1 << i))
393 default: mask |= (1 << regs[ i ]); break;
394 /* xgettext:c-format */
395 case 0: fprintf (stderr, _("unknown reg: %d\n"), i ); abort ();
396 case -1: pc = 1; break;
401 info->fprintf_func (info->stream, "{");
410 for (bit = 0; bit < 32; bit++)
411 if (mask & (1 << bit))
413 unsigned long int first = bit;
414 unsigned long int last;
417 info->fprintf_func (info->stream, ", ");
421 info->fprintf_func (info->stream, "%s", v850_reg_names[first]);
423 for (bit++; bit < 32; bit++)
424 if ((mask & (1 << bit)) == 0)
429 if (last > first + 1)
431 info->fprintf_func (info->stream, " - %s", v850_reg_names[ last - 1 ]);
437 info->fprintf_func (info->stream, "%sPC", mask ? ", " : "");
440 info->fprintf_func (info->stream, "}");
444 case V850_OPERAND_CC: info->fprintf_func (info->stream, "%s", v850_cc_names[value]); break;
445 case V850_OPERAND_FLOAT_CC: info->fprintf_func (info->stream, "%s", v850_float_cc_names[value]); break;
448 print_value (operand->flags, memaddr, info, value);
453 (*info->fprintf_func) (info->stream, "]");
467 print_insn_v850 (bfd_vma memaddr, struct disassemble_info * info)
469 int status, status2, match;
471 int length = 0, code_length = 0;
472 unsigned long insn = 0, insn2 = 0;
473 int target_processor;
479 target_processor = PROCESSOR_V850;
483 target_processor = PROCESSOR_V850E;
486 case bfd_mach_v850e1:
487 target_processor = PROCESSOR_V850E;
490 case bfd_mach_v850e2:
491 target_processor = PROCESSOR_V850E2;
494 case bfd_mach_v850e2v3:
495 target_processor = PROCESSOR_V850E2V3;
499 status = info->read_memory_func (memaddr, buffer, 2, info);
503 info->memory_error_func (status, memaddr, info);
507 insn = bfd_getl16 (buffer);
509 status2 = info->read_memory_func (memaddr+2, buffer, 2 , info);
513 insn2 = bfd_getl16 (buffer);
514 /* fprintf (stderr, "insn2 0x%08lx\n", insn2); */
519 && (target_processor == PROCESSOR_V850E2
520 || target_processor == PROCESSOR_V850E2V3))
522 if ((insn & 0xffff) == 0x02e0 /* jr 32bit */
523 && !status2 && (insn2 & 0x1) == 0)
528 else if ((insn & 0xffe0) == 0x02e0 /* jarl 32bit */
529 && !status2 && (insn2 & 0x1) == 0)
534 else if ((insn & 0xffe0) == 0x06e0 /* jmp 32bit */
535 && !status2 && (insn2 & 0x1) == 0)
543 && target_processor == PROCESSOR_V850E2V3)
545 if (((insn & 0xffe0) == 0x0780 /* ld.b 23bit */
546 && !status2 && (insn2 & 0x000f) == 0x0005)
547 || ((insn & 0xffe0) == 0x07a0 /* ld.bu 23bit */
548 && !status2 && (insn2 & 0x000f) == 0x0005)
549 || ((insn & 0xffe0) == 0x0780 /* ld.h 23bit */
550 && !status2 && (insn2 & 0x000f) == 0x0007)
551 || ((insn & 0xffe0) == 0x07a0 /* ld.hu 23bit */
552 && !status2 && (insn2 & 0x000f) == 0x0007)
553 || ((insn & 0xffe0) == 0x0780 /* ld.w 23bit */
554 && !status2 && (insn2 & 0x000f) == 0x0009))
559 else if (((insn & 0xffe0) == 0x0780 /* st.b 23bit */
560 && !status2 && (insn2 & 0x000f) == 0x000d)
561 || ((insn & 0xffe0) == 0x07a0 /* st.h 23bit */
562 && !status2 && (insn2 & 0x000f) == 0x000d)
563 || ((insn & 0xffe0) == 0x0780 /* st.w 23bit */
564 && !status2 && (insn2 & 0x000f) == 0x000f))
572 && target_processor != PROCESSOR_V850)
574 if ((insn & 0xffe0) == 0x0620) /* 32 bit MOV */
579 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16<<16 */
580 && !status2 && (insn2 & 0x001f) == 0x0013)
585 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm16 */
586 && !status2 && (insn2 & 0x001f) == 0x000b)
591 else if ((insn & 0xffc0) == 0x0780 /* prepare {list}, imm5, imm32 */
592 && !status2 && (insn2 & 0x001f) == 0x001b)
601 && (insn & 0x0600) == 0x0600))
603 /* This is a 4 byte insn. */
604 status = info->read_memory_func (memaddr, buffer, 4, info);
607 insn = bfd_getl32 (buffer);
610 length = code_length = 4;
614 if (code_length > length)
616 status = info->read_memory_func (memaddr + length, buffer, code_length - length, info);
621 if (length == 0 && !status)
622 length = code_length = 2;
627 match = disassemble (memaddr, info, length, insn);
633 status = info->read_memory_func (memaddr, buffer, code_length, info);
635 while (l < code_length)
637 if (code_length - l == 2)
639 insn = bfd_getl16 (buffer + l) & 0xffff;
640 info->fprintf_func (info->stream, ".short\t0x%04lx", insn);
645 insn = bfd_getl32 (buffer + l);
646 info->fprintf_func (info->stream, ".long\t0x%08lx", insn);