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Upload Tizen:Base source
[external/binutils.git]
/
ld
/
testsuite
/
ld-d10v
/
reloc-013.d
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#source: reloc-005.s
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#ld: -T $srcdir/$subdir/reloc-013.ld
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#objdump: -D
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# Test 18 bit pc rel reloc negative normal case
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.*: file format elf32-d10v
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Disassembly of section .text:
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01014000 <foo>:
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...
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01014400 <_start>:
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1014400: e4 00 ff 00 bra.l 1014000 <foo>
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1014404: 26 0d 5e 00 jmp r13 || nop