1 2019-02-02 Nick Clifton <nickc@redhat.com>
5 2018-06-24 Nick Clifton <nickc@redhat.com>
9 2018-10-05 Richard Henderson <rth@twiddle.net>
10 Stafford Horne <shorne@gmail.com>
12 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
13 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
14 (l-mul): Fix overflow support and indentation.
15 (l-mulu): Fix overflow support and indentation.
16 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
17 (l-div); Remove incorrect carry behavior.
18 (l-divu): Fix carry and overflow behavior.
19 (l-mac): Add overflow support.
20 (l-msb, l-msbu): Add carry and overflow support.
22 2018-10-05 Richard Henderson <rth@twiddle.net>
24 * or1k.opc (parse_disp26): Add support for plta() relocations.
25 (parse_disp21): New function.
26 (or1k_rclass): New enum.
27 (or1k_rtype): New enum.
28 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
29 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
30 (parse_imm16): Add support for the new 21bit and 13bit relocations.
31 * or1korbis.cpu (f-disp26): Don't assume SI.
32 (f-disp21): New pc-relative 21-bit 13 shifted to right.
33 (insn-opcode): Add ADRP.
34 (l-adrp): New instruction.
36 2018-10-05 Richard Henderson <rth@twiddle.net>
38 * or1k.opc: Add RTYPE_ enum.
39 (INVALID_STORE_RELOC): New string.
40 (or1k_imm16_relocs): New array array.
41 (parse_reloc): New static function that just does the parsing.
42 (parse_imm16): New static function for generic parsing.
43 (parse_simm16): Change to just call parse_imm16.
44 (parse_simm16_split): New function.
45 (parse_uimm16): Change to call parse_imm16.
46 (parse_uimm16_split): New function.
47 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
48 (uimm16-split): Change to use new uimm16_split.
50 2018-07-24 Alan Modra <amodra@gmail.com>
53 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
55 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
57 * or1kcommon.cpu (spr-reg-info): Typo fix.
59 2018-03-03 Alan Modra <amodra@gmail.com>
61 * frv.opc: Include opintl.h.
62 (add_next_to_vliw): Use opcodes_error_handler to print error.
63 Standardize error message.
64 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
66 2018-01-13 Nick Clifton <nickc@redhat.com>
70 2017-03-15 Stafford Horne <shorne@gmail.com>
72 * or1kcommon.cpu: Add pc set semantics to also update ppc.
74 2016-10-06 Alan Modra <amodra@gmail.com>
76 * mep.opc (expand_string): Add fall through comment.
78 2016-03-03 Alan Modra <amodra@gmail.com>
80 * fr30.cpu (f-m4): Replace bogus comment with a better guess
81 at what is really going on.
83 2016-03-02 Alan Modra <amodra@gmail.com>
85 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
87 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
89 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
90 a constant to better align disassembler output.
92 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
94 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
96 2014-06-12 Alan Modra <amodra@gmail.com>
98 * or1k.opc: Whitespace fixes.
100 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
102 * or1korbis.cpu (h-atomic-reserve): New hardware.
103 (h-atomic-address): Likewise.
104 (insn-opcode): Add opcodes for LWA and SWA.
105 (atomic-reserve): New operand.
106 (atomic-address): Likewise.
107 (l-lwa, l-swa): New instructions.
108 (l-lbs): Fix typo in comment.
109 (store-insn): Clear atomic reserve on store to atomic-address.
110 Fix register names in fmt field.
112 2014-04-22 Christian Svensson <blue@cmd.nu>
114 * openrisc.cpu: Delete.
115 * openrisc.opc: Delete.
116 * or1k.cpu: New file.
117 * or1k.opc: New file.
118 * or1kcommon.cpu: New file.
119 * or1korbis.cpu: New file.
120 * or1korfpx.cpu: New file.
122 2013-12-07 Mike Frysinger <vapier@gentoo.org>
124 * epiphany.opc: Remove +x file mode.
126 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
129 * lm32.cpu (Control and status registers): Add CFG2, PSW,
130 TLBVADDR, TLBPADDR and TLBBADVADDR.
132 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
133 Joern Rennecke <joern.rennecke@embecosm.com>
135 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
136 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
137 (testset-insn): Add NO_DIS attribute to t.l.
138 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
139 (move-insns): Add NO-DIS attribute to cmov.l.
140 (op-mmr-movts): Add NO-DIS attribute to movts.l.
141 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
142 (op-rrr): Add NO-DIS attribute to .l.
143 (shift-rrr): Add NO-DIS attribute to .l.
144 (op-shift-rri): Add NO-DIS attribute to i32.l.
145 (bitrl, movtl): Add NO-DIS attribute.
146 (op-iextrrr): Add NO-DIS attribute to .l
147 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
148 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
150 2012-02-27 Alan Modra <amodra@gmail.com>
152 * mt.opc (print_dollarhex): Trim values to 32 bits.
154 2011-12-15 Nick Clifton <nickc@redhat.com>
156 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
159 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
161 * epiphany.opc (parse_branch_addr): Fix type of valuep.
162 Cast value before printing it as a long.
163 (parse_postindex): Fix type of valuep.
165 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
167 * cpu/epiphany.cpu: New file.
168 * cpu/epiphany.opc: New file.
170 2011-08-22 Nick Clifton <nickc@redhat.com>
172 * fr30.cpu: Newly contributed file.
173 * fr30.opc: Likewise.
174 * ip2k.cpu: Likewise.
175 * ip2k.opc: Likewise.
176 * mep-avc.cpu: Likewise.
177 * mep-avc2.cpu: Likewise.
178 * mep-c5.cpu: Likewise.
179 * mep-core.cpu: Likewise.
180 * mep-default.cpu: Likewise.
181 * mep-ext-cop.cpu: Likewise.
182 * mep-fmax.cpu: Likewise.
183 * mep-h1.cpu: Likewise.
184 * mep-ivc2.cpu: Likewise.
185 * mep-rhcop.cpu: Likewise.
186 * mep-sample-ucidsp.cpu: Likewise.
189 * openrisc.cpu: Likewise.
190 * openrisc.opc: Likewise.
191 * xstormy16.cpu: Likewise.
192 * xstormy16.opc: Likewise.
194 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
196 * frv.opc: #undef DEBUG.
198 2010-07-03 DJ Delorie <dj@delorie.com>
200 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
202 2010-02-11 Doug Evans <dje@sebabeach.org>
204 * m32r.cpu (HASH-PREFIX): Delete.
205 (duhpo, dshpo): New pmacros.
206 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
207 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
208 attribute, define with dshpo.
209 (uimm24): Delete HASH-PREFIX attribute.
210 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
211 (print_signed_with_hash_prefix): New function.
212 (print_unsigned_with_hash_prefix): New function.
213 * xc16x.cpu (dowh): New pmacro.
214 (upof16): Define with dowh, specify print handler.
215 (qbit, qlobit, qhibit): Ditto.
217 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
218 (print_with_dot_prefix): New functions.
219 (print_with_pof_prefix, print_with_pag_prefix): New functions.
221 2010-01-24 Doug Evans <dje@sebabeach.org>
223 * frv.cpu (floating-point-conversion): Update call to fp conv op.
224 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
225 conditional-floating-point-conversion, ne-floating-point-conversion,
226 float-parallel-mul-add-double-semantics): Ditto.
228 2010-01-05 Doug Evans <dje@sebabeach.org>
230 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
231 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
233 2010-01-02 Doug Evans <dje@sebabeach.org>
235 * m32c.opc (parse_signed16): Fix typo.
237 2009-12-11 Nick Clifton <nickc@redhat.com>
239 * frv.opc: Fix shadowed variable warnings.
240 * m32c.opc: Fix shadowed variable warnings.
242 2009-11-14 Doug Evans <dje@sebabeach.org>
244 Must use VOID expression in VOID context.
245 * xc16x.cpu (mov4): Fix mode of `sequence'.
246 (mov9, mov10): Ditto.
247 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
248 (callr, callseg, calls, trap, rets, reti): Ditto.
249 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
250 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
251 (exts, exts1, extsr, extsr1, prior): Ditto.
253 2009-10-23 Doug Evans <dje@sebabeach.org>
255 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
256 cgen-ops.h -> cgen/basic-ops.h.
258 2009-09-25 Alan Modra <amodra@bigpond.net.au>
260 * m32r.cpu (stb-plus): Typo fix.
262 2009-09-23 Doug Evans <dje@sebabeach.org>
264 * m32r.cpu (sth-plus): Fix address mode and calculation.
266 (clrpsw): Fix mask calculation.
267 (bset, bclr, btst): Make mode in bit calculation match expression.
269 * xc16x.cpu (rtl-version): Set to 0.8.
270 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
271 make uppercase. Remove unnecessary name-prefix spec.
272 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
273 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
274 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
275 (h-cr): New hardware.
276 (muls): Comment out parts that won't compile, add fixme.
277 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
278 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
279 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
281 2009-07-16 Doug Evans <dje@sebabeach.org>
283 * cpu/simplify.inc (*): One line doc strings don't need \n.
284 (df): Invoke define-full-ifield instead of claiming it's an alias.
286 (dnop): Mark as deprecated.
288 2009-06-22 Alan Modra <amodra@bigpond.net.au>
290 * m32c.opc (parse_lab_5_3): Use correct enum.
292 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
294 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
295 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
296 (media-arith-sat-semantics): Explicitly sign- or zero-extend
297 arguments of "operation" to DI using "mode" and the new pmacros.
299 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
301 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
304 2008-12-23 Jon Beniston <jon@beniston.com>
306 * lm32.cpu: New file.
307 * lm32.opc: New file.
309 2008-01-29 Alan Modra <amodra@bigpond.net.au>
311 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
314 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
316 * cris.cpu (movs, movu): Use result of extension operation when
319 2007-07-04 Nick Clifton <nickc@redhat.com>
321 * cris.cpu: Update copyright notice to refer to GPLv3.
322 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
323 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
324 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
326 * iq2000.cpu: Fix copyright notice to refer to FSF.
328 2007-04-30 Mark Salter <msalter@sadr.localdomain>
330 * frv.cpu (spr-names): Support new coprocessor SPR registers.
332 2007-04-20 Nick Clifton <nickc@redhat.com>
334 * xc16x.cpu: Restore after accidentally overwriting this file with
337 2007-03-29 DJ Delorie <dj@redhat.com>
339 * m32c.cpu (Imm-8-s4n): Fix print hook.
340 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
341 (arith-jnz-imm4-dst-defn): Make relaxable.
342 (arith-jnz16-imm4-dst-defn): Fix encodings.
344 2007-03-20 DJ Delorie <dj@redhat.com>
346 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
348 (src16-16-20-An-relative-*): New.
349 (dst16-*-20-An-relative-*): New.
350 (dst16-16-16sa-*): New
351 (dst16-16-16ar-*): New
352 (dst32-16-16sa-Unprefixed-*): New
353 (jsri): Fix operands.
354 (setzx): Fix encoding.
356 2007-03-08 Alan Modra <amodra@bigpond.net.au>
358 * m32r.opc: Formatting.
360 2006-05-22 Nick Clifton <nickc@redhat.com>
362 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
364 2006-04-10 DJ Delorie <dj@redhat.com>
366 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
367 decides if this function accepts symbolic constants or not.
368 (parse_signed_bitbase): Likewise.
369 (parse_unsigned_bitbase8): Pass the new parameter.
370 (parse_unsigned_bitbase11): Likewise.
371 (parse_unsigned_bitbase16): Likewise.
372 (parse_unsigned_bitbase19): Likewise.
373 (parse_unsigned_bitbase27): Likewise.
374 (parse_signed_bitbase8): Likewise.
375 (parse_signed_bitbase11): Likewise.
376 (parse_signed_bitbase19): Likewise.
378 2006-03-13 DJ Delorie <dj@redhat.com>
380 * m32c.cpu (Bit3-S): New.
382 * m32c.opc (parse_bit3_S): New.
384 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
385 (btst): Add optional :G suffix for MACH32.
387 (pop.w:G): Add optional :G suffix for MACH16.
388 (push.b.imm): Fix syntax.
390 2006-03-10 DJ Delorie <dj@redhat.com>
392 * m32c.cpu (mul.l): New.
395 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
397 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
398 an error message otherwise.
399 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
400 Fix up comments to correctly describe the functions.
402 2006-02-24 DJ Delorie <dj@redhat.com>
404 * m32c.cpu (RL_TYPE): New attribute, with macros.
405 (Lab-8-24): Add RELAX.
406 (unary-insn-defn-g, binary-arith-imm-dst-defn,
407 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
408 (binary-arith-src-dst-defn): Add 2ADDR attribute.
409 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
410 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
412 (jsri16, jsri32): Add 1ADDR attribute.
413 (jsr32.w, jsr32.a): Add JUMP attribute.
415 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
416 Anil Paranjape <anilp1@kpitcummins.com>
417 Shilin Shakti <shilins@kpitcummins.com>
419 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
421 * xc16x.opc: New file containing supporting XC16C routines.
423 2006-02-10 Nick Clifton <nickc@redhat.com>
425 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
427 2006-01-06 DJ Delorie <dj@redhat.com>
429 * m32c.cpu (mov.w:q): Fix mode.
430 (push32.b.imm): Likewise, for the comment.
432 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
434 Second part of ms1 to mt renaming.
435 * mt.cpu (define-arch, define-isa): Set name to mt.
436 (define-mach): Adjust.
437 * mt.opc (CGEN_ASM_HASH): Update.
438 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
439 (parse_loopsize, parse_imm16): Adjust.
441 2005-12-13 DJ Delorie <dj@redhat.com>
443 * m32c.cpu (jsri): Fix order so register names aren't treated as
445 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
446 indexwd, indexws): Fix encodings.
448 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
450 * mt.cpu: Rename from ms1.cpu.
451 * mt.opc: Rename from ms1.opc.
453 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
455 * cris.cpu (simplecris-common-writable-specregs)
456 (simplecris-common-readable-specregs): Split from
457 simplecris-common-specregs. All users changed.
458 (cris-implemented-writable-specregs-v0)
459 (cris-implemented-readable-specregs-v0): Similar from
460 cris-implemented-specregs-v0.
461 (cris-implemented-writable-specregs-v3)
462 (cris-implemented-readable-specregs-v3)
463 (cris-implemented-writable-specregs-v8)
464 (cris-implemented-readable-specregs-v8)
465 (cris-implemented-writable-specregs-v10)
466 (cris-implemented-readable-specregs-v10)
467 (cris-implemented-writable-specregs-v32)
468 (cris-implemented-readable-specregs-v32): Similar.
469 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
470 insns and specializations.
472 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
475 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
477 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
478 f-cb2incr, f-rc3): New fields.
479 (LOOP): New instruction.
480 (JAL-HAZARD): New hazard.
481 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
483 (mul, muli, dbnz, iflush): Enable for ms2
484 (jal, reti): Has JAL-HAZARD.
485 (ldctxt, ldfb, stfb): Only ms1.
486 (fbcb): Only ms1,ms1-003.
487 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
488 fbcbincrs, mfbcbincrs): Enable for ms2.
489 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
490 * ms1.opc (parse_loopsize): New.
491 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
494 2005-10-28 Dave Brolley <brolley@redhat.com>
496 Contribute the following change:
497 2003-09-24 Dave Brolley <brolley@redhat.com>
499 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
500 CGEN_ATTR_VALUE_TYPE.
501 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
502 Use cgen_bitset_intersect_p.
504 2005-10-27 DJ Delorie <dj@redhat.com>
506 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
507 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
508 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
509 imm operand is needed.
510 (adjnz, sbjnz): Pass the right operands.
511 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
512 unary-insn): Add -g variants for opcodes that need to support :G.
513 (not.BW:G, push.BW:G): Call it.
514 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
515 stzx16-imm8-imm8-abs16): Fix operand typos.
516 * m32c.opc (m32c_asm_hash): Support bnCND.
517 (parse_signed4n, print_signed4n): New.
519 2005-10-26 DJ Delorie <dj@redhat.com>
521 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
522 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
523 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
525 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
526 (mov.BW:S r0,r1): Fix typo r1l->r1.
527 (tst): Allow :G suffix.
528 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
530 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
532 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
534 2005-10-25 DJ Delorie <dj@redhat.com>
536 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
537 making one a macro of the other.
539 2005-10-21 DJ Delorie <dj@redhat.com>
541 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
542 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
543 indexld, indexls): .w variants have `1' bit.
544 (rot32.b): QI, not SI.
545 (rot32.w): HI, not SI.
546 (xchg16): HI for .w variant.
548 2005-10-19 Nick Clifton <nickc@redhat.com>
550 * m32r.opc (parse_slo16): Fix bad application of previous patch.
552 2005-10-18 Andreas Schwab <schwab@suse.de>
554 * m32r.opc (parse_slo16): Better version of previous patch.
556 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
558 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
561 2005-07-25 DJ Delorie <dj@redhat.com>
563 * m32c.opc (parse_unsigned8): Add %dsp8().
564 (parse_signed8): Add %hi8().
565 (parse_unsigned16): Add %dsp16().
566 (parse_signed16): Add %lo16() and %hi16().
567 (parse_lab_5_3): Make valuep a bfd_vma *.
569 2005-07-18 Nick Clifton <nickc@redhat.com>
571 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
573 (f-lab32-jmp-s): Fix insertion sequence.
574 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
575 (Dsp-40-s8): Make parameter be signed.
576 (Dsp-40-s16): Likewise.
577 (Dsp-48-s8): Likewise.
578 (Dsp-48-s16): Likewise.
579 (Imm-13-u3): Likewise. (Despite its name!)
580 (BitBase16-16-s8): Make the parameter be unsigned.
581 (BitBase16-8-u11-S): Likewise.
582 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
583 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
586 * m32c.opc: Fix formatting.
587 Use safe-ctype.h instead of ctype.h
588 Move duplicated code sequences into a macro.
589 Fix compile time warnings about signedness mismatches.
591 (parse_lab_5_3): New parser function.
593 2005-07-16 Jim Blandy <jimb@redhat.com>
595 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
596 to represent isa sets.
598 2005-07-15 Jim Blandy <jimb@redhat.com>
600 * m32c.cpu, m32c.opc: Fix copyright.
602 2005-07-14 Jim Blandy <jimb@redhat.com>
604 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
606 2005-07-14 Alan Modra <amodra@bigpond.net.au>
608 * ms1.opc (print_dollarhex): Correct format string.
610 2005-07-06 Alan Modra <amodra@bigpond.net.au>
612 * iq2000.cpu: Include from binutils cpu dir.
614 2005-07-05 Nick Clifton <nickc@redhat.com>
616 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
617 unsigned in order to avoid compile time warnings about sign
620 * ms1.opc (parse_*): Likewise.
621 (parse_imm16): Use a "void *" as it is passed both signed and
624 2005-07-01 Nick Clifton <nickc@redhat.com>
626 * frv.opc: Update to ISO C90 function declaration style.
627 * iq2000.opc: Likewise.
628 * m32r.opc: Likewise.
631 2005-06-15 Dave Brolley <brolley@redhat.com>
633 Contributed by Red Hat.
634 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
635 * ms1.opc: New file. Written by Stan Cox.
637 2005-05-10 Nick Clifton <nickc@redhat.com>
639 * Update the address and phone number of the FSF organization in
640 the GPL notices in the following files:
641 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
642 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
643 sh64-media.cpu, simplify.inc
645 2005-02-24 Alan Modra <amodra@bigpond.net.au>
647 * frv.opc (parse_A): Warning fix.
649 2005-02-23 Nick Clifton <nickc@redhat.com>
651 * frv.opc: Fixed compile time warnings about differing signed'ness
652 of pointers passed to functions.
653 * m32r.opc: Likewise.
655 2005-02-11 Nick Clifton <nickc@redhat.com>
657 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
658 'bfd_vma *' in order avoid compile time warning message.
660 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
662 * cris.cpu (mstep): Add missing insn.
664 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
666 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
667 * frv.cpu: Add support for TLS annotations in loads and calll.
668 * frv.opc (parse_symbolic_address): New.
669 (parse_ldd_annotation): New.
670 (parse_call_annotation): New.
671 (parse_ld_annotation): New.
672 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
673 Introduce TLS relocations.
674 (parse_d12, parse_s12, parse_u12): Likewise.
675 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
676 (parse_call_label, print_at): New.
678 2004-12-21 Mikael Starvik <starvik@axis.com>
680 * cris.cpu (cris-set-mem): Correct integral write semantics.
682 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
684 * cris.cpu: New file.
686 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
688 * iq2000.cpu: Added quotes around macro arguments so that they
689 will work with newer versions of guile.
691 2004-10-27 Nick Clifton <nickc@redhat.com>
693 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
694 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
696 * iq2000.cpu (dnop index): Rename to _index to avoid complications
699 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
701 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
703 2004-05-15 Nick Clifton <nickc@redhat.com>
705 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
707 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
709 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
711 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
713 * frv.cpu (define-arch frv): Add fr450 mach.
714 (define-mach fr450): New.
715 (define-model fr450): New. Add profile units to every fr450 insn.
716 (define-attr UNIT): Add MDCUTSSI.
717 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
718 (define-attr AUDIO): New boolean.
719 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
720 (f-LRA-null, f-TLBPR-null): New fields.
721 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
722 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
723 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
724 (LRA-null, TLBPR-null): New macros.
725 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
726 (load-real-address): New macro.
727 (lrai, lrad, tlbpr): New instructions.
728 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
729 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
730 (mdcutssi): Change UNIT attribute to MDCUTSSI.
731 (media-low-clear-semantics, media-scope-limit-semantics)
732 (media-quad-limit, media-quad-shift): New macros.
733 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
734 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
735 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
736 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
737 (fr450_unit_mapping): New array.
738 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
739 for new MDCUTSSI unit.
740 (fr450_check_insn_major_constraints): New function.
741 (check_insn_major_constraints): Use it.
743 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
745 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
746 (scutss): Change unit to I0.
747 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
748 (mqsaths): Fix FR400-MAJOR categorization.
749 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
750 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
751 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
754 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
756 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
757 (rstb, rsth, rst, rstd, rstq): Delete.
758 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
760 2004-02-23 Nick Clifton <nickc@redhat.com>
762 * Apply these patches from Renesas:
764 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
766 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
767 disassembling codes for 0x*2 addresses.
769 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
771 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
773 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
775 * cpu/m32r.cpu : Add new model m32r2.
776 Add new instructions.
777 Replace occurrances of 'Mitsubishi' with 'Renesas'.
778 Changed PIPE attr of push from O to OS.
779 Care for Little-endian of M32R.
780 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
781 Care for Little-endian of M32R.
782 (parse_slo16): signed extension for value.
784 2004-02-20 Andrew Cagney <cagney@redhat.com>
786 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
787 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
789 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
790 written by Ben Elliston.
792 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
794 * frv.cpu (UNIT): Add IACC.
795 (iacc-multiply-r-r): Use it.
796 * frv.opc (fr400_unit_mapping): Add entry for IACC.
797 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
799 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
801 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
802 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
803 cut&paste errors in shifting/truncating numerical operands.
804 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
805 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
806 (parse_uslo16): Likewise.
807 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
808 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
809 (parse_s12): Likewise.
810 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
811 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
812 (parse_uslo16): Likewise.
813 (parse_uhi16): Parse gothi and gotfuncdeschi.
814 (parse_d12): Parse got12 and gotfuncdesc12.
815 (parse_s12): Likewise.
817 2003-10-10 Dave Brolley <brolley@redhat.com>
819 * frv.cpu (dnpmop): New p-macro.
820 (GRdoublek): Use dnpmop.
821 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
822 (store-double-r-r): Use (.sym regtype doublek).
823 (r-store-double): Ditto.
824 (store-double-r-r-u): Ditto.
825 (conditional-store-double): Ditto.
826 (conditional-store-double-u): Ditto.
827 (store-double-r-simm): Ditto.
828 (fmovs): Assign to UNIT FMALL.
830 2003-10-06 Dave Brolley <brolley@redhat.com>
832 * frv.cpu, frv.opc: Add support for fr550.
834 2003-09-24 Dave Brolley <brolley@redhat.com>
836 * frv.cpu (u-commit): New modelling unit for fr500.
837 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
838 (commit-r): Use u-commit model for fr500.
840 (conditional-float-binary-op): Take profiling data as an argument.
842 (ne-float-binary-op): Ditto.
844 2003-09-19 Michael Snyder <msnyder@redhat.com>
846 * frv.cpu (nldqi): Delete unimplemented instruction.
848 2003-09-12 Dave Brolley <brolley@redhat.com>
850 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
851 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
852 frv_ref_SI to get input register referenced for profiling.
853 (clear-ne-flag-all): Pass insn profiling in as an argument.
854 (clrgr,clrfr,clrga,clrfa): Add profiling information.
856 2003-09-11 Michael Snyder <msnyder@redhat.com>
858 * frv.cpu: Typographical corrections.
860 2003-09-09 Dave Brolley <brolley@redhat.com>
862 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
863 (conditional-media-dual-complex, media-quad-complex): Likewise.
865 2003-09-04 Dave Brolley <brolley@redhat.com>
867 * frv.cpu (register-transfer): Pass in all attributes in on argument.
869 (conditional-register-transfer): Ditto.
870 (cache-preload): Ditto.
871 (floating-point-conversion): Ditto.
872 (floating-point-neg): Ditto.
874 (float-binary-op-s): Ditto.
875 (conditional-float-binary-op): Ditto.
876 (ne-float-binary-op): Ditto.
877 (float-dual-arith): Ditto.
878 (ne-float-dual-arith): Ditto.
880 2003-09-03 Dave Brolley <brolley@redhat.com>
882 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
883 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
885 (A): Removed operand.
886 (A0,A1): New operands replace operand A.
887 (mnop): Now a real insn
888 (mclracc): Removed insn.
889 (mclracc-0, mclracc-1): New insns replace mclracc.
890 (all insns): Use new UNIT attributes.
892 2003-08-21 Nick Clifton <nickc@redhat.com>
894 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
895 and u-media-dual-btoh with output parameter.
896 (cmbtoh): Add profiling hack.
898 2003-08-19 Michael Snyder <msnyder@redhat.com>
900 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
902 2003-06-10 Doug Evans <dje@sebabeach.org>
904 * frv.cpu: Add IDOC attribute.
906 2003-06-06 Andrew Cagney <cagney@redhat.com>
908 Contributed by Red Hat.
909 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
910 Stan Cox, and Frank Ch. Eigler.
911 * iq2000.opc: New file. Written by Ben Elliston, Frank
912 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
913 * iq2000m.cpu: New file. Written by Jeff Johnston.
914 * iq10.cpu: New file. Written by Jeff Johnston.
916 2003-06-05 Nick Clifton <nickc@redhat.com>
918 * frv.cpu (FRintieven): New operand. An even-numbered only
919 version of the FRinti operand.
920 (FRintjeven): Likewise for FRintj.
921 (FRintkeven): Likewise for FRintk.
922 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
923 media-quad-arith-sat-semantics, media-quad-arith-sat,
924 conditional-media-quad-arith-sat, mdunpackh,
925 media-quad-multiply-semantics, media-quad-multiply,
926 conditional-media-quad-multiply, media-quad-complex-i,
927 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
928 conditional-media-quad-multiply-acc, munpackh,
929 media-quad-multiply-cross-acc-semantics, mdpackh,
930 media-quad-multiply-cross-acc, mbtoh-semantics,
931 media-quad-cross-multiply-cross-acc-semantics,
932 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
933 media-quad-cross-multiply-acc-semantics, cmbtoh,
934 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
935 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
936 cmhtob): Use new operands.
937 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
938 (parse_even_register): New function.
940 2003-06-03 Nick Clifton <nickc@redhat.com>
942 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
943 immediate value not unsigned.
945 2003-06-03 Andrew Cagney <cagney@redhat.com>
947 Contributed by Red Hat.
948 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
949 and Eric Christopher.
950 * frv.opc: New file. Written by Catherine Moore, and Dave
952 * simplify.inc: New file. Written by Doug Evans.
954 2003-05-02 Andrew Cagney <cagney@redhat.com>
959 Copyright (C) 2003-2012 Free Software Foundation, Inc.
961 Copying and distribution of this file, with or without modification,
962 are permitted in any medium without royalty provided the copyright
963 notice and this notice are preserved.
969 version-control: never