intel_minnow_max.c: Add support for spi

This commit also adds a bit of documentation on the low speed spi kernel module
required

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>

diff --git a/docs/minnow_max.md b/docs/minnow_max.md
index 1b6df7e..6d2bb51 100644 (file)
--- a/docs/minnow_max.md
+++ b/docs/minnow_max.md
@@ -12,6 +12,12 @@ Supported Firmware
 ------------------
 mraa has only been tested with 64 bit firmware version 0.73 or later.
 
+SPI
+---
+For SPI support you need to load the low_speed_spidev kernel module and that
+will create the /dev/spidev0.0 device node. Mraa only knows about this one SPI
+bus and no other.
+
 Interface notes
 ---------------
 The low speed I/O connector supported as per table below.  This assumes default
@@ -22,8 +28,6 @@ will not behave as expected.
 Documentation shows i2c on bus #5, ACPI shows it on bus #6, but driver uses
 bus #7.
 
-**SPI operation is not currently supported**
-
 | MRAA Number | Physical Pin  | Function   | Sysfs GPIO | Notes                |
 |-------------|---------------|------------|------------|----------------------|
 | 1           | 1             | GND        |            |                      |

diff --git a/src/x86/intel_minnow_max.c b/src/x86/intel_minnow_max.c
index b678611..22324b2 100644 (file)
--- a/src/x86/intel_minnow_max.c
+++ b/src/x86/intel_minnow_max.c
@@ -60,6 +60,9 @@ mraa_set_pininfo(mraa_board_t* board, int mraa_index, char *name, mraa_pincapabi
             pin_info->pwm.pinmap = 0;
             pin_info->pwm.mux_total = 0;
         }
+        if (caps.spi) {
+            pin_info->spi.mux_total = 0;
+        }
         return MRAA_SUCCESS;
     }
     return MRAA_ERROR_INVALID_RESOURCE;