2 * Author: Henry Bruce <henry.bruce@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include <sys/utsname.h>
31 #include "x86/intel_minnow_max.h"
33 #define PLATFORM_NAME "MinnowBoard MAX"
34 #define I2C_BUS_COUNT 10
35 #define I2C_BUS_DEFAULT 7
37 int arch_nr_gpios_adjust = 0x100;
40 mraa_set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilities_t caps, int sysfs_pin)
42 if (mraa_index < board->phy_pin_count) {
43 // adjust mraa_index for ARCH_NR_GPIOS value
44 mraa_pininfo_t* pin_info = &board->pins[mraa_index];
45 strncpy(pin_info->name, name, 7);
46 pin_info->capabilites = caps;
48 pin_info->gpio.pinmap = sysfs_pin | arch_nr_gpios_adjust;
49 pin_info->gpio.mux_total = 0;
52 pin_info->i2c.pinmap = 1;
53 pin_info->i2c.mux_total = 0;
57 if (strncmp(name, "PWM", 3) == 0 && strlen(name) > 3 && isdigit(name[3]))
58 controller = name[3] - '0';
59 pin_info->pwm.parent_id = controller;
60 pin_info->pwm.pinmap = 0;
61 pin_info->pwm.mux_total = 0;
64 pin_info->spi.mux_total = 0;
68 return MRAA_ERROR_INVALID_RESOURCE;
72 mraa_get_pin_index(mraa_board_t* board, char* name, int* pin_index)
75 for (i = 0; i < board->phy_pin_count; ++i) {
76 if (strcmp(name, board->pins[i].name) == 0) {
81 return MRAA_ERROR_INVALID_RESOURCE;
85 mraa_intel_minnow_max()
87 mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
89 struct utsname running_uname;
90 int uname_major, uname_minor, max_pins[27];
96 b->platform_name = PLATFORM_NAME;
97 b->phy_pin_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
98 b->gpio_count = MRAA_INTEL_MINNOW_MAX_PINCOUNT;
101 b->adc_supported = 0;
103 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_MINNOW_MAX_PINCOUNT);
104 if (b->pins == NULL) {
108 if (uname(&running_uname) != 0) {
112 sscanf(running_uname.release, "%d.%d", &uname_major, &uname_minor);
114 /* if we are on Linux 3.17 or lower they use a 256 max and number the GPIOs down
115 * if we are on 3.18 or higher (ea584595fc85e65796335033dfca25ed655cd0ed) (for now)
116 * they start at 512 and number down, at some point this is going to change again when
117 * GPIO moves to a radix.
119 if (uname_major <= 3 && uname_minor <= 17) {
120 arch_nr_gpios_adjust = 0;
123 mraa_set_pininfo(b, 0, "INVALID", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
124 mraa_set_pininfo(b, 1, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
125 mraa_set_pininfo(b, 2, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
126 mraa_set_pininfo(b, 3, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
127 mraa_set_pininfo(b, 4, "3.3v", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }, -1);
128 mraa_set_pininfo(b, 5, "SPI_CS", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 220);
129 mraa_set_pininfo(b, 6, "UART1TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 225);
130 mraa_set_pininfo(b, 7, "SPIMISO", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 221);
131 mraa_set_pininfo(b, 8, "UART1RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 224);
132 mraa_set_pininfo(b, 9, "SPIMOSI", (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }, 222);
133 mraa_set_pininfo(b, 10, "UART1CT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 227);
134 mraa_set_pininfo(b, 11, "SPI_CLK", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 223);
135 mraa_set_pininfo(b, 12, "UART1RT", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 226);
136 mraa_set_pininfo(b, 13, "I2C_SCL", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 243);
137 mraa_set_pininfo(b, 14, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 216);
138 mraa_set_pininfo(b, 15, "I2C_SDA", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }, 242);
139 mraa_set_pininfo(b, 16, "I2S_FRM", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 217);
140 mraa_set_pininfo(b, 17, "UART2TX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 229);
141 mraa_set_pininfo(b, 18, "I2S_DO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 219);
142 mraa_set_pininfo(b, 19, "UART2RX", (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }, 228);
143 mraa_set_pininfo(b, 20, "I2S_DI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 218);
144 mraa_set_pininfo(b, 21, "S5_0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 82);
145 mraa_set_pininfo(b, 22, "PWM0", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
146 248); // Assume BIOS configured for PWM
147 mraa_set_pininfo(b, 23, "S5_1", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 83);
148 mraa_set_pininfo(b, 24, "PWM1", (mraa_pincapabilities_t){ 1, 0, 1, 0, 0, 0, 0, 0 },
149 249); // Assume BIOS configured for PWM
150 mraa_set_pininfo(b, 25, "S5_4", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 84);
151 mraa_set_pininfo(b, 26, "IBL8254", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 208);
153 // Set number of i2c adaptors
154 // Got this from running 'i2cdetect -l'
155 b->i2c_bus_count = I2C_BUS_COUNT;
157 // Disable all i2c adaptors
159 for (ici = 0; ici < b->i2c_bus_count; ici++) {
160 b->i2c_bus[ici].bus_id = -1;
163 // Configure i2c adaptor #7 and make it the default
164 int pin_index_sda, pin_index_scl;
165 if (mraa_get_pin_index(b, "I2C_SDA", &pin_index_sda) == MRAA_SUCCESS &&
166 mraa_get_pin_index(b, "I2C_SCL", &pin_index_scl) == MRAA_SUCCESS) {
167 b->def_i2c_bus = I2C_BUS_DEFAULT;
168 b->i2c_bus[b->def_i2c_bus].bus_id = b->def_i2c_bus;
169 b->i2c_bus[b->def_i2c_bus].sda = pin_index_sda;
170 b->i2c_bus[b->def_i2c_bus].scl = pin_index_scl;
174 b->pwm_default_period = 500;
175 b->pwm_max_period = 1000000000;
176 b->pwm_min_period = 1;
178 b->spi_bus_count = 1;
180 b->spi_bus[0].bus_id = 0;
181 b->spi_bus[0].slave_s = 0;
182 b->spi_bus[0].cs = 5;
183 b->spi_bus[0].mosi = 9;
184 b->spi_bus[0].miso = 7;
185 b->spi_bus[0].sclk = 11;
187 b->uart_dev_count = 0;
191 syslog(LOG_CRIT, "minnowmax: Platform failed to initialise");