2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include <sys/ioctl.h>
30 #include <linux/spi/spidev.h>
33 #include "x86/intel_edison_fab_c.h"
35 #define PLATFORM_NAME "Intel Edison"
36 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
37 #define DEBUGFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
39 #define MAX_MODE_SIZE 8
41 // This is an absolute path to a resource file found within sysfs.
42 // Might not always be correct. First thing to check if mmap stops
43 // working. Check the device for 0x1199 and Intel Vendor (0x8086)
44 #define MMAP_PATH "/sys/devices/pci0000:00/0000:00:0c.0/resource0"
45 #define UART_DEV_PATH "/dev/ttyMFD1"
50 } mraa_intel_edision_pindef_t;
53 mraa_intel_edision_pindef_t gpio;
54 mraa_intel_edision_pindef_t pwm;
55 mraa_intel_edision_pindef_t i2c;
56 mraa_intel_edision_pindef_t spi;
57 mraa_intel_edision_pindef_t uart;
58 } mraa_intel_edison_pinmodes_t;
60 static mraa_gpio_context tristate;
62 static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
63 static unsigned int outputen[] = { 248, 249, 250, 251, 252, 253, 254, 255, 256, 257,
64 258, 259, 260, 261, 232, 233, 234, 235, 236, 237 };
65 static mraa_gpio_context agpioOutputen[sizeof(outputen) / sizeof(outputen[0])];
67 static unsigned int pullup_map[] = { 216, 217, 218, 219, 220, 221, 222, 223, 224, 225,
68 226, 227, 228, 229, 208, 209, 210, 211, 212, 213 };
69 static int miniboard = 0;
72 static uint8_t* mmap_reg = NULL;
73 static int mmap_fd = 0;
75 static unsigned int mmap_count = 0;
78 mraa_intel_edison_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb)
80 uint8_t lsb_mode = (uint8_t) lsb;
82 // Edison doesn't support LSB_FIRST, we need to react appropriately
84 if (ioctl(dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
85 syslog(LOG_ERR, "spi: Failed to set bit order");
86 return MRAA_ERROR_INVALID_RESOURCE;
88 if (ioctl(dev->devfd, SPI_IOC_RD_LSB_FIRST, &lsb_mode) < 0) {
89 syslog(LOG_ERR, "spi: Failed to set bit order");
90 return MRAA_ERROR_INVALID_RESOURCE;
93 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
101 mraa_intel_edison_pinmode_change(int sysfs, int mode)
107 char buffer[MAX_SIZE];
110 mraa_gpio_context mode_gpio = mraa_gpio_init_raw(sysfs);
111 if (mode_gpio == NULL) {
112 return MRAA_ERROR_NO_RESOURCES;
115 // first try SYSFS_CLASS_GPIO path
116 snprintf(buffer, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%i/pinmux", sysfs);
117 int modef = open(buffer, O_WRONLY);
119 snprintf(buffer, MAX_SIZE, DEBUGFS_PINMODE_PATH "%i/current_pinmux", sysfs);
120 modef = open(buffer, O_WRONLY);
125 syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
126 mraa_gpio_close(mode_gpio);
127 return MRAA_ERROR_INVALID_RESOURCE;
130 mraa_result_t ret = MRAA_SUCCESS;
131 char mode_buf[MAX_MODE_SIZE];
132 int length = sprintf(mode_buf, "%s%u", useDebugFS ? "mode" : "", mode);
133 if (write(modef, mode_buf, length * sizeof(char)) == -1) {
134 ret = MRAA_ERROR_INVALID_RESOURCE;
137 mraa_gpio_close(mode_gpio);
143 mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, mraa_gpio_dir_t dir)
146 if (dev->phy_pin >= 0) {
147 if (mraa_gpio_write(tristate, 0) != MRAA_SUCCESS) {
148 // call can sometimes fail, this does not actually mean much except
149 // that the kernel drivers don't always behave very well
150 syslog(LOG_NOTICE, "edison: Failed to write to tristate");
152 int pin = dev->phy_pin;
154 if (!agpioOutputen[pin]) {
155 agpioOutputen[pin] = mraa_gpio_init_raw(outputen[pin]);
156 if (agpioOutputen[pin] == NULL) {
157 return MRAA_ERROR_INVALID_RESOURCE;
159 if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
160 return MRAA_ERROR_INVALID_RESOURCE;
164 if (dir == MRAA_GPIO_OUT) {
167 if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
168 return MRAA_ERROR_INVALID_RESOURCE;
176 mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, mraa_gpio_dir_t dir)
178 if (dev->phy_pin >= 0) {
179 return mraa_gpio_write(tristate, 1);
185 mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
188 return MRAA_ERROR_INVALID_RESOURCE;
192 if (miniboard == 1) {
196 sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
197 mode = pinmodes[dev->phy_pin].gpio.mode;
200 return mraa_intel_edison_pinmode_change(sysfs, mode);
204 mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
206 if (dev->phy_pin >= 0) {
207 int pin = dev->phy_pin;
208 if (agpioOutputen[pin]) {
209 mraa_gpio_close(agpioOutputen[pin]);
210 agpioOutputen[pin] = NULL;
217 mraa_intel_edison_i2c_init_pre(unsigned int bus)
219 if (miniboard == 0) {
221 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
224 mraa_gpio_write(tristate, 0);
225 mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
226 mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
227 mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
228 mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
229 mraa_gpio_close(io18_gpio);
230 mraa_gpio_close(io19_gpio);
232 mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
233 mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
234 mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
235 mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
236 mraa_gpio_write(io18_enable, 0);
237 mraa_gpio_write(io19_enable, 0);
238 mraa_gpio_close(io18_enable);
239 mraa_gpio_close(io19_enable);
241 mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
242 mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
243 mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
244 mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
245 mraa_gpio_close(io18_pullup);
246 mraa_gpio_close(io19_pullup);
248 mraa_intel_edison_pinmode_change(28, 1);
249 mraa_intel_edison_pinmode_change(27, 1);
251 mraa_gpio_write(tristate, 1);
253 if (bus != 6 && bus != 1) {
254 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
257 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
258 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
259 mraa_intel_edison_pinmode_change(sda, 1);
260 mraa_intel_edison_pinmode_change(scl, 1);
267 mraa_intel_edison_misc_spi()
269 // These arrays must have same length
270 static const int gpio_pin_list[] = {263, 240, 262, 241, 242, 243};
271 static int pin_num = sizeof(gpio_pin_list) / sizeof(int);
272 static const int gpio_val_list[] = {1, 0, 1, 0, 0, 0};
273 static const int gpio_dir_list[] = {MRAA_GPIO_OUT, MRAA_GPIO_OUT,
274 MRAA_GPIO_OUT, MRAA_GPIO_OUT,
275 MRAA_GPIO_OUT, MRAA_GPIO_OUT};
279 MRAA_RETURN_FOR_ERROR(mraa_gpio_write(tristate, 0));
281 for (i = 0; i < pin_num; i++) {
282 mraa_gpio_context io = mraa_gpio_init_raw(gpio_pin_list[i]);
284 ret = mraa_gpio_dir(io, gpio_dir_list[i]);
285 if (ret == MRAA_SUCCESS) {
286 ret = mraa_gpio_write(io, gpio_val_list[i]);
289 //Don't care return value of close()
291 MRAA_RETURN_FOR_ERROR(ret);
293 syslog(LOG_ERR, "edison: Failed to init raw gpio %d!",gpio_pin_list[i]);
294 return MRAA_ERROR_NO_RESOURCES;
298 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(115, 1));
299 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(114, 1));
300 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(109, 1));
301 MRAA_RETURN_FOR_ERROR(mraa_gpio_write(tristate, 1));
307 mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
309 char file_path[64] = "";
311 snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw", dev->channel);
313 dev->adc_in_fp = open(file_path, O_RDONLY);
314 if (dev->adc_in_fp == -1) {
315 syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
318 return MRAA_ERROR_INVALID_RESOURCE;
325 mraa_intel_edison_aio_init_pre(unsigned int aio)
327 if (aio > plat->aio_count) {
328 syslog(LOG_ERR, "edison: Invalid analog input channel");
329 return MRAA_ERROR_INVALID_RESOURCE;
333 mraa_gpio_context output_e;
334 output_e = mraa_gpio_init_raw(outputen[pin]);
335 if (output_e == NULL) {
336 return MRAA_ERROR_INVALID_RESOURCE;
338 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
339 mraa_gpio_close(output_e);
340 return MRAA_ERROR_INVALID_RESOURCE;
342 if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS) {
343 mraa_gpio_close(output_e);
344 return MRAA_ERROR_INVALID_RESOURCE;
346 mraa_gpio_close(output_e);
348 mraa_gpio_context pullup_pin;
349 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
350 if (pullup_pin == NULL) {
351 return MRAA_ERROR_INVALID_RESOURCE;
353 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
354 mraa_gpio_close(pullup_pin);
355 return MRAA_ERROR_INVALID_RESOURCE;
357 mraa_gpio_close(pullup_pin);
363 mraa_intel_edison_aio_init_post(mraa_aio_context dev)
365 return mraa_gpio_write(tristate, 1);
369 mraa_intel_edison_pwm_init_pre(int pin)
371 if (miniboard == 1) {
372 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
374 if (pin < 0 || pin > 19) {
375 return MRAA_ERROR_INVALID_RESOURCE;
378 if (!plat->pins[pin].capabilites.pwm) {
379 return MRAA_ERROR_INVALID_RESOURCE;
382 mraa_gpio_context output_e;
383 output_e = mraa_gpio_init_raw(outputen[pin]);
384 if (output_e == NULL) {
385 return MRAA_ERROR_INVALID_RESOURCE;
387 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
388 mraa_gpio_close(output_e);
389 return MRAA_ERROR_INVALID_RESOURCE;
391 if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS) {
392 mraa_gpio_close(output_e);
393 return MRAA_ERROR_INVALID_RESOURCE;
395 mraa_gpio_close(output_e);
397 mraa_gpio_context pullup_pin;
398 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
399 if (pullup_pin == NULL) {
400 return MRAA_ERROR_INVALID_RESOURCE;
402 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
403 mraa_gpio_close(pullup_pin);
404 return MRAA_ERROR_INVALID_RESOURCE;
406 mraa_gpio_close(pullup_pin);
407 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
413 mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
415 return mraa_gpio_write(tristate, 1);
419 mraa_intel_edison_spi_init_pre(int bus)
421 if (miniboard == 1) {
422 mraa_intel_edison_pinmode_change(115, 1);
423 mraa_intel_edison_pinmode_change(114, 1);
424 mraa_intel_edison_pinmode_change(109, 1);
427 mraa_gpio_write(tristate, 0);
429 mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
430 mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
431 mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
432 mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
433 mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
434 mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
435 mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
436 mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
438 mraa_gpio_write(io10_out, 1);
439 mraa_gpio_write(io11_out, 1);
440 mraa_gpio_write(io12_out, 0);
441 mraa_gpio_write(io13_out, 1);
443 mraa_gpio_close(io10_out);
444 mraa_gpio_close(io11_out);
445 mraa_gpio_close(io12_out);
446 mraa_gpio_close(io13_out);
448 mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
449 mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
450 mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
451 mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
453 mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
454 mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
455 mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
456 mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
458 mraa_gpio_close(io10_pull);
459 mraa_gpio_close(io11_pull);
460 mraa_gpio_close(io12_pull);
461 mraa_gpio_close(io13_pull);
467 mraa_intel_edison_spi_init_post(mraa_spi_context spi)
469 return mraa_gpio_write(tristate, 1);
473 mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode)
475 if (dev->value_fp != -1) {
476 if (close(dev->value_fp) != 0) {
477 return MRAA_ERROR_INVALID_RESOURCE;
482 mraa_gpio_context pullup_e;
483 pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
484 if (pullup_e == NULL) {
485 return MRAA_ERROR_INVALID_RESOURCE;
487 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
488 syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
489 mraa_gpio_close(pullup_e);
490 return MRAA_ERROR_INVALID_RESOURCE;
495 case MRAA_GPIO_STRONG:
497 case MRAA_GPIO_PULLUP:
500 case MRAA_GPIO_PULLDOWN:
507 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
510 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
511 syslog(LOG_ERR, "edison: Error setting pullup");
512 mraa_gpio_close(pullup_e);
513 return MRAA_ERROR_INVALID_RESOURCE;
515 if (mraa_gpio_write(pullup_e, value) != MRAA_SUCCESS) {
516 syslog(LOG_ERR, "edison: Error setting pullup");
517 mraa_gpio_close(pullup_e);
518 return MRAA_ERROR_INVALID_RESOURCE;
522 return mraa_gpio_close(pullup_e);
526 mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode)
528 if (dev->value_fp != -1) {
529 if (close(dev->value_fp) != 0) {
530 return MRAA_ERROR_INVALID_RESOURCE;
535 char filepath[MAX_SIZE];
537 mraa_gpio_context mode_gpio = mraa_gpio_init_raw(dev->pin);
538 if (mode_gpio == NULL) {
539 return MRAA_ERROR_NO_RESOURCES;
542 // first try SYSFS_CLASS_GPIO path
543 snprintf(filepath, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%d/pullmode", dev->pin);
544 int drive = open(filepath, O_WRONLY);
547 snprintf(filepath, MAX_SIZE, DEBUGFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
548 drive = open(filepath, O_WRONLY);
552 syslog(LOG_ERR, "edison: Failed to open drive for writing");
553 mraa_gpio_close(mode_gpio);
554 return MRAA_ERROR_INVALID_RESOURCE;
560 case MRAA_GPIO_STRONG:
561 mraa_gpio_close(mode_gpio);
564 case MRAA_GPIO_PULLUP:
565 length = snprintf(bu, sizeof(bu), "pullup");
567 case MRAA_GPIO_PULLDOWN:
568 length = snprintf(bu, sizeof(bu), "pulldown");
571 length = snprintf(bu, sizeof(bu), "nopull");
574 mraa_gpio_close(mode_gpio);
576 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
578 if (write(drive, bu, length * sizeof(char)) == -1) {
579 syslog(LOG_ERR, "edison: Failed to write to drive mode");
580 mraa_gpio_close(mode_gpio);
582 return MRAA_ERROR_INVALID_RESOURCE;
585 mraa_gpio_close(mode_gpio);
586 if (close(drive) != 0) {
587 return MRAA_ERROR_INVALID_RESOURCE;
593 mraa_intel_edison_uart_init_pre(int index)
596 syslog(LOG_ERR, "edison: Failed to write to drive mode");
597 return MRAA_ERROR_INVALID_RESOURCE;
599 if (miniboard == 0) {
600 mraa_gpio_write(tristate, 0);
601 mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
602 mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
603 mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
604 mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
605 mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
606 mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
607 mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
608 mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
610 mraa_gpio_write(io0_output, 0);
611 mraa_gpio_write(io0_pullup, 0);
612 mraa_gpio_write(io1_output, 1);
614 mraa_gpio_close(io0_output);
615 mraa_gpio_close(io0_pullup);
616 mraa_gpio_close(io1_output);
617 mraa_gpio_close(io1_pullup);
620 ret = mraa_intel_edison_pinmode_change(130, 1); // IO0 RX
621 ret = mraa_intel_edison_pinmode_change(131, 1); // IO1 TX
626 mraa_intel_edison_uart_init_post(mraa_uart_context uart)
628 return mraa_gpio_write(tristate, 1);
632 mraa_intel_edsion_mmap_unsetup()
634 if (mmap_reg == NULL) {
635 syslog(LOG_ERR, "edison mmap: null register cant unsetup");
636 return MRAA_ERROR_INVALID_RESOURCE;
638 munmap(mmap_reg, mmap_size);
640 if (close(mmap_fd) != 0) {
641 return MRAA_ERROR_INVALID_RESOURCE;
647 mraa_intel_edison_mmap_write(mraa_gpio_context dev, int value)
649 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
658 *(volatile uint32_t*) (mmap_reg + offset + valoff) = (uint32_t)(1 << (dev->pin % 32));
664 mraa_intel_edison_mmap_read(mraa_gpio_context dev)
666 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
669 value = *(volatile uint32_t*) (mmap_reg + 0x04 + offset);
670 if (value & (uint32_t)(1 << (dev->pin % 32))) {
677 mraa_intel_edison_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
680 syslog(LOG_ERR, "edison mmap: context not valid");
681 return MRAA_ERROR_INVALID_HANDLE;
685 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
686 syslog(LOG_ERR, "edison mmap: can't disable disabled mmap gpio");
687 return MRAA_ERROR_INVALID_PARAMETER;
689 dev->mmap_write = NULL;
690 dev->mmap_read = NULL;
692 if (mmap_count == 0) {
693 return mraa_intel_edsion_mmap_unsetup();
698 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
699 syslog(LOG_ERR, "edison mmap: can't enable enabled mmap gpio");
700 return MRAA_ERROR_INVALID_PARAMETER;
703 // Might need to make some elements of this thread safe.
704 // For example only allow one thread to enter the following block
705 // to prevent mmap'ing twice.
706 if (mmap_reg == NULL) {
707 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
708 syslog(LOG_ERR, "edison map: unable to open resource0 file");
709 return MRAA_ERROR_INVALID_HANDLE;
713 if (fstat(mmap_fd, &fd_stat) != 0) {
714 syslog(LOG_ERR, "edison map: unable to access resource0 file");
715 return MRAA_ERROR_INVALID_HANDLE;
717 mmap_size = fd_stat.st_size;
720 (uint8_t*) mmap(NULL, fd_stat.st_size, PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, mmap_fd, 0);
721 if (mmap_reg == MAP_FAILED) {
722 syslog(LOG_ERR, "edison mmap: failed to mmap");
725 return MRAA_ERROR_NO_RESOURCES;
728 dev->mmap_write = &mraa_intel_edison_mmap_write;
729 dev->mmap_read = &mraa_intel_edison_mmap_read;
736 mraa_intel_edison_i2c_freq(mraa_i2c_context dev, mraa_i2c_mode_t mode)
740 switch (dev->busnum) {
742 sysnode = open("/sys/devices/pci0000:00/0000:00:08.0/i2c_dw_sysnode/mode", O_RDWR);
745 sysnode = open("/sys/devices/pci0000:00/0000:00:09.1/i2c_dw_sysnode/mode", O_RDWR);
748 syslog(LOG_NOTICE, "i2c bus selected does not support frequency changes");
749 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
752 return MRAA_ERROR_INVALID_RESOURCE;
759 length = snprintf(bu, sizeof(bu), "std");
762 length = snprintf(bu, sizeof(bu), "fast");
765 length = snprintf(bu, sizeof(bu), "high");
768 syslog(LOG_ERR, "Invalid i2c mode selected");
770 return MRAA_ERROR_INVALID_PARAMETER;
772 if (write(sysnode, bu, length * sizeof(char)) == -1) {
774 return MRAA_ERROR_INVALID_RESOURCE;
781 mraa_intel_edison_miniboard(mraa_board_t* b)
784 b->phy_pin_count = 56;
785 b->gpio_count = 56; // A bit of a hack I suppose
787 b->pwm_default_period = 5000;
788 b->pwm_max_period = 218453;
789 b->pwm_min_period = 1;
791 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * 56);
792 if (b->pins == NULL) {
793 return MRAA_ERROR_UNSPECIFIED;
796 b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
797 if (b->adv_func == NULL) {
799 return MRAA_ERROR_UNSPECIFIED;
801 b->adv_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
802 b->adv_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
803 b->adv_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
804 b->adv_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
805 b->adv_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
806 b->adv_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
807 b->adv_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
808 b->adv_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
811 strncpy(b->pins[pos].name, "J17-1", 8);
812 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
813 b->pins[pos].gpio.pinmap = 182;
814 b->pins[pos].gpio.mux_total = 0;
815 b->pins[pos].pwm.pinmap = 2;
816 b->pins[pos].pwm.parent_id = 0;
817 b->pins[pos].pwm.mux_total = 0;
820 strncpy(b->pins[pos].name, "J17-2", 8);
821 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
823 strncpy(b->pins[pos].name, "J17-3", 8);
824 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
826 strncpy(b->pins[pos].name, "J17-4", 8);
827 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
830 strncpy(b->pins[pos].name, "J17-5", 8);
831 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
832 b->pins[pos].gpio.pinmap = 135;
833 b->pins[pos].gpio.mux_total = 0;
836 strncpy(b->pins[pos].name, "J17-6", 8);
837 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
840 strncpy(b->pins[pos].name, "J17-7", 8);
841 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
842 b->pins[pos].gpio.pinmap = 27;
843 b->pins[pos].gpio.mux_total = 0;
844 b->pins[pos].i2c.pinmap = 1;
845 b->pins[pos].i2c.mux_total = 0;
848 strncpy(b->pins[pos].name, "J17-8", 8);
849 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
850 b->pins[pos].gpio.pinmap = 20;
851 b->pins[pos].gpio.mux_total = 0;
852 b->pins[pos].i2c.pinmap = 1;
853 b->pins[pos].i2c.mux_total = 0;
856 strncpy(b->pins[pos].name, "J17-9", 8);
857 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
858 b->pins[pos].gpio.pinmap = 28;
859 b->pins[pos].gpio.mux_total = 0;
860 b->pins[pos].i2c.pinmap = 1;
861 b->pins[pos].i2c.mux_total = 0;
864 strncpy(b->pins[pos].name, "J17-10", 8);
865 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
866 b->pins[pos].gpio.pinmap = 111;
867 b->pins[pos].gpio.mux_total = 0;
868 b->pins[pos].spi.pinmap = 5;
869 b->pins[pos].spi.mux_total = 0;
872 strncpy(b->pins[pos].name, "J17-11", 8);
873 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
874 b->pins[pos].gpio.pinmap = 109;
875 b->pins[pos].gpio.mux_total = 0;
876 b->pins[pos].spi.pinmap = 5;
877 b->pins[pos].spi.mux_total = 0;
880 strncpy(b->pins[pos].name, "J17-12", 8);
881 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
882 b->pins[pos].gpio.pinmap = 115;
883 b->pins[pos].gpio.mux_total = 0;
884 b->pins[pos].spi.pinmap = 5;
885 b->pins[pos].spi.mux_total = 0;
887 strncpy(b->pins[pos].name, "J17-13", 8);
888 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
891 strncpy(b->pins[pos].name, "J17-14", 8);
892 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
893 b->pins[pos].gpio.pinmap = 128;
894 b->pins[pos].gpio.parent_id = 0;
895 b->pins[pos].gpio.mux_total = 0;
898 strncpy(b->pins[pos].name, "J18-1", 8);
899 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
900 b->pins[pos].gpio.pinmap = 13;
901 b->pins[pos].gpio.mux_total = 0;
902 b->pins[pos].pwm.pinmap = 1;
903 b->pins[pos].pwm.parent_id = 0;
904 b->pins[pos].pwm.mux_total = 0;
907 strncpy(b->pins[pos].name, "J18-2", 8);
908 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
909 b->pins[pos].gpio.pinmap = 165;
910 b->pins[pos].gpio.mux_total = 0;
912 strncpy(b->pins[pos].name, "J18-3", 8);
913 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
915 strncpy(b->pins[pos].name, "J18-4", 8);
916 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
918 strncpy(b->pins[pos].name, "J18-5", 8);
919 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
922 strncpy(b->pins[pos].name, "J18-6", 8);
923 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
924 b->pins[pos].gpio.pinmap = 19;
925 b->pins[pos].gpio.mux_total = 0;
926 b->pins[pos].i2c.pinmap = 1;
927 b->pins[pos].i2c.mux_total = 0;
930 strncpy(b->pins[pos].name, "J18-7", 8);
931 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
932 b->pins[pos].gpio.pinmap = 12;
933 b->pins[pos].gpio.mux_total = 0;
934 b->pins[pos].pwm.pinmap = 0;
935 b->pins[pos].pwm.parent_id = 0;
936 b->pins[pos].pwm.mux_total = 0;
939 strncpy(b->pins[pos].name, "J18-8", 8);
940 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
941 b->pins[pos].gpio.pinmap = 183;
942 b->pins[pos].gpio.mux_total = 0;
943 b->pins[pos].pwm.pinmap = 3;
944 b->pins[pos].pwm.parent_id = 0;
945 b->pins[pos].pwm.mux_total = 0;
947 strncpy(b->pins[pos].name, "J18-9", 8);
948 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
951 strncpy(b->pins[pos].name, "J18-10", 8);
952 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
953 b->pins[pos].gpio.pinmap = 110;
954 b->pins[pos].gpio.mux_total = 0;
955 b->pins[pos].spi.pinmap = 5;
956 b->pins[pos].spi.mux_total = 0;
958 strncpy(b->pins[pos].name, "J18-11", 8);
959 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
960 b->pins[pos].gpio.pinmap = 114;
961 b->pins[pos].gpio.mux_total = 0;
962 b->pins[pos].spi.pinmap = 5;
963 b->pins[pos].spi.mux_total = 0;
966 strncpy(b->pins[pos].name, "J18-12", 8);
967 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
968 b->pins[pos].gpio.pinmap = 129;
969 b->pins[pos].gpio.mux_total = 0;
971 strncpy(b->pins[pos].name, "J18-13", 8);
972 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
973 b->pins[pos].gpio.pinmap = 130;
974 b->pins[pos].gpio.mux_total = 0;
975 b->pins[pos].uart.pinmap = 0;
976 b->pins[pos].uart.parent_id = 0;
977 b->pins[pos].uart.mux_total = 0;
980 strncpy(b->pins[pos].name, "J18-14", 8);
981 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
984 strncpy(b->pins[pos].name, "J19-1", 8);
985 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
987 strncpy(b->pins[pos].name, "J19-2", 8);
988 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
990 strncpy(b->pins[pos].name, "J19-3", 8);
991 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
994 strncpy(b->pins[pos].name, "J19-4", 8);
995 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
996 b->pins[pos].gpio.pinmap = 44;
997 b->pins[pos].gpio.mux_total = 0;
999 strncpy(b->pins[pos].name, "J19-5", 8);
1000 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1001 b->pins[pos].gpio.pinmap = 46;
1002 b->pins[pos].gpio.mux_total = 0;
1004 strncpy(b->pins[pos].name, "J19-6", 8);
1005 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1006 b->pins[pos].gpio.pinmap = 48;
1007 b->pins[pos].gpio.mux_total = 0;
1010 strncpy(b->pins[pos].name, "J19-7", 8);
1011 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1014 strncpy(b->pins[pos].name, "J19-8", 8);
1015 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1016 b->pins[pos].gpio.pinmap = 131;
1017 b->pins[pos].gpio.mux_total = 0;
1018 b->pins[pos].uart.pinmap = 0;
1019 b->pins[pos].uart.parent_id = 0;
1020 b->pins[pos].uart.mux_total = 0;
1023 strncpy(b->pins[pos].name, "J19-9", 8);
1024 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1025 b->pins[pos].gpio.pinmap = 14;
1026 b->pins[pos].gpio.mux_total = 0;
1029 strncpy(b->pins[pos].name, "J19-10", 8);
1030 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1031 b->pins[pos].gpio.pinmap = 40;
1032 b->pins[pos].gpio.mux_total = 0;
1034 strncpy(b->pins[pos].name, "J19-11", 8);
1035 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1036 b->pins[pos].gpio.pinmap = 43;
1037 b->pins[pos].gpio.mux_total = 0;
1039 strncpy(b->pins[pos].name, "J19-12", 8);
1040 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1041 b->pins[pos].gpio.pinmap = 77;
1042 b->pins[pos].gpio.mux_total = 0;
1044 strncpy(b->pins[pos].name, "J19-13", 8);
1045 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1046 b->pins[pos].gpio.pinmap = 82;
1047 b->pins[pos].gpio.mux_total = 0;
1049 strncpy(b->pins[pos].name, "J19-14", 8);
1050 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1051 b->pins[pos].gpio.pinmap = 83;
1052 b->pins[pos].gpio.mux_total = 0;
1055 strncpy(b->pins[pos].name, "J20-1", 8);
1056 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1058 strncpy(b->pins[pos].name, "J20-2", 8);
1059 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1061 strncpy(b->pins[pos].name, "J20-3", 8);
1062 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1064 strncpy(b->pins[pos].name, "J20-4", 8);
1065 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1066 b->pins[pos].gpio.pinmap = 45;
1067 b->pins[pos].gpio.mux_total = 0;
1069 strncpy(b->pins[pos].name, "J20-5", 8);
1070 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1071 b->pins[pos].gpio.pinmap = 47;
1072 b->pins[pos].gpio.mux_total = 0;
1074 strncpy(b->pins[pos].name, "J20-6", 8);
1075 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1076 b->pins[pos].gpio.pinmap = 49;
1077 b->pins[pos].gpio.mux_total = 0;
1079 strncpy(b->pins[pos].name, "J20-7", 8);
1080 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1081 b->pins[pos].gpio.pinmap = 15;
1082 b->pins[pos].gpio.mux_total = 0;
1084 strncpy(b->pins[pos].name, "J20-8", 8);
1085 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1086 b->pins[pos].gpio.pinmap = 84;
1087 b->pins[pos].gpio.mux_total = 0;
1089 strncpy(b->pins[pos].name, "J20-9", 8);
1090 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1091 b->pins[pos].gpio.pinmap = 42;
1092 b->pins[pos].gpio.mux_total = 0;
1094 strncpy(b->pins[pos].name, "J20-10", 8);
1095 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1096 b->pins[pos].gpio.pinmap = 41;
1097 b->pins[pos].gpio.mux_total = 0;
1099 strncpy(b->pins[pos].name, "J20-11", 8);
1100 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1101 b->pins[pos].gpio.pinmap = 78;
1102 b->pins[pos].gpio.mux_total = 0;
1104 strncpy(b->pins[pos].name, "J20-12", 8);
1105 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1106 b->pins[pos].gpio.pinmap = 79;
1107 b->pins[pos].gpio.mux_total = 0;
1109 strncpy(b->pins[pos].name, "J20-13", 8);
1110 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1111 b->pins[pos].gpio.pinmap = 80;
1112 b->pins[pos].gpio.mux_total = 0;
1114 strncpy(b->pins[pos].name, "J20-14", 8);
1115 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1116 b->pins[pos].gpio.pinmap = 81;
1117 b->pins[pos].gpio.mux_total = 0;
1121 b->i2c_bus_count = 9;
1124 for (ici = 0; ici < 9; ici++) {
1125 b->i2c_bus[ici].bus_id = -1;
1127 b->i2c_bus[1].bus_id = 1;
1128 b->i2c_bus[1].sda = 7;
1129 b->i2c_bus[1].scl = 19;
1131 b->i2c_bus[6].bus_id = 6;
1132 b->i2c_bus[6].sda = 8;
1133 b->i2c_bus[6].scl = 6;
1135 b->spi_bus_count = 1;
1137 b->spi_bus[0].bus_id = 5;
1138 b->spi_bus[0].slave_s = 1;
1139 b->spi_bus[0].cs = 23;
1140 b->spi_bus[0].mosi = 11;
1141 b->spi_bus[0].miso = 24;
1142 b->spi_bus[0].sclk = 10;
1144 b->uart_dev_count = 1;
1145 b->def_uart_dev = 0;
1146 b->uart_dev[0].rx = 26;
1147 b->uart_dev[0].tx = 35;
1148 b->uart_dev[0].device_path = UART_DEV_PATH;
1150 return MRAA_SUCCESS;
1154 mraa_intel_edison_fab_c()
1156 mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
1161 b->platform_name = PLATFORM_NAME;
1162 // This seciton will also check if the arduino board is there
1163 tristate = mraa_gpio_init_raw(214);
1164 if (tristate == NULL) {
1165 syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
1166 assuming Intel Edison Miniboard\n");
1167 if (mraa_intel_edison_miniboard(b) != MRAA_SUCCESS) {
1172 // Now Assuming the edison is attached to the Arduino board.
1173 b->phy_pin_count = 20;
1177 b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
1178 if (b->adv_func == NULL) {
1181 b->adv_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
1182 b->adv_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
1183 b->adv_func->gpio_close_pre = &mraa_intel_edison_gpio_close_pre;
1184 b->adv_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
1185 b->adv_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
1186 b->adv_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
1187 b->adv_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
1188 b->adv_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
1189 b->adv_func->aio_init_post = &mraa_intel_edison_aio_init_post;
1190 b->adv_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
1191 b->adv_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
1192 b->adv_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
1193 b->adv_func->spi_init_post = &mraa_intel_edison_spi_init_post;
1194 b->adv_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
1195 b->adv_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
1196 b->adv_func->uart_init_post = &mraa_intel_edison_uart_init_post;
1197 b->adv_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
1198 b->adv_func->spi_lsbmode_replace = &mraa_intel_edison_spi_lsbmode_replace;
1200 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_EDISON_PINCOUNT);
1201 if (b->pins == NULL) {
1206 mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
1207 mraa_intel_edison_misc_spi();
1210 b->adc_supported = 10;
1211 b->pwm_default_period = 5000;
1212 b->pwm_max_period = 218453;
1213 b->pwm_min_period = 1;
1215 strncpy(b->pins[0].name, "IO0", 8);
1216 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1217 b->pins[0].gpio.pinmap = 130;
1218 b->pins[0].gpio.parent_id = 0;
1219 b->pins[0].gpio.mux_total = 0;
1220 b->pins[0].uart.pinmap = 0;
1221 b->pins[0].uart.parent_id = 0;
1222 b->pins[0].uart.mux_total = 0;
1224 strncpy(b->pins[1].name, "IO1", 8);
1225 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1226 b->pins[1].gpio.pinmap = 131;
1227 b->pins[1].gpio.parent_id = 0;
1228 b->pins[1].gpio.mux_total = 0;
1229 b->pins[1].uart.pinmap = 0;
1230 b->pins[1].uart.parent_id = 0;
1231 b->pins[1].uart.mux_total = 0;
1233 strncpy(b->pins[2].name, "IO2", 8);
1234 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1235 b->pins[2].gpio.pinmap = 128;
1236 b->pins[2].gpio.parent_id = 0;
1237 b->pins[2].gpio.mux_total = 0;
1239 strncpy(b->pins[3].name, "IO3", 8);
1240 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
1241 b->pins[3].gpio.pinmap = 12;
1242 b->pins[3].gpio.parent_id = 0;
1243 b->pins[3].gpio.mux_total = 0;
1244 b->pins[3].pwm.pinmap = 0;
1245 b->pins[3].pwm.parent_id = 0;
1246 b->pins[3].pwm.mux_total = 0;
1248 strncpy(b->pins[4].name, "IO4", 8);
1249 b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1250 b->pins[4].gpio.pinmap = 129;
1251 b->pins[4].gpio.parent_id = 0;
1252 b->pins[4].gpio.mux_total = 0;
1254 strncpy(b->pins[5].name, "IO5", 8);
1255 b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1256 b->pins[5].gpio.pinmap = 13;
1257 b->pins[5].gpio.parent_id = 0;
1258 b->pins[5].gpio.mux_total = 0;
1259 b->pins[5].pwm.pinmap = 1;
1260 b->pins[5].pwm.parent_id = 0;
1261 b->pins[5].pwm.mux_total = 0;
1263 strncpy(b->pins[6].name, "IO6", 8);
1264 b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1265 b->pins[6].gpio.pinmap = 182;
1266 b->pins[6].gpio.parent_id = 0;
1267 b->pins[6].gpio.mux_total = 0;
1268 b->pins[6].pwm.pinmap = 2;
1269 b->pins[6].pwm.parent_id = 0;
1270 b->pins[6].pwm.mux_total = 0;
1272 strncpy(b->pins[7].name, "IO7", 8);
1273 b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1274 b->pins[7].gpio.pinmap = 48;
1275 b->pins[7].gpio.parent_id = 0;
1276 b->pins[7].gpio.mux_total = 0;
1278 strncpy(b->pins[8].name, "IO8", 8);
1279 b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1280 b->pins[8].gpio.pinmap = 49;
1281 b->pins[8].gpio.parent_id = 0;
1282 b->pins[8].gpio.mux_total = 0;
1284 strncpy(b->pins[9].name, "IO9", 8);
1285 b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1286 b->pins[9].gpio.pinmap = 183;
1287 b->pins[9].gpio.parent_id = 0;
1288 b->pins[9].gpio.mux_total = 0;
1289 b->pins[9].pwm.pinmap = 3;
1290 b->pins[9].pwm.parent_id = 0;
1291 b->pins[9].pwm.mux_total = 0;
1293 strncpy(b->pins[10].name, "IO10", 8);
1294 b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1295 b->pins[10].gpio.pinmap = 41;
1296 b->pins[10].gpio.parent_id = 0;
1297 b->pins[10].gpio.mux_total = 2;
1298 b->pins[10].gpio.mux[0].pin = 263;
1299 b->pins[10].gpio.mux[0].value = 1;
1300 b->pins[10].gpio.mux[1].pin = 240;
1301 b->pins[10].gpio.mux[1].value = 0;
1302 b->pins[10].spi.pinmap = 5;
1303 b->pins[10].spi.mux_total = 2;
1304 b->pins[10].spi.mux[0].pin = 263;
1305 b->pins[10].spi.mux[0].value = 1;
1306 b->pins[10].spi.mux[1].pin = 240;
1307 b->pins[10].spi.mux[1].value = 1;
1309 strncpy(b->pins[11].name, "IO11", 8);
1310 b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1311 b->pins[11].gpio.pinmap = 43;
1312 b->pins[11].gpio.parent_id = 0;
1313 b->pins[11].gpio.mux_total = 2;
1314 b->pins[11].gpio.mux[0].pin = 262;
1315 b->pins[11].gpio.mux[0].value = 1;
1316 b->pins[11].gpio.mux[1].pin = 241;
1317 b->pins[11].gpio.mux[1].value = 0;
1318 b->pins[11].spi.pinmap = 5;
1319 b->pins[11].spi.mux_total = 2;
1320 b->pins[11].spi.mux[0].pin = 262;
1321 b->pins[11].spi.mux[0].value = 1;
1322 b->pins[11].spi.mux[1].pin = 241;
1323 b->pins[11].spi.mux[1].value = 1;
1325 strncpy(b->pins[12].name, "IO12", 8);
1326 b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1327 b->pins[12].gpio.pinmap = 42;
1328 b->pins[12].gpio.parent_id = 0;
1329 b->pins[12].gpio.mux_total = 1;
1330 b->pins[12].gpio.mux[0].pin = 242;
1331 b->pins[12].gpio.mux[0].value = 0;
1332 b->pins[12].spi.pinmap = 5;
1333 b->pins[12].spi.mux_total = 1;
1334 b->pins[12].spi.mux[0].pin = 242;
1335 b->pins[12].spi.mux[0].value = 1;
1337 strncpy(b->pins[13].name, "IO13", 8);
1338 b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1339 b->pins[13].gpio.pinmap = 40;
1340 b->pins[13].gpio.parent_id = 0;
1341 b->pins[13].gpio.mux_total = 1;
1342 b->pins[13].gpio.mux[0].pin = 243;
1343 b->pins[13].gpio.mux[0].value = 0;
1344 b->pins[13].spi.pinmap = 5;
1345 b->pins[13].spi.mux_total = 1;
1346 b->pins[13].spi.mux[0].pin = 243;
1347 b->pins[13].spi.mux[0].value = 1;
1349 strncpy(b->pins[14].name, "A0", 8);
1350 b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1351 b->pins[14].aio.pinmap = 0;
1352 b->pins[14].aio.mux_total = 1;
1353 b->pins[14].aio.mux[0].pin = 200;
1354 b->pins[14].aio.mux[0].value = 1;
1355 b->pins[14].gpio.pinmap = 44;
1356 b->pins[14].gpio.mux_total = 1;
1357 b->pins[14].gpio.mux[0].pin = 200;
1358 b->pins[14].gpio.mux[0].value = 0;
1360 strncpy(b->pins[15].name, "A1", 8);
1361 b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1362 b->pins[15].aio.pinmap = 1;
1363 b->pins[15].aio.mux_total = 1;
1364 b->pins[15].aio.mux[0].pin = 201;
1365 b->pins[15].aio.mux[0].value = 1;
1366 b->pins[15].gpio.pinmap = 45;
1367 b->pins[15].gpio.mux_total = 1;
1368 b->pins[15].gpio.mux[0].pin = 201;
1369 b->pins[15].gpio.mux[0].value = 0;
1371 strncpy(b->pins[16].name, "A2", 8);
1372 b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1373 b->pins[16].aio.pinmap = 2;
1374 b->pins[16].aio.mux_total = 1;
1375 b->pins[16].aio.mux[0].pin = 202;
1376 b->pins[16].aio.mux[0].value = 1;
1377 b->pins[16].gpio.pinmap = 46;
1378 b->pins[16].gpio.mux_total = 1;
1379 b->pins[16].gpio.mux[0].pin = 202;
1380 b->pins[16].gpio.mux[0].value = 0;
1382 strncpy(b->pins[17].name, "A3", 8);
1383 b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1384 b->pins[17].aio.pinmap = 3;
1385 b->pins[17].aio.mux_total = 1;
1386 b->pins[17].aio.mux[0].pin = 203;
1387 b->pins[17].aio.mux[0].value = 1;
1388 b->pins[17].gpio.pinmap = 47;
1389 b->pins[17].gpio.mux_total = 1;
1390 b->pins[17].gpio.mux[0].pin = 203;
1391 b->pins[17].gpio.mux[0].value = 0;
1393 strncpy(b->pins[18].name, "A4", 8);
1394 b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1395 b->pins[18].i2c.pinmap = 1;
1396 b->pins[18].i2c.mux_total = 1;
1397 b->pins[18].i2c.mux[0].pin = 204;
1398 b->pins[18].i2c.mux[0].value = 0;
1399 b->pins[18].aio.pinmap = 4;
1400 b->pins[18].aio.mux_total = 1;
1401 b->pins[18].aio.mux[0].pin = 204;
1402 b->pins[18].aio.mux[0].value = 1;
1403 b->pins[18].gpio.pinmap = 14;
1404 b->pins[18].gpio.mux_total = 1;
1405 b->pins[18].gpio.mux[0].pin = 204;
1406 b->pins[18].gpio.mux[0].value = 0;
1408 strncpy(b->pins[19].name, "A5", 8);
1409 b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1410 b->pins[19].i2c.pinmap = 1;
1411 b->pins[19].i2c.mux_total = 1;
1412 b->pins[19].i2c.mux[0].pin = 205;
1413 b->pins[19].i2c.mux[0].value = 0;
1414 b->pins[19].aio.pinmap = 5;
1415 b->pins[19].aio.mux_total = 1;
1416 b->pins[19].aio.mux[0].pin = 205;
1417 b->pins[19].aio.mux[0].value = 1;
1418 b->pins[19].gpio.pinmap = 165;
1419 b->pins[19].gpio.mux_total = 1;
1420 b->pins[19].gpio.mux[0].pin = 205;
1421 b->pins[19].gpio.mux[0].value = 0;
1424 b->i2c_bus_count = 9;
1427 for (ici = 0; ici < 9; ici++) {
1428 b->i2c_bus[ici].bus_id = -1;
1430 b->i2c_bus[6].bus_id = 6;
1431 b->i2c_bus[6].sda = 18;
1432 b->i2c_bus[6].scl = 19;
1434 b->spi_bus_count = 1;
1436 b->spi_bus[0].bus_id = 5;
1437 b->spi_bus[0].slave_s = 1;
1438 b->spi_bus[0].cs = 10;
1439 b->spi_bus[0].mosi = 11;
1440 b->spi_bus[0].miso = 12;
1441 b->spi_bus[0].sclk = 13;
1443 b->uart_dev_count = 1;
1444 b->def_uart_dev = 0;
1445 b->uart_dev[0].rx = 0;
1446 b->uart_dev[0].tx = 1;
1447 b->uart_dev[0].device_path = UART_DEV_PATH;
1450 for (il = 0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
1451 pinmodes[il].gpio.sysfs = -1;
1452 pinmodes[il].gpio.mode = -1;
1453 pinmodes[il].pwm.sysfs = -1;
1454 pinmodes[il].pwm.mode = -1;
1455 pinmodes[il].i2c.sysfs = -1;
1456 pinmodes[il].i2c.mode = -1;
1457 pinmodes[il].spi.sysfs = -1;
1458 pinmodes[il].spi.mode = -1;
1459 pinmodes[il].uart.sysfs = -1;
1460 pinmodes[il].uart.mode = -1;
1462 pinmodes[0].gpio.sysfs = 130;
1463 pinmodes[0].gpio.mode = 0;
1464 pinmodes[0].uart.sysfs = 130;
1465 pinmodes[0].uart.mode = 1;
1466 pinmodes[1].gpio.sysfs = 131;
1467 pinmodes[1].gpio.mode = 0;
1468 pinmodes[1].uart.sysfs = 131;
1469 pinmodes[1].uart.mode = 1;
1470 pinmodes[2].gpio.sysfs = 128;
1471 pinmodes[2].gpio.mode = 0;
1472 pinmodes[2].uart.sysfs = 128;
1473 pinmodes[2].uart.mode = 1;
1474 pinmodes[3].gpio.sysfs = 12;
1475 pinmodes[3].gpio.mode = 0;
1476 pinmodes[3].pwm.sysfs = 12;
1477 pinmodes[3].pwm.mode = 1;
1479 pinmodes[4].gpio.sysfs = 129;
1480 pinmodes[4].gpio.mode = 0;
1481 pinmodes[4].uart.sysfs = 129;
1482 pinmodes[4].uart.mode = 1;
1483 pinmodes[5].gpio.sysfs = 13;
1484 pinmodes[5].gpio.mode = 0;
1485 pinmodes[5].pwm.sysfs = 13;
1486 pinmodes[5].pwm.mode = 1;
1487 pinmodes[6].gpio.sysfs = 182;
1488 pinmodes[6].gpio.mode = 0;
1489 pinmodes[6].pwm.sysfs = 182;
1490 pinmodes[6].pwm.mode = 1;
1492 // 7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
1493 pinmodes[9].gpio.sysfs = 183;
1494 pinmodes[9].gpio.mode = 0;
1495 pinmodes[9].pwm.sysfs = 183;
1496 pinmodes[9].pwm.mode = 1;
1498 pinmodes[10].gpio.sysfs = 41;
1499 pinmodes[10].gpio.mode = 0;
1500 pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
1501 pinmodes[10].spi.mode = 1;
1503 pinmodes[11].gpio.sysfs = 43;
1504 pinmodes[11].gpio.mode = 0;
1505 pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
1506 pinmodes[11].spi.mode = 1;
1508 pinmodes[12].gpio.sysfs = 42;
1509 pinmodes[12].gpio.mode = 0;
1510 pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
1511 pinmodes[12].spi.mode = 1;
1513 pinmodes[13].gpio.sysfs = 40;
1514 pinmodes[13].gpio.mode = 0;
1515 pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
1516 pinmodes[13].spi.mode = 1;
1517 // Everything else but A4 A5 LEAVE
1518 pinmodes[18].gpio.sysfs = 14;
1519 pinmodes[18].gpio.mode = 0;
1520 pinmodes[18].i2c.sysfs = 28;
1521 pinmodes[18].i2c.mode = 1;
1523 pinmodes[19].gpio.sysfs = 165;
1524 pinmodes[19].gpio.mode = 0;
1525 pinmodes[19].i2c.sysfs = 27;
1526 pinmodes[19].i2c.mode = 1;
1530 syslog(LOG_CRIT, "edison: Arduino board failed to initialise");