2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Copyright (c) 2014 Intel Corporation.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
20 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
21 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
22 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #include <sys/ioctl.h>
30 #include <linux/spi/spidev.h>
33 #include "x86/intel_edison_fab_c.h"
35 #define PLATFORM_NAME "Intel Edison"
36 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
37 #define SYSFS_PINMODE_PATH "/sys/kernel/debug/gpio_debug/gpio"
39 #define MAX_MODE_SIZE 8
41 // This is an absolute path to a resource file found within sysfs.
42 // Might not always be correct. First thing to check if mmap stops
43 // working. Check the device for 0x1199 and Intel Vendor (0x8086)
44 #define MMAP_PATH "/sys/devices/pci0000:00/0000:00:0c.0/resource0"
45 #define UART_DEV_PATH "/dev/ttyMFD1"
50 } mraa_intel_edision_pindef_t;
53 mraa_intel_edision_pindef_t gpio;
54 mraa_intel_edision_pindef_t pwm;
55 mraa_intel_edision_pindef_t i2c;
56 mraa_intel_edision_pindef_t spi;
57 mraa_intel_edision_pindef_t uart;
58 } mraa_intel_edison_pinmodes_t;
60 static mraa_gpio_context tristate;
62 static mraa_intel_edison_pinmodes_t pinmodes[MRAA_INTEL_EDISON_PINCOUNT];
63 static unsigned int outputen[] = { 248, 249, 250, 251, 252, 253, 254, 255, 256, 257,
64 258, 259, 260, 261, 232, 233, 234, 235, 236, 237 };
65 static mraa_gpio_context agpioOutputen[sizeof(outputen) / sizeof(outputen[0])];
67 static unsigned int pullup_map[] = { 216, 217, 218, 219, 220, 221, 222, 223, 224, 225,
68 226, 227, 228, 229, 208, 209, 210, 211, 212, 213 };
69 static int miniboard = 0;
72 static uint8_t* mmap_reg = NULL;
73 static int mmap_fd = 0;
75 static unsigned int mmap_count = 0;
78 mraa_intel_edison_spi_lsbmode_replace(mraa_spi_context dev, mraa_boolean_t lsb)
80 uint8_t lsb_mode = (uint8_t) lsb;
82 // Edison doesn't support LSB_FIRST, we need to react appropriately
84 if (ioctl(dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
85 syslog(LOG_ERR, "spi: Failed to set bit order");
86 return MRAA_ERROR_INVALID_RESOURCE;
88 if (ioctl(dev->devfd, SPI_IOC_RD_LSB_FIRST, &lsb_mode) < 0) {
89 syslog(LOG_ERR, "spi: Failed to set bit order");
90 return MRAA_ERROR_INVALID_RESOURCE;
93 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
101 mraa_intel_edison_pinmode_change(int sysfs, int mode)
107 char buffer[MAX_SIZE];
108 snprintf(buffer, MAX_SIZE, SYSFS_PINMODE_PATH "%i/current_pinmux", sysfs);
109 int modef = open(buffer, O_WRONLY);
111 syslog(LOG_ERR, "edison: Failed to open SoC pinmode for opening");
112 return MRAA_ERROR_INVALID_RESOURCE;
115 mraa_result_t ret = MRAA_SUCCESS;
116 char mode_buf[MAX_MODE_SIZE];
117 int length = sprintf(mode_buf, "mode%u", mode);
118 if (write(modef, mode_buf, length * sizeof(char)) == -1) {
119 ret = MRAA_ERROR_INVALID_RESOURCE;
127 mraa_intel_edison_gpio_dir_pre(mraa_gpio_context dev, mraa_gpio_dir_t dir)
130 if (dev->phy_pin >= 0) {
131 if (mraa_gpio_write(tristate, 0) != MRAA_SUCCESS) {
132 // call can sometimes fail, this does not actually mean much except
133 // that the kernel drivers don't always behave very well
134 syslog(LOG_NOTICE, "edison: Failed to write to tristate");
136 int pin = dev->phy_pin;
138 if (!agpioOutputen[pin]) {
139 agpioOutputen[pin] = mraa_gpio_init_raw(outputen[pin]);
140 if (agpioOutputen[pin] == NULL) {
141 return MRAA_ERROR_INVALID_RESOURCE;
143 if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
144 return MRAA_ERROR_INVALID_RESOURCE;
148 if (dir == MRAA_GPIO_OUT) {
151 if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
152 return MRAA_ERROR_INVALID_RESOURCE;
160 mraa_intel_edison_gpio_dir_post(mraa_gpio_context dev, mraa_gpio_dir_t dir)
162 if (dev->phy_pin >= 0) {
163 return mraa_gpio_write(tristate, 1);
169 mraa_intel_edison_gpio_init_post(mraa_gpio_context dev)
172 return MRAA_ERROR_INVALID_RESOURCE;
176 if (miniboard == 1) {
180 sysfs = pinmodes[dev->phy_pin].gpio.sysfs;
181 mode = pinmodes[dev->phy_pin].gpio.mode;
184 return mraa_intel_edison_pinmode_change(sysfs, mode);
188 mraa_intel_edison_gpio_close_pre(mraa_gpio_context dev)
190 if (dev->phy_pin >= 0) {
191 int pin = dev->phy_pin;
192 if (agpioOutputen[pin]) {
193 mraa_gpio_close(agpioOutputen[pin]);
194 agpioOutputen[pin] = NULL;
201 mraa_intel_edison_i2c_init_pre(unsigned int bus)
203 if (miniboard == 0) {
205 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
208 mraa_gpio_write(tristate, 0);
209 mraa_gpio_context io18_gpio = mraa_gpio_init_raw(14);
210 mraa_gpio_context io19_gpio = mraa_gpio_init_raw(165);
211 mraa_gpio_dir(io18_gpio, MRAA_GPIO_IN);
212 mraa_gpio_dir(io19_gpio, MRAA_GPIO_IN);
213 mraa_gpio_close(io18_gpio);
214 mraa_gpio_close(io19_gpio);
216 mraa_gpio_context io18_enable = mraa_gpio_init_raw(236);
217 mraa_gpio_context io19_enable = mraa_gpio_init_raw(237);
218 mraa_gpio_dir(io18_enable, MRAA_GPIO_OUT);
219 mraa_gpio_dir(io19_enable, MRAA_GPIO_OUT);
220 mraa_gpio_write(io18_enable, 0);
221 mraa_gpio_write(io19_enable, 0);
222 mraa_gpio_close(io18_enable);
223 mraa_gpio_close(io19_enable);
225 mraa_gpio_context io18_pullup = mraa_gpio_init_raw(212);
226 mraa_gpio_context io19_pullup = mraa_gpio_init_raw(213);
227 mraa_gpio_dir(io18_pullup, MRAA_GPIO_IN);
228 mraa_gpio_dir(io19_pullup, MRAA_GPIO_IN);
229 mraa_gpio_close(io18_pullup);
230 mraa_gpio_close(io19_pullup);
232 mraa_intel_edison_pinmode_change(28, 1);
233 mraa_intel_edison_pinmode_change(27, 1);
235 mraa_gpio_write(tristate, 1);
237 if (bus != 6 && bus != 1) {
238 syslog(LOG_ERR, "edison: You can't use that bus, switching to bus 6");
241 int scl = plat->pins[plat->i2c_bus[bus].scl].gpio.pinmap;
242 int sda = plat->pins[plat->i2c_bus[bus].sda].gpio.pinmap;
243 mraa_intel_edison_pinmode_change(sda, 1);
244 mraa_intel_edison_pinmode_change(scl, 1);
251 mraa_intel_edison_misc_spi()
253 // These arrays must have same length
254 static const int gpio_pin_list[] = {263, 240, 262, 241, 242, 243};
255 static int pin_num = sizeof(gpio_pin_list) / sizeof(int);
256 static const int gpio_val_list[] = {1, 0, 1, 0, 0, 0};
257 static const int gpio_dir_list[] = {MRAA_GPIO_OUT, MRAA_GPIO_OUT,
258 MRAA_GPIO_OUT, MRAA_GPIO_OUT,
259 MRAA_GPIO_OUT, MRAA_GPIO_OUT};
263 MRAA_RETURN_FOR_ERROR(mraa_gpio_write(tristate, 0));
265 for (i = 0; i < pin_num; i++) {
266 mraa_gpio_context io = mraa_gpio_init_raw(gpio_pin_list[i]);
268 ret = mraa_gpio_dir(io, gpio_dir_list[i]);
269 if (ret == MRAA_SUCCESS) {
270 ret = mraa_gpio_write(io, gpio_val_list[i]);
273 //Don't care return value of close()
275 MRAA_RETURN_FOR_ERROR(ret);
277 syslog(LOG_ERR, "edison: Failed to init raw gpio %d!",gpio_pin_list[i]);
278 return MRAA_ERROR_NO_RESOURCES;
282 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(115, 1));
283 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(114, 1));
284 MRAA_RETURN_FOR_ERROR(mraa_intel_edison_pinmode_change(109, 1));
285 MRAA_RETURN_FOR_ERROR(mraa_gpio_write(tristate, 1));
291 mraa_intel_edison_aio_get_fp(mraa_aio_context dev)
293 char file_path[64] = "";
295 snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device1/in_voltage%d_raw", dev->channel);
297 dev->adc_in_fp = open(file_path, O_RDONLY);
298 if (dev->adc_in_fp == -1) {
299 syslog(LOG_ERR, "edison: Failed to open Analog input raw file %s for "
302 return MRAA_ERROR_INVALID_RESOURCE;
309 mraa_intel_edison_aio_init_pre(unsigned int aio)
311 if (aio > plat->aio_count) {
312 syslog(LOG_ERR, "edison: Invalid analog input channel");
313 return MRAA_ERROR_INVALID_RESOURCE;
317 mraa_gpio_context output_e;
318 output_e = mraa_gpio_init_raw(outputen[pin]);
319 if (output_e == NULL) {
320 return MRAA_ERROR_INVALID_RESOURCE;
322 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
323 mraa_gpio_close(output_e);
324 return MRAA_ERROR_INVALID_RESOURCE;
326 if (mraa_gpio_write(output_e, 0) != MRAA_SUCCESS) {
327 mraa_gpio_close(output_e);
328 return MRAA_ERROR_INVALID_RESOURCE;
330 mraa_gpio_close(output_e);
332 mraa_gpio_context pullup_pin;
333 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
334 if (pullup_pin == NULL) {
335 return MRAA_ERROR_INVALID_RESOURCE;
337 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
338 mraa_gpio_close(pullup_pin);
339 return MRAA_ERROR_INVALID_RESOURCE;
341 mraa_gpio_close(pullup_pin);
347 mraa_intel_edison_aio_init_post(mraa_aio_context dev)
349 return mraa_gpio_write(tristate, 1);
353 mraa_intel_edison_pwm_init_pre(int pin)
355 if (miniboard == 1) {
356 return mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
358 if (pin < 0 || pin > 19) {
359 return MRAA_ERROR_INVALID_RESOURCE;
362 if (!plat->pins[pin].capabilites.pwm) {
363 return MRAA_ERROR_INVALID_RESOURCE;
366 mraa_gpio_context output_e;
367 output_e = mraa_gpio_init_raw(outputen[pin]);
368 if (output_e == NULL) {
369 return MRAA_ERROR_INVALID_RESOURCE;
371 if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
372 mraa_gpio_close(output_e);
373 return MRAA_ERROR_INVALID_RESOURCE;
375 if (mraa_gpio_write(output_e, 1) != MRAA_SUCCESS) {
376 mraa_gpio_close(output_e);
377 return MRAA_ERROR_INVALID_RESOURCE;
379 mraa_gpio_close(output_e);
381 mraa_gpio_context pullup_pin;
382 pullup_pin = mraa_gpio_init_raw(pullup_map[pin]);
383 if (pullup_pin == NULL) {
384 return MRAA_ERROR_INVALID_RESOURCE;
386 if (mraa_gpio_dir(pullup_pin, MRAA_GPIO_IN) != MRAA_SUCCESS) {
387 mraa_gpio_close(pullup_pin);
388 return MRAA_ERROR_INVALID_RESOURCE;
390 mraa_gpio_close(pullup_pin);
391 mraa_intel_edison_pinmode_change(plat->pins[pin].gpio.pinmap, 1);
397 mraa_intel_edison_pwm_init_post(mraa_pwm_context pwm)
399 return mraa_gpio_write(tristate, 1);
403 mraa_intel_edison_spi_init_pre(int bus)
405 if (miniboard == 1) {
406 mraa_intel_edison_pinmode_change(115, 1);
407 mraa_intel_edison_pinmode_change(114, 1);
408 mraa_intel_edison_pinmode_change(109, 1);
411 mraa_gpio_write(tristate, 0);
413 mraa_gpio_context io10_out = mraa_gpio_init_raw(258);
414 mraa_gpio_context io11_out = mraa_gpio_init_raw(259);
415 mraa_gpio_context io12_out = mraa_gpio_init_raw(260);
416 mraa_gpio_context io13_out = mraa_gpio_init_raw(261);
417 mraa_gpio_dir(io10_out, MRAA_GPIO_OUT);
418 mraa_gpio_dir(io11_out, MRAA_GPIO_OUT);
419 mraa_gpio_dir(io12_out, MRAA_GPIO_OUT);
420 mraa_gpio_dir(io13_out, MRAA_GPIO_OUT);
422 mraa_gpio_write(io10_out, 1);
423 mraa_gpio_write(io11_out, 1);
424 mraa_gpio_write(io12_out, 0);
425 mraa_gpio_write(io13_out, 1);
427 mraa_gpio_close(io10_out);
428 mraa_gpio_close(io11_out);
429 mraa_gpio_close(io12_out);
430 mraa_gpio_close(io13_out);
432 mraa_gpio_context io10_pull = mraa_gpio_init_raw(226);
433 mraa_gpio_context io11_pull = mraa_gpio_init_raw(227);
434 mraa_gpio_context io12_pull = mraa_gpio_init_raw(228);
435 mraa_gpio_context io13_pull = mraa_gpio_init_raw(229);
437 mraa_gpio_dir(io10_pull, MRAA_GPIO_IN);
438 mraa_gpio_dir(io11_pull, MRAA_GPIO_IN);
439 mraa_gpio_dir(io12_pull, MRAA_GPIO_IN);
440 mraa_gpio_dir(io13_pull, MRAA_GPIO_IN);
442 mraa_gpio_close(io10_pull);
443 mraa_gpio_close(io11_pull);
444 mraa_gpio_close(io12_pull);
445 mraa_gpio_close(io13_pull);
451 mraa_intel_edison_spi_init_post(mraa_spi_context spi)
453 return mraa_gpio_write(tristate, 1);
457 mraa_intel_edison_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode)
459 if (dev->value_fp != -1) {
460 if (close(dev->value_fp) != 0) {
461 return MRAA_ERROR_INVALID_RESOURCE;
466 mraa_gpio_context pullup_e;
467 pullup_e = mraa_gpio_init_raw(pullup_map[dev->phy_pin]);
468 if (pullup_e == NULL) {
469 return MRAA_ERROR_INVALID_RESOURCE;
471 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_IN) != MRAA_SUCCESS) {
472 syslog(LOG_ERR, "edison: Failed to set gpio mode-pullup");
473 mraa_gpio_close(pullup_e);
474 return MRAA_ERROR_INVALID_RESOURCE;
479 case MRAA_GPIO_STRONG:
481 case MRAA_GPIO_PULLUP:
484 case MRAA_GPIO_PULLDOWN:
491 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
494 if (mraa_gpio_dir(pullup_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) {
495 syslog(LOG_ERR, "edison: Error setting pullup");
496 mraa_gpio_close(pullup_e);
497 return MRAA_ERROR_INVALID_RESOURCE;
499 if (mraa_gpio_write(pullup_e, value) != MRAA_SUCCESS) {
500 syslog(LOG_ERR, "edison: Error setting pullup");
501 mraa_gpio_close(pullup_e);
502 return MRAA_ERROR_INVALID_RESOURCE;
506 return mraa_gpio_close(pullup_e);
510 mraa_intel_edsion_mb_gpio_mode(mraa_gpio_context dev, mraa_gpio_mode_t mode)
512 if (dev->value_fp != -1) {
513 if (close(dev->value_fp) != 0) {
514 return MRAA_ERROR_INVALID_RESOURCE;
519 char filepath[MAX_SIZE];
520 snprintf(filepath, MAX_SIZE, SYSFS_PINMODE_PATH "%d/current_pullmode", dev->pin);
522 int drive = open(filepath, O_WRONLY);
524 syslog(LOG_ERR, "edison: Failed to open drive for writing");
525 return MRAA_ERROR_INVALID_RESOURCE;
531 case MRAA_GPIO_STRONG:
534 case MRAA_GPIO_PULLUP:
535 length = snprintf(bu, sizeof(bu), "pullup");
537 case MRAA_GPIO_PULLDOWN:
538 length = snprintf(bu, sizeof(bu), "pulldown");
541 length = snprintf(bu, sizeof(bu), "nopull");
545 return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
547 if (write(drive, bu, length * sizeof(char)) == -1) {
548 syslog(LOG_ERR, "edison: Failed to write to drive mode");
550 return MRAA_ERROR_INVALID_RESOURCE;
553 if (close(drive) != 0) {
554 return MRAA_ERROR_INVALID_RESOURCE;
560 mraa_intel_edison_uart_init_pre(int index)
563 syslog(LOG_ERR, "edison: Failed to write to drive mode");
564 return MRAA_ERROR_INVALID_RESOURCE;
566 if (miniboard == 0) {
567 mraa_gpio_write(tristate, 0);
568 mraa_gpio_context io0_output = mraa_gpio_init_raw(248);
569 mraa_gpio_context io0_pullup = mraa_gpio_init_raw(216);
570 mraa_gpio_context io1_output = mraa_gpio_init_raw(249);
571 mraa_gpio_context io1_pullup = mraa_gpio_init_raw(217);
572 mraa_gpio_dir(io0_output, MRAA_GPIO_OUT);
573 mraa_gpio_dir(io0_pullup, MRAA_GPIO_OUT);
574 mraa_gpio_dir(io1_output, MRAA_GPIO_OUT);
575 mraa_gpio_dir(io1_pullup, MRAA_GPIO_IN);
577 mraa_gpio_write(io0_output, 0);
578 mraa_gpio_write(io0_pullup, 0);
579 mraa_gpio_write(io1_output, 1);
581 mraa_gpio_close(io0_output);
582 mraa_gpio_close(io0_pullup);
583 mraa_gpio_close(io1_output);
584 mraa_gpio_close(io1_pullup);
587 ret = mraa_intel_edison_pinmode_change(130, 1); // IO0 RX
588 ret = mraa_intel_edison_pinmode_change(131, 1); // IO1 TX
593 mraa_intel_edison_uart_init_post(mraa_uart_context uart)
595 return mraa_gpio_write(tristate, 1);
599 mraa_intel_edsion_mmap_unsetup()
601 if (mmap_reg == NULL) {
602 syslog(LOG_ERR, "edison mmap: null register cant unsetup");
603 return MRAA_ERROR_INVALID_RESOURCE;
605 munmap(mmap_reg, mmap_size);
607 if (close(mmap_fd) != 0) {
608 return MRAA_ERROR_INVALID_RESOURCE;
614 mraa_intel_edison_mmap_write(mraa_gpio_context dev, int value)
616 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
625 *(volatile uint32_t*) (mmap_reg + offset + valoff) = (uint32_t)(1 << (dev->pin % 32));
631 mraa_intel_edison_mmap_read(mraa_gpio_context dev)
633 uint8_t offset = ((dev->pin / 32) * sizeof(uint32_t));
636 value = *(volatile uint32_t*) (mmap_reg + 0x04 + offset);
637 if (value & (uint32_t)(1 << (dev->pin % 32))) {
644 mraa_intel_edison_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
647 syslog(LOG_ERR, "edison mmap: context not valid");
648 return MRAA_ERROR_INVALID_HANDLE;
652 if (dev->mmap_write == NULL && dev->mmap_read == NULL) {
653 syslog(LOG_ERR, "edison mmap: can't disable disabled mmap gpio");
654 return MRAA_ERROR_INVALID_PARAMETER;
656 dev->mmap_write = NULL;
657 dev->mmap_read = NULL;
659 if (mmap_count == 0) {
660 return mraa_intel_edsion_mmap_unsetup();
665 if (dev->mmap_write != NULL && dev->mmap_read != NULL) {
666 syslog(LOG_ERR, "edison mmap: can't enable enabled mmap gpio");
667 return MRAA_ERROR_INVALID_PARAMETER;
670 // Might need to make some elements of this thread safe.
671 // For example only allow one thread to enter the following block
672 // to prevent mmap'ing twice.
673 if (mmap_reg == NULL) {
674 if ((mmap_fd = open(MMAP_PATH, O_RDWR)) < 0) {
675 syslog(LOG_ERR, "edison map: unable to open resource0 file");
676 return MRAA_ERROR_INVALID_HANDLE;
680 if (fstat(mmap_fd, &fd_stat) != 0) {
681 syslog(LOG_ERR, "edison map: unable to access resource0 file");
682 return MRAA_ERROR_INVALID_HANDLE;
684 mmap_size = fd_stat.st_size;
687 (uint8_t*) mmap(NULL, fd_stat.st_size, PROT_READ | PROT_WRITE, MAP_FILE | MAP_SHARED, mmap_fd, 0);
688 if (mmap_reg == MAP_FAILED) {
689 syslog(LOG_ERR, "edison mmap: failed to mmap");
692 return MRAA_ERROR_NO_RESOURCES;
695 dev->mmap_write = &mraa_intel_edison_mmap_write;
696 dev->mmap_read = &mraa_intel_edison_mmap_read;
703 mraa_intel_edison_i2c_freq(mraa_i2c_context dev, mraa_i2c_mode_t mode)
707 switch (dev->busnum) {
709 sysnode = open("/sys/devices/pci0000:00/0000:00:08.0/i2c_dw_sysnode/mode", O_RDWR);
712 sysnode = open("/sys/devices/pci0000:00/0000:00:09.1/i2c_dw_sysnode/mode", O_RDWR);
715 syslog(LOG_NOTICE, "i2c bus selected does not support frequency changes");
716 return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
719 return MRAA_ERROR_INVALID_RESOURCE;
726 length = snprintf(bu, sizeof(bu), "std");
729 length = snprintf(bu, sizeof(bu), "fast");
732 length = snprintf(bu, sizeof(bu), "high");
735 syslog(LOG_ERR, "Invalid i2c mode selected");
737 return MRAA_ERROR_INVALID_PARAMETER;
739 if (write(sysnode, bu, length * sizeof(char)) == -1) {
741 return MRAA_ERROR_INVALID_RESOURCE;
748 mraa_intel_edison_miniboard(mraa_board_t* b)
751 b->phy_pin_count = 56;
752 b->gpio_count = 56; // A bit of a hack I suppose
754 b->pwm_default_period = 5000;
755 b->pwm_max_period = 218453;
756 b->pwm_min_period = 1;
758 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * 56);
759 if (b->pins == NULL) {
760 return MRAA_ERROR_UNSPECIFIED;
763 b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
764 if (b->adv_func == NULL) {
766 return MRAA_ERROR_UNSPECIFIED;
768 b->adv_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
769 b->adv_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
770 b->adv_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
771 b->adv_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
772 b->adv_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
773 b->adv_func->gpio_mode_replace = &mraa_intel_edsion_mb_gpio_mode;
774 b->adv_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
775 b->adv_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
778 strncpy(b->pins[pos].name, "J17-1", 8);
779 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
780 b->pins[pos].gpio.pinmap = 182;
781 b->pins[pos].gpio.mux_total = 0;
782 b->pins[pos].pwm.pinmap = 2;
783 b->pins[pos].pwm.parent_id = 0;
784 b->pins[pos].pwm.mux_total = 0;
787 strncpy(b->pins[pos].name, "J17-2", 8);
788 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
790 strncpy(b->pins[pos].name, "J17-3", 8);
791 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
793 strncpy(b->pins[pos].name, "J17-4", 8);
794 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
797 strncpy(b->pins[pos].name, "J17-5", 8);
798 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
799 b->pins[pos].gpio.pinmap = 135;
800 b->pins[pos].gpio.mux_total = 0;
803 strncpy(b->pins[pos].name, "J17-6", 8);
804 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
807 strncpy(b->pins[pos].name, "J17-7", 8);
808 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
809 b->pins[pos].gpio.pinmap = 27;
810 b->pins[pos].gpio.mux_total = 0;
811 b->pins[pos].i2c.pinmap = 1;
812 b->pins[pos].i2c.mux_total = 0;
815 strncpy(b->pins[pos].name, "J17-8", 8);
816 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
817 b->pins[pos].gpio.pinmap = 20;
818 b->pins[pos].gpio.mux_total = 0;
819 b->pins[pos].i2c.pinmap = 1;
820 b->pins[pos].i2c.mux_total = 0;
823 strncpy(b->pins[pos].name, "J17-9", 8);
824 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
825 b->pins[pos].gpio.pinmap = 28;
826 b->pins[pos].gpio.mux_total = 0;
827 b->pins[pos].i2c.pinmap = 1;
828 b->pins[pos].i2c.mux_total = 0;
831 strncpy(b->pins[pos].name, "J17-10", 8);
832 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
833 b->pins[pos].gpio.pinmap = 111;
834 b->pins[pos].gpio.mux_total = 0;
835 b->pins[pos].spi.pinmap = 5;
836 b->pins[pos].spi.mux_total = 0;
839 strncpy(b->pins[pos].name, "J17-11", 8);
840 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
841 b->pins[pos].gpio.pinmap = 109;
842 b->pins[pos].gpio.mux_total = 0;
843 b->pins[pos].spi.pinmap = 5;
844 b->pins[pos].spi.mux_total = 0;
847 strncpy(b->pins[pos].name, "J17-12", 8);
848 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
849 b->pins[pos].gpio.pinmap = 115;
850 b->pins[pos].gpio.mux_total = 0;
851 b->pins[pos].spi.pinmap = 5;
852 b->pins[pos].spi.mux_total = 0;
854 strncpy(b->pins[pos].name, "J17-13", 8);
855 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
858 strncpy(b->pins[pos].name, "J17-14", 8);
859 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
860 b->pins[pos].gpio.pinmap = 128;
861 b->pins[pos].gpio.parent_id = 0;
862 b->pins[pos].gpio.mux_total = 0;
865 strncpy(b->pins[pos].name, "J18-1", 8);
866 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
867 b->pins[pos].gpio.pinmap = 13;
868 b->pins[pos].gpio.mux_total = 0;
869 b->pins[pos].pwm.pinmap = 1;
870 b->pins[pos].pwm.parent_id = 0;
871 b->pins[pos].pwm.mux_total = 0;
874 strncpy(b->pins[pos].name, "J18-2", 8);
875 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
876 b->pins[pos].gpio.pinmap = 165;
877 b->pins[pos].gpio.mux_total = 0;
879 strncpy(b->pins[pos].name, "J18-3", 8);
880 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
882 strncpy(b->pins[pos].name, "J18-4", 8);
883 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
885 strncpy(b->pins[pos].name, "J18-5", 8);
886 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
889 strncpy(b->pins[pos].name, "J18-6", 8);
890 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 };
891 b->pins[pos].gpio.pinmap = 19;
892 b->pins[pos].gpio.mux_total = 0;
893 b->pins[pos].i2c.pinmap = 1;
894 b->pins[pos].i2c.mux_total = 0;
897 strncpy(b->pins[pos].name, "J18-7", 8);
898 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
899 b->pins[pos].gpio.pinmap = 12;
900 b->pins[pos].gpio.mux_total = 0;
901 b->pins[pos].pwm.pinmap = 0;
902 b->pins[pos].pwm.parent_id = 0;
903 b->pins[pos].pwm.mux_total = 0;
906 strncpy(b->pins[pos].name, "J18-8", 8);
907 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
908 b->pins[pos].gpio.pinmap = 183;
909 b->pins[pos].gpio.mux_total = 0;
910 b->pins[pos].pwm.pinmap = 3;
911 b->pins[pos].pwm.parent_id = 0;
912 b->pins[pos].pwm.mux_total = 0;
914 strncpy(b->pins[pos].name, "J18-9", 8);
915 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
918 strncpy(b->pins[pos].name, "J18-10", 8);
919 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
920 b->pins[pos].gpio.pinmap = 110;
921 b->pins[pos].gpio.mux_total = 0;
922 b->pins[pos].spi.pinmap = 5;
923 b->pins[pos].spi.mux_total = 0;
925 strncpy(b->pins[pos].name, "J18-11", 8);
926 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
927 b->pins[pos].gpio.pinmap = 114;
928 b->pins[pos].gpio.mux_total = 0;
929 b->pins[pos].spi.pinmap = 5;
930 b->pins[pos].spi.mux_total = 0;
933 strncpy(b->pins[pos].name, "J18-12", 8);
934 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
935 b->pins[pos].gpio.pinmap = 129;
936 b->pins[pos].gpio.mux_total = 0;
938 strncpy(b->pins[pos].name, "J18-13", 8);
939 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
940 b->pins[pos].gpio.pinmap = 130;
941 b->pins[pos].gpio.mux_total = 0;
942 b->pins[pos].uart.pinmap = 0;
943 b->pins[pos].uart.parent_id = 0;
944 b->pins[pos].uart.mux_total = 0;
947 strncpy(b->pins[pos].name, "J18-14", 8);
948 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
951 strncpy(b->pins[pos].name, "J19-1", 8);
952 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
954 strncpy(b->pins[pos].name, "J19-2", 8);
955 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
957 strncpy(b->pins[pos].name, "J19-3", 8);
958 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
961 strncpy(b->pins[pos].name, "J19-4", 8);
962 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
963 b->pins[pos].gpio.pinmap = 44;
964 b->pins[pos].gpio.mux_total = 0;
966 strncpy(b->pins[pos].name, "J19-5", 8);
967 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
968 b->pins[pos].gpio.pinmap = 46;
969 b->pins[pos].gpio.mux_total = 0;
971 strncpy(b->pins[pos].name, "J19-6", 8);
972 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
973 b->pins[pos].gpio.pinmap = 48;
974 b->pins[pos].gpio.mux_total = 0;
977 strncpy(b->pins[pos].name, "J19-7", 8);
978 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
981 strncpy(b->pins[pos].name, "J19-8", 8);
982 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
983 b->pins[pos].gpio.pinmap = 131;
984 b->pins[pos].gpio.mux_total = 0;
985 b->pins[pos].uart.pinmap = 0;
986 b->pins[pos].uart.parent_id = 0;
987 b->pins[pos].uart.mux_total = 0;
990 strncpy(b->pins[pos].name, "J19-9", 8);
991 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
992 b->pins[pos].gpio.pinmap = 14;
993 b->pins[pos].gpio.mux_total = 0;
996 strncpy(b->pins[pos].name, "J19-10", 8);
997 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
998 b->pins[pos].gpio.pinmap = 40;
999 b->pins[pos].gpio.mux_total = 0;
1001 strncpy(b->pins[pos].name, "J19-11", 8);
1002 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1003 b->pins[pos].gpio.pinmap = 43;
1004 b->pins[pos].gpio.mux_total = 0;
1006 strncpy(b->pins[pos].name, "J19-12", 8);
1007 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1008 b->pins[pos].gpio.pinmap = 77;
1009 b->pins[pos].gpio.mux_total = 0;
1011 strncpy(b->pins[pos].name, "J19-13", 8);
1012 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1013 b->pins[pos].gpio.pinmap = 82;
1014 b->pins[pos].gpio.mux_total = 0;
1016 strncpy(b->pins[pos].name, "J19-14", 8);
1017 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1018 b->pins[pos].gpio.pinmap = 83;
1019 b->pins[pos].gpio.mux_total = 0;
1022 strncpy(b->pins[pos].name, "J20-1", 8);
1023 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1025 strncpy(b->pins[pos].name, "J20-2", 8);
1026 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1028 strncpy(b->pins[pos].name, "J20-3", 8);
1029 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
1031 strncpy(b->pins[pos].name, "J20-4", 8);
1032 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1033 b->pins[pos].gpio.pinmap = 45;
1034 b->pins[pos].gpio.mux_total = 0;
1036 strncpy(b->pins[pos].name, "J20-5", 8);
1037 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1038 b->pins[pos].gpio.pinmap = 47;
1039 b->pins[pos].gpio.mux_total = 0;
1041 strncpy(b->pins[pos].name, "J20-6", 8);
1042 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1043 b->pins[pos].gpio.pinmap = 49;
1044 b->pins[pos].gpio.mux_total = 0;
1046 strncpy(b->pins[pos].name, "J20-7", 8);
1047 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1048 b->pins[pos].gpio.pinmap = 15;
1049 b->pins[pos].gpio.mux_total = 0;
1051 strncpy(b->pins[pos].name, "J20-8", 8);
1052 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1053 b->pins[pos].gpio.pinmap = 84;
1054 b->pins[pos].gpio.mux_total = 0;
1056 strncpy(b->pins[pos].name, "J20-9", 8);
1057 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1058 b->pins[pos].gpio.pinmap = 42;
1059 b->pins[pos].gpio.mux_total = 0;
1061 strncpy(b->pins[pos].name, "J20-10", 8);
1062 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1063 b->pins[pos].gpio.pinmap = 41;
1064 b->pins[pos].gpio.mux_total = 0;
1066 strncpy(b->pins[pos].name, "J20-11", 8);
1067 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1068 b->pins[pos].gpio.pinmap = 78;
1069 b->pins[pos].gpio.mux_total = 0;
1071 strncpy(b->pins[pos].name, "J20-12", 8);
1072 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1073 b->pins[pos].gpio.pinmap = 79;
1074 b->pins[pos].gpio.mux_total = 0;
1076 strncpy(b->pins[pos].name, "J20-13", 8);
1077 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1078 b->pins[pos].gpio.pinmap = 80;
1079 b->pins[pos].gpio.mux_total = 0;
1081 strncpy(b->pins[pos].name, "J20-14", 8);
1082 b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
1083 b->pins[pos].gpio.pinmap = 81;
1084 b->pins[pos].gpio.mux_total = 0;
1088 b->i2c_bus_count = 9;
1091 for (ici = 0; ici < 9; ici++) {
1092 b->i2c_bus[ici].bus_id = -1;
1094 b->i2c_bus[1].bus_id = 1;
1095 b->i2c_bus[1].sda = 7;
1096 b->i2c_bus[1].scl = 19;
1098 b->i2c_bus[6].bus_id = 6;
1099 b->i2c_bus[6].sda = 8;
1100 b->i2c_bus[6].scl = 6;
1102 b->spi_bus_count = 1;
1104 b->spi_bus[0].bus_id = 5;
1105 b->spi_bus[0].slave_s = 1;
1106 b->spi_bus[0].cs = 23;
1107 b->spi_bus[0].mosi = 11;
1108 b->spi_bus[0].miso = 24;
1109 b->spi_bus[0].sclk = 10;
1111 b->uart_dev_count = 1;
1112 b->def_uart_dev = 0;
1113 b->uart_dev[0].rx = 26;
1114 b->uart_dev[0].tx = 35;
1115 b->uart_dev[0].device_path = UART_DEV_PATH;
1117 return MRAA_SUCCESS;
1121 mraa_intel_edison_fab_c()
1123 mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
1128 b->platform_name = PLATFORM_NAME;
1129 // This seciton will also check if the arduino board is there
1130 tristate = mraa_gpio_init_raw(214);
1131 if (tristate == NULL) {
1132 syslog(LOG_INFO, "edison: Failed to initialise Arduino board TriState,\
1133 assuming Intel Edison Miniboard\n");
1134 if (mraa_intel_edison_miniboard(b) != MRAA_SUCCESS) {
1139 // Now Assuming the edison is attached to the Arduino board.
1140 b->phy_pin_count = 20;
1144 b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
1145 if (b->adv_func == NULL) {
1148 b->adv_func->gpio_dir_pre = &mraa_intel_edison_gpio_dir_pre;
1149 b->adv_func->gpio_init_post = &mraa_intel_edison_gpio_init_post;
1150 b->adv_func->gpio_close_pre = &mraa_intel_edison_gpio_close_pre;
1151 b->adv_func->gpio_dir_post = &mraa_intel_edison_gpio_dir_post;
1152 b->adv_func->i2c_init_pre = &mraa_intel_edison_i2c_init_pre;
1153 b->adv_func->i2c_set_frequency_replace = &mraa_intel_edison_i2c_freq;
1154 b->adv_func->aio_get_valid_fp = &mraa_intel_edison_aio_get_fp;
1155 b->adv_func->aio_init_pre = &mraa_intel_edison_aio_init_pre;
1156 b->adv_func->aio_init_post = &mraa_intel_edison_aio_init_post;
1157 b->adv_func->pwm_init_pre = &mraa_intel_edison_pwm_init_pre;
1158 b->adv_func->pwm_init_post = &mraa_intel_edison_pwm_init_post;
1159 b->adv_func->spi_init_pre = &mraa_intel_edison_spi_init_pre;
1160 b->adv_func->spi_init_post = &mraa_intel_edison_spi_init_post;
1161 b->adv_func->gpio_mode_replace = &mraa_intel_edison_gpio_mode_replace;
1162 b->adv_func->uart_init_pre = &mraa_intel_edison_uart_init_pre;
1163 b->adv_func->uart_init_post = &mraa_intel_edison_uart_init_post;
1164 b->adv_func->gpio_mmap_setup = &mraa_intel_edison_mmap_setup;
1165 b->adv_func->spi_lsbmode_replace = &mraa_intel_edison_spi_lsbmode_replace;
1167 b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_EDISON_PINCOUNT);
1168 if (b->pins == NULL) {
1173 mraa_gpio_dir(tristate, MRAA_GPIO_OUT);
1174 mraa_intel_edison_misc_spi();
1177 b->adc_supported = 10;
1178 b->pwm_default_period = 5000;
1179 b->pwm_max_period = 218453;
1180 b->pwm_min_period = 1;
1182 strncpy(b->pins[0].name, "IO0", 8);
1183 b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1184 b->pins[0].gpio.pinmap = 130;
1185 b->pins[0].gpio.parent_id = 0;
1186 b->pins[0].gpio.mux_total = 0;
1187 b->pins[0].uart.pinmap = 0;
1188 b->pins[0].uart.parent_id = 0;
1189 b->pins[0].uart.mux_total = 0;
1191 strncpy(b->pins[1].name, "IO1", 8);
1192 b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
1193 b->pins[1].gpio.pinmap = 131;
1194 b->pins[1].gpio.parent_id = 0;
1195 b->pins[1].gpio.mux_total = 0;
1196 b->pins[1].uart.pinmap = 0;
1197 b->pins[1].uart.parent_id = 0;
1198 b->pins[1].uart.mux_total = 0;
1200 strncpy(b->pins[2].name, "IO2", 8);
1201 b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1202 b->pins[2].gpio.pinmap = 128;
1203 b->pins[2].gpio.parent_id = 0;
1204 b->pins[2].gpio.mux_total = 0;
1206 strncpy(b->pins[3].name, "IO3", 8);
1207 b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
1208 b->pins[3].gpio.pinmap = 12;
1209 b->pins[3].gpio.parent_id = 0;
1210 b->pins[3].gpio.mux_total = 0;
1211 b->pins[3].pwm.pinmap = 0;
1212 b->pins[3].pwm.parent_id = 0;
1213 b->pins[3].pwm.mux_total = 0;
1215 strncpy(b->pins[4].name, "IO4", 8);
1216 b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1217 b->pins[4].gpio.pinmap = 129;
1218 b->pins[4].gpio.parent_id = 0;
1219 b->pins[4].gpio.mux_total = 0;
1221 strncpy(b->pins[5].name, "IO5", 8);
1222 b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1223 b->pins[5].gpio.pinmap = 13;
1224 b->pins[5].gpio.parent_id = 0;
1225 b->pins[5].gpio.mux_total = 0;
1226 b->pins[5].pwm.pinmap = 1;
1227 b->pins[5].pwm.parent_id = 0;
1228 b->pins[5].pwm.mux_total = 0;
1230 strncpy(b->pins[6].name, "IO6", 8);
1231 b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1232 b->pins[6].gpio.pinmap = 182;
1233 b->pins[6].gpio.parent_id = 0;
1234 b->pins[6].gpio.mux_total = 0;
1235 b->pins[6].pwm.pinmap = 2;
1236 b->pins[6].pwm.parent_id = 0;
1237 b->pins[6].pwm.mux_total = 0;
1239 strncpy(b->pins[7].name, "IO7", 8);
1240 b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1241 b->pins[7].gpio.pinmap = 48;
1242 b->pins[7].gpio.parent_id = 0;
1243 b->pins[7].gpio.mux_total = 0;
1245 strncpy(b->pins[8].name, "IO8", 8);
1246 b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
1247 b->pins[8].gpio.pinmap = 49;
1248 b->pins[8].gpio.parent_id = 0;
1249 b->pins[8].gpio.mux_total = 0;
1251 strncpy(b->pins[9].name, "IO9", 8);
1252 b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
1253 b->pins[9].gpio.pinmap = 183;
1254 b->pins[9].gpio.parent_id = 0;
1255 b->pins[9].gpio.mux_total = 0;
1256 b->pins[9].pwm.pinmap = 3;
1257 b->pins[9].pwm.parent_id = 0;
1258 b->pins[9].pwm.mux_total = 0;
1260 strncpy(b->pins[10].name, "IO10", 8);
1261 b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1262 b->pins[10].gpio.pinmap = 41;
1263 b->pins[10].gpio.parent_id = 0;
1264 b->pins[10].gpio.mux_total = 2;
1265 b->pins[10].gpio.mux[0].pin = 263;
1266 b->pins[10].gpio.mux[0].value = 1;
1267 b->pins[10].gpio.mux[1].pin = 240;
1268 b->pins[10].gpio.mux[1].value = 0;
1269 b->pins[10].spi.pinmap = 5;
1270 b->pins[10].spi.mux_total = 2;
1271 b->pins[10].spi.mux[0].pin = 263;
1272 b->pins[10].spi.mux[0].value = 1;
1273 b->pins[10].spi.mux[1].pin = 240;
1274 b->pins[10].spi.mux[1].value = 1;
1276 strncpy(b->pins[11].name, "IO11", 8);
1277 b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1278 b->pins[11].gpio.pinmap = 43;
1279 b->pins[11].gpio.parent_id = 0;
1280 b->pins[11].gpio.mux_total = 2;
1281 b->pins[11].gpio.mux[0].pin = 262;
1282 b->pins[11].gpio.mux[0].value = 1;
1283 b->pins[11].gpio.mux[1].pin = 241;
1284 b->pins[11].gpio.mux[1].value = 0;
1285 b->pins[11].spi.pinmap = 5;
1286 b->pins[11].spi.mux_total = 2;
1287 b->pins[11].spi.mux[0].pin = 262;
1288 b->pins[11].spi.mux[0].value = 1;
1289 b->pins[11].spi.mux[1].pin = 241;
1290 b->pins[11].spi.mux[1].value = 1;
1292 strncpy(b->pins[12].name, "IO12", 8);
1293 b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1294 b->pins[12].gpio.pinmap = 42;
1295 b->pins[12].gpio.parent_id = 0;
1296 b->pins[12].gpio.mux_total = 1;
1297 b->pins[12].gpio.mux[0].pin = 242;
1298 b->pins[12].gpio.mux[0].value = 0;
1299 b->pins[12].spi.pinmap = 5;
1300 b->pins[12].spi.mux_total = 1;
1301 b->pins[12].spi.mux[0].pin = 242;
1302 b->pins[12].spi.mux[0].value = 1;
1304 strncpy(b->pins[13].name, "IO13", 8);
1305 b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
1306 b->pins[13].gpio.pinmap = 40;
1307 b->pins[13].gpio.parent_id = 0;
1308 b->pins[13].gpio.mux_total = 1;
1309 b->pins[13].gpio.mux[0].pin = 243;
1310 b->pins[13].gpio.mux[0].value = 0;
1311 b->pins[13].spi.pinmap = 5;
1312 b->pins[13].spi.mux_total = 1;
1313 b->pins[13].spi.mux[0].pin = 243;
1314 b->pins[13].spi.mux[0].value = 1;
1316 strncpy(b->pins[14].name, "A0", 8);
1317 b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1318 b->pins[14].aio.pinmap = 0;
1319 b->pins[14].aio.mux_total = 1;
1320 b->pins[14].aio.mux[0].pin = 200;
1321 b->pins[14].aio.mux[0].value = 1;
1322 b->pins[14].gpio.pinmap = 44;
1323 b->pins[14].gpio.mux_total = 1;
1324 b->pins[14].gpio.mux[0].pin = 200;
1325 b->pins[14].gpio.mux[0].value = 0;
1327 strncpy(b->pins[15].name, "A1", 8);
1328 b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1329 b->pins[15].aio.pinmap = 1;
1330 b->pins[15].aio.mux_total = 1;
1331 b->pins[15].aio.mux[0].pin = 201;
1332 b->pins[15].aio.mux[0].value = 1;
1333 b->pins[15].gpio.pinmap = 45;
1334 b->pins[15].gpio.mux_total = 1;
1335 b->pins[15].gpio.mux[0].pin = 201;
1336 b->pins[15].gpio.mux[0].value = 0;
1338 strncpy(b->pins[16].name, "A2", 8);
1339 b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1340 b->pins[16].aio.pinmap = 2;
1341 b->pins[16].aio.mux_total = 1;
1342 b->pins[16].aio.mux[0].pin = 202;
1343 b->pins[16].aio.mux[0].value = 1;
1344 b->pins[16].gpio.pinmap = 46;
1345 b->pins[16].gpio.mux_total = 1;
1346 b->pins[16].gpio.mux[0].pin = 202;
1347 b->pins[16].gpio.mux[0].value = 0;
1349 strncpy(b->pins[17].name, "A3", 8);
1350 b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
1351 b->pins[17].aio.pinmap = 3;
1352 b->pins[17].aio.mux_total = 1;
1353 b->pins[17].aio.mux[0].pin = 203;
1354 b->pins[17].aio.mux[0].value = 1;
1355 b->pins[17].gpio.pinmap = 47;
1356 b->pins[17].gpio.mux_total = 1;
1357 b->pins[17].gpio.mux[0].pin = 203;
1358 b->pins[17].gpio.mux[0].value = 0;
1360 strncpy(b->pins[18].name, "A4", 8);
1361 b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1362 b->pins[18].i2c.pinmap = 1;
1363 b->pins[18].i2c.mux_total = 1;
1364 b->pins[18].i2c.mux[0].pin = 204;
1365 b->pins[18].i2c.mux[0].value = 0;
1366 b->pins[18].aio.pinmap = 4;
1367 b->pins[18].aio.mux_total = 1;
1368 b->pins[18].aio.mux[0].pin = 204;
1369 b->pins[18].aio.mux[0].value = 1;
1370 b->pins[18].gpio.pinmap = 14;
1371 b->pins[18].gpio.mux_total = 1;
1372 b->pins[18].gpio.mux[0].pin = 204;
1373 b->pins[18].gpio.mux[0].value = 0;
1375 strncpy(b->pins[19].name, "A5", 8);
1376 b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
1377 b->pins[19].i2c.pinmap = 1;
1378 b->pins[19].i2c.mux_total = 1;
1379 b->pins[19].i2c.mux[0].pin = 205;
1380 b->pins[19].i2c.mux[0].value = 0;
1381 b->pins[19].aio.pinmap = 5;
1382 b->pins[19].aio.mux_total = 1;
1383 b->pins[19].aio.mux[0].pin = 205;
1384 b->pins[19].aio.mux[0].value = 1;
1385 b->pins[19].gpio.pinmap = 165;
1386 b->pins[19].gpio.mux_total = 1;
1387 b->pins[19].gpio.mux[0].pin = 205;
1388 b->pins[19].gpio.mux[0].value = 0;
1391 b->i2c_bus_count = 9;
1394 for (ici = 0; ici < 9; ici++) {
1395 b->i2c_bus[ici].bus_id = -1;
1397 b->i2c_bus[6].bus_id = 6;
1398 b->i2c_bus[6].sda = 18;
1399 b->i2c_bus[6].scl = 19;
1401 b->spi_bus_count = 1;
1403 b->spi_bus[0].bus_id = 5;
1404 b->spi_bus[0].slave_s = 1;
1405 b->spi_bus[0].cs = 10;
1406 b->spi_bus[0].mosi = 11;
1407 b->spi_bus[0].miso = 12;
1408 b->spi_bus[0].sclk = 13;
1410 b->uart_dev_count = 1;
1411 b->def_uart_dev = 0;
1412 b->uart_dev[0].rx = 0;
1413 b->uart_dev[0].tx = 1;
1414 b->uart_dev[0].device_path = UART_DEV_PATH;
1417 for (il = 0; il < MRAA_INTEL_EDISON_PINCOUNT; il++) {
1418 pinmodes[il].gpio.sysfs = -1;
1419 pinmodes[il].gpio.mode = -1;
1420 pinmodes[il].pwm.sysfs = -1;
1421 pinmodes[il].pwm.mode = -1;
1422 pinmodes[il].i2c.sysfs = -1;
1423 pinmodes[il].i2c.mode = -1;
1424 pinmodes[il].spi.sysfs = -1;
1425 pinmodes[il].spi.mode = -1;
1426 pinmodes[il].uart.sysfs = -1;
1427 pinmodes[il].uart.mode = -1;
1429 pinmodes[0].gpio.sysfs = 130;
1430 pinmodes[0].gpio.mode = 0;
1431 pinmodes[0].uart.sysfs = 130;
1432 pinmodes[0].uart.mode = 1;
1433 pinmodes[1].gpio.sysfs = 131;
1434 pinmodes[1].gpio.mode = 0;
1435 pinmodes[1].uart.sysfs = 131;
1436 pinmodes[1].uart.mode = 1;
1437 pinmodes[2].gpio.sysfs = 128;
1438 pinmodes[2].gpio.mode = 0;
1439 pinmodes[2].uart.sysfs = 128;
1440 pinmodes[2].uart.mode = 1;
1441 pinmodes[3].gpio.sysfs = 12;
1442 pinmodes[3].gpio.mode = 0;
1443 pinmodes[3].pwm.sysfs = 12;
1444 pinmodes[3].pwm.mode = 1;
1446 pinmodes[4].gpio.sysfs = 129;
1447 pinmodes[4].gpio.mode = 0;
1448 pinmodes[4].uart.sysfs = 129;
1449 pinmodes[4].uart.mode = 1;
1450 pinmodes[5].gpio.sysfs = 13;
1451 pinmodes[5].gpio.mode = 0;
1452 pinmodes[5].pwm.sysfs = 13;
1453 pinmodes[5].pwm.mode = 1;
1454 pinmodes[6].gpio.sysfs = 182;
1455 pinmodes[6].gpio.mode = 0;
1456 pinmodes[6].pwm.sysfs = 182;
1457 pinmodes[6].pwm.mode = 1;
1459 // 7 and 8 are provided by something on i2c, very simplepinmodes[3].gpio.sysfs = 12;
1460 pinmodes[9].gpio.sysfs = 183;
1461 pinmodes[9].gpio.mode = 0;
1462 pinmodes[9].pwm.sysfs = 183;
1463 pinmodes[9].pwm.mode = 1;
1465 pinmodes[10].gpio.sysfs = 41;
1466 pinmodes[10].gpio.mode = 0;
1467 pinmodes[10].spi.sysfs = 111; // Different pin provides, switched at mux level.
1468 pinmodes[10].spi.mode = 1;
1470 pinmodes[11].gpio.sysfs = 43;
1471 pinmodes[11].gpio.mode = 0;
1472 pinmodes[11].spi.sysfs = 115; // Different pin provides, switched at mux level.
1473 pinmodes[11].spi.mode = 1;
1475 pinmodes[12].gpio.sysfs = 42;
1476 pinmodes[12].gpio.mode = 0;
1477 pinmodes[12].spi.sysfs = 114; // Different pin provides, switched at mux level.
1478 pinmodes[12].spi.mode = 1;
1480 pinmodes[13].gpio.sysfs = 40;
1481 pinmodes[13].gpio.mode = 0;
1482 pinmodes[13].spi.sysfs = 109; // Different pin provides, switched at mux level.
1483 pinmodes[13].spi.mode = 1;
1484 // Everything else but A4 A5 LEAVE
1485 pinmodes[18].gpio.sysfs = 14;
1486 pinmodes[18].gpio.mode = 0;
1487 pinmodes[18].i2c.sysfs = 28;
1488 pinmodes[18].i2c.mode = 1;
1490 pinmodes[19].gpio.sysfs = 165;
1491 pinmodes[19].gpio.mode = 0;
1492 pinmodes[19].i2c.sysfs = 27;
1493 pinmodes[19].i2c.mode = 1;
1497 syslog(LOG_CRIT, "edison: Arduino board failed to initialise");