2 * Author: Thomas Ingleby <thomas.c.ingleby@intel.com>
3 * Author: Brendan Le Foll <brendan.le.foll@intel.com>
4 * Copyright (c) 2014 Intel Corporation.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice shall be
15 * included in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
20 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 // general status failures for internal functions
32 #define MRAA_PLATFORM_NO_INIT -3
33 #define MRAA_IO_SETUP_FAILURE -2
34 #define MRAA_NO_SUCH_IO -1
37 * A structure representing a gpio pin.
41 int pin; /**< the pin number, as known to the os. */
42 int phy_pin; /**< pin passed to clean init. -1 none and raw*/
43 int value_fp; /**< the file pointer to the value of the gpio */
44 void (* isr)(void *); /**< the interupt service request */
45 void *isr_args; /**< args return when interupt service request triggered */
46 pthread_t thread_id; /**< the isr handler thread id */
47 int isr_value_fp; /**< the isr file pointer on the value */
48 mraa_boolean_t owner; /**< If this context originally exported the pin */
49 mraa_result_t (*mmap_write) (mraa_gpio_context dev, int value);
50 int (*mmap_read) (mraa_gpio_context dev);
55 * A structure representing a I2C bus
59 int busnum; /**< the bus number of the /dev/i2c-* device */
60 int fh; /**< the file handle to the /dev/i2c-* device */
61 int addr; /**< the address of the i2c slave */
67 * A structure representing the SPI device
71 int devfd; /**< File descriptor to SPI Device */
72 uint32_t mode; /**< Spi mode see spidev.h */
73 int clock; /**< clock to run transactions at */
74 mraa_boolean_t lsb; /**< least significant bit mode */
75 unsigned int bpw; /**< Bits per word */
80 * A structure representing a PWM pin
84 int pin; /**< the pin number, as known to the os. */
85 int chipid; /**< the chip id, which the pwm resides */
86 int duty_fp; /**< File pointer to duty file */
87 int period; /**< Cache the period to speed up setting duty */
88 mraa_boolean_t owner; /**< Owner of pwm context*/
93 * A structure representing a Analog Input Channel
96 unsigned int channel; /**< the channel as on board and ADC module */
97 int adc_in_fp; /**< File Pointer to raw sysfs */
98 int value_bit; /**< 10 bits by default. Can be increased if board */
102 * A structure representing a UART device
106 int index; /**< the uart index, as known to the os. */
107 const char* path; /**< the uart device path. */
108 int fd; /**< file descriptor for device. */
113 * A bitfield representing the capabilities of a pin.
117 mraa_boolean_t valid:1; /**< Is the pin valid at all */
118 mraa_boolean_t gpio:1; /**< Is the pin gpio capable */
119 mraa_boolean_t pwm:1; /**< Is the pin pwm capable */
120 mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
121 mraa_boolean_t spi:1; /**< Is the pin spi capable */
122 mraa_boolean_t i2c:1; /**< Is the pin i2c capable */
123 mraa_boolean_t aio:1; /**< Is the pin analog input capable */
124 mraa_boolean_t uart:1; /**< Is the pin uart capable */
126 } mraa_pincapabilities_t;
129 * A Structure representing a multiplexer and the required value
133 unsigned int pin; /**< Raw GPIO pin id */
134 unsigned int value; /**< Raw GPIO value */
139 mraa_boolean_t complex_pin:1;
140 mraa_boolean_t output_en:1;
141 mraa_boolean_t output_en_high:1;
142 mraa_boolean_t pullup_en:1;
143 mraa_boolean_t pullup_en_hiz:1;
144 } mraa_pin_cap_complex_t;
148 unsigned int pinmap; /**< sysfs pin */
149 unsigned int parent_id; /** parent chip id */
150 unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
151 mraa_mux_t mux[6]; /** Array holding information about mux */
152 unsigned int output_enable; /** Output Enable GPIO, for level shifting */
153 unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
154 mraa_pin_cap_complex_t complex_cap;
160 char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
161 unsigned int mem_sz; /** Size of memory to map */
162 unsigned int bit_pos; /** Position of value bit */
163 mraa_pin_t gpio; /** GPio context containing none mmap info */
168 * A Structure representing a physical Pin.
172 char name[MRAA_PIN_NAME_SIZE]; /**< Pin's real world name */
173 mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
174 mraa_pin_t gpio; /**< GPIO structure */
175 mraa_pin_t pwm; /**< PWM structure */
176 mraa_pin_t aio; /**< Anaglog Pin */
177 mraa_mmap_pin_t mmap; /**< GPIO through memory */
178 mraa_pin_t i2c; /**< i2c bus/pin */
179 mraa_pin_t spi; /**< spi bus/pin */
180 mraa_pin_t uart; /**< uart module/pin */
185 * A Structure representing the physical properties of a i2c bus.
189 unsigned int bus_id; /**< ID as exposed in the system */
190 unsigned int scl; /**< i2c SCL */
191 unsigned int sda; /**< i2c SDA */
196 * A Structure representing the physical properties of a spi bus.
200 unsigned int bus_id; /**< The Bus ID as exposed to the system. */
201 unsigned int slave_s; /**< Slave select */
202 mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
203 unsigned int sclk; /**< Serial Clock */
204 unsigned int mosi; /**< Master Out, Slave In. */
205 unsigned int miso; /**< Master In, Slave Out. */
206 unsigned int cs; /**< Chip Select, used when the board is a spi slave */
211 * A Structure representing a uart device.
215 unsigned int index; /**< ID as exposed in the system */
216 int rx; /**< uart rx */
217 int tx; /**< uart tx */
218 const char* device_path; /**< To store "/dev/ttyS1" for example */
223 * A Structure representing a platform/board.
227 unsigned int phy_pin_count; /**< The Total IO pins on board */
228 unsigned int gpio_count; /**< GPIO Count */
229 unsigned int aio_count; /**< Analog side Count */
230 unsigned int i2c_bus_count; /**< Usable i2c Count */
231 mraa_i2c_bus_t i2c_bus[12]; /**< Array of i2c */
232 unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
233 unsigned int spi_bus_count; /**< Usable spi Count */
234 mraa_spi_bus_t spi_bus[12]; /**< Array of spi */
235 unsigned int def_spi_bus; /**< Position in array of defult spi bus */
236 unsigned int adc_raw; /**< ADC raw bit value */
237 unsigned int adc_supported; /**< ADC supported bit value */
238 unsigned int def_uart_dev; /**< Position in array of defult uart */
239 unsigned int uart_dev_count; /**< Usable spi Count */
240 mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
241 int pwm_default_period; /**< The default PWM period is US */
242 int pwm_max_period; /**< Maximum period in us */
243 int pwm_min_period; /**< Minimum period in us */
244 const char* platform_name; /**< Platform Name pointer */
245 mraa_pininfo_t* pins; /**< Pointer to pin array */